Re: [PATCH] mtd: spinand: add support for Dosilicon DS35Q1GA/DS35M1GA

[Ahmed Naseef <naseefkm@gmail.com>]

Hi Miquèl,

Thank you for the review. You were right about the OOB layout - it was 
incorrect.


> These macros have been renamed, please rebase at -rc1.

Done, updated in v2.

> This is strange, there is usually some spare area used for storing the
> ECC. Are you sure none of the bytes in the spare area are being smashed
> when you write them?

You were correct - the original OOB layout was wrong. I initially
misread the datasheet's "hidden spare area" phrase and assumed
ECC parity was stored internally by the chip. I've now done hardware
testing which proves otherwise.

Test procedure (on Genexis Platinum 4410)
1. Erased a block and wrote 0xAA to all 62 OOB bytes (2-63)
2. Read back the page with ECC enabled

Result:
  00000800  ff ff aa aa aa aa aa aa  e5 58 4e 86 77 75 0e f0
  00000810  aa aa aa aa aa aa aa aa  e5 58 4e 86 77 75 0e f0
  ...

The R1 regions (bytes 8-15, 24-31, 40-47, 56-63) were overwritten with
ECC parity data, while M2+M1 regions preserved the 0xAA pattern.

Corrected OOB layout (per datasheet Table 3.7):
  - 64 bytes total, 4 segments of 16 bytes each
  - Each segment: bytes 0-7 user data (M2+M1), bytes 8-15 ECC parity (R1)
  - Free: 30 bytes total (6+8+8+8, accounting for 2-byte BBM)
  - ECC: 32 bytes total (8 bytes × 4 segments)

v2 includes the corrected OOB layout with proper ECC and free region
callbacks.

Thanks,
Ahmed Naseef

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