Re: [PATCH v3 21/22] drm/pagemap, drm/xe: Support destination migration over interconnect

[kernel test robot <lkp@intel.com>]

Hi Thomas,

kernel test robot noticed the following build errors:

[auto build test ERROR on drm-tip/drm-tip]
[cannot apply to drm-xe/drm-xe-next drm-misc/drm-misc-next drm/drm-next drm-i915/for-linux-next drm-i915/for-linux-next-fixes linus/master daeinki-drm-exynos/exynos-drm-next v6.18 next-20251210]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Thomas-Hellstr-m/drm-xe-svm-Fix-a-debug-printout/20251210-191243
base:   https://gitlab.freedesktop.org/drm/tip.git drm-tip
patch link:    https://lore.kernel.org/r/20251210110742.107575-22-thomas.hellstrom%40linux.intel.com
patch subject: [PATCH v3 21/22] drm/pagemap, drm/xe: Support destination migration over interconnect
config: arm-randconfig-004-20251211 (https://download.01.org/0day-ci/archive/20251211/202512111107.hyCaihdX-lkp@intel.com/config)
compiler: clang version 22.0.0git (https://github.com/llvm/llvm-project 6ec8c4351cfc1d0627d1633b02ea787bd29c77d8)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251211/202512111107.hyCaihdX-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202512111107.hyCaihdX-lkp@intel.com/

All errors (new ones prefixed by >>):

>> drivers/gpu/drm/xe/xe_migrate.c:2052:34: error: use of undeclared identifier 'XE_INTERCONNECT_P2P'
    2052 |                                        sram_addr[i].proto == XE_INTERCONNECT_P2P);
         |                                                              ^~~~~~~~~~~~~~~~~~~
   1 error generated.


vim +/XE_INTERCONNECT_P2P +2052 drivers/gpu/drm/xe/xe_migrate.c

  2019	
  2020	static void build_pt_update_batch_sram(struct xe_migrate *m,
  2021					       struct xe_bb *bb, u32 pt_offset,
  2022					       struct drm_pagemap_addr *sram_addr,
  2023					       u32 size, int level)
  2024	{
  2025		u16 pat_index = tile_to_xe(m->tile)->pat.idx[XE_CACHE_WB];
  2026		u64 gpu_page_size = 0x1ull << xe_pt_shift(level);
  2027		u32 ptes;
  2028		int i = 0;
  2029	
  2030		xe_tile_assert(m->tile, PAGE_ALIGNED(size));
  2031	
  2032		ptes = DIV_ROUND_UP(size, gpu_page_size);
  2033		while (ptes) {
  2034			u32 chunk = min(MAX_PTE_PER_SDI, ptes);
  2035	
  2036			if (!level)
  2037				chunk = ALIGN_DOWN(chunk, PAGE_SIZE / XE_PAGE_SIZE);
  2038	
  2039			bb->cs[bb->len++] = MI_STORE_DATA_IMM | MI_SDI_NUM_QW(chunk);
  2040			bb->cs[bb->len++] = pt_offset;
  2041			bb->cs[bb->len++] = 0;
  2042	
  2043			pt_offset += chunk * 8;
  2044			ptes -= chunk;
  2045	
  2046			while (chunk--) {
  2047				u64 addr = sram_addr[i].addr;
  2048				u64 pte;
  2049	
  2050				xe_tile_assert(m->tile, sram_addr[i].proto ==
  2051					       DRM_INTERCONNECT_SYSTEM ||
> 2052					       sram_addr[i].proto == XE_INTERCONNECT_P2P);
  2053				xe_tile_assert(m->tile, addr);
  2054				xe_tile_assert(m->tile, PAGE_ALIGNED(addr));
  2055	
  2056	again:
  2057				pte = m->q->vm->pt_ops->pte_encode_addr(m->tile->xe,
  2058									addr, pat_index,
  2059									level, false, 0);
  2060				bb->cs[bb->len++] = lower_32_bits(pte);
  2061				bb->cs[bb->len++] = upper_32_bits(pte);
  2062	
  2063				if (gpu_page_size < PAGE_SIZE) {
  2064					addr += XE_PAGE_SIZE;
  2065					if (!PAGE_ALIGNED(addr)) {
  2066						chunk--;
  2067						goto again;
  2068					}
  2069					i++;
  2070				} else {
  2071					i += gpu_page_size / PAGE_SIZE;
  2072				}
  2073			}
  2074		}
  2075	}
  2076	

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