All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jonathan Cameron <jonathan.cameron@huawei.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: <dave.jiang@intel.com>, <linux-cxl@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<Smita.KoralahalliChannabasappa@amd.com>,
	<alison.schofield@intel.com>, <terry.bowman@amd.com>,
	<alejandro.lucero-palau@amd.com>, <linux-pci@vger.kernel.org>,
	Alejandro Lucero <alucerop@amd.com>
Subject: Re: [PATCH 2/6] cxl/mem: Arrange for always-synchronous memdev attach
Date: Mon, 15 Dec 2025 12:08:59 +0000	[thread overview]
Message-ID: <20251215120859.0000198d@huawei.com> (raw)
In-Reply-To: <20251204022136.2573521-3-dan.j.williams@intel.com>

On Wed,  3 Dec 2025 18:21:32 -0800
Dan Williams <dan.j.williams@intel.com> wrote:

> In preparation for CXL accelerator drivers that have a hard dependency on
> CXL capability initialization, arrange for cxl_mem_probe() to always run
> synchronous with the device_add() of cxl_memdev instances. I.e.
> cxl_mem_driver registration is always complete before the first memdev
> creation event.
> 
> At present, cxl_pci does not care about the attach state of the cxl_memdev
> because all generic memory expansion functionality can be handled by the
> cxl_core. For accelerators, however, that driver needs to perform driver
> specific initialization if CXL is available, or execute a fallback to PCIe
> only operation.
> 
> This synchronous attach guarantee is also needed for Soft Reserve Recovery,
> which is an effort that needs to assert that devices have had a chance to
> attach before making a go / no-go decision on proceeding with CXL subsystem
> initialization.
> 
> By moving devm_cxl_add_memdev() to cxl_mem.ko it removes async module
> loading as one reason that a memdev may not be attached upon return from
> devm_cxl_add_memdev().
> 
> Cc: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
> Cc: Alejandro Lucero <alucerop@amd.com>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Seems fine to me as well. Even independent of the reasons that
drove this patch set I'm keen on the simpler mental model that synchronous
probing allows.

Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>

  parent reply	other threads:[~2025-12-15 12:09 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-04  2:21 [PATCH 0/6] cxl: Initialization reworks in support Soft Reserve Recovery and Accelerator Memory Dan Williams
2025-12-04  2:21 ` [PATCH 1/6] cxl/mem: Fix devm_cxl_memdev_edac_release() confusion Dan Williams
2025-12-04 16:48   ` Dave Jiang
2025-12-04 20:15     ` dan.j.williams
2025-12-04 19:09   ` Cheatham, Benjamin
2025-12-05  2:46   ` Alison Schofield
2025-12-08 14:19   ` Alejandro Lucero Palau
2025-12-15 21:11     ` dan.j.williams
2025-12-08 19:20   ` Shiju Jose
2025-12-15 12:00   ` Jonathan Cameron
2025-12-04  2:21 ` [PATCH 2/6] cxl/mem: Arrange for always-synchronous memdev attach Dan Williams
2025-12-04 16:58   ` Dave Jiang
2025-12-04 19:09   ` Cheatham, Benjamin
2025-12-05  2:49   ` Alison Schofield
2025-12-15 12:08   ` Jonathan Cameron [this message]
2025-12-04  2:21 ` [PATCH 3/6] cxl/port: Arrange for always synchronous endpoint attach Dan Williams
2025-12-04 18:36   ` Dave Jiang
2025-12-04 19:09   ` Cheatham, Benjamin
2025-12-05  3:36   ` Alison Schofield
2025-12-15 12:09   ` Jonathan Cameron
2025-12-04  2:21 ` [PATCH 4/6] cxl/mem: Convert devm_cxl_add_memdev() to scope-based-cleanup Dan Williams
2025-12-04 18:58   ` Dave Jiang
2025-12-04 19:09   ` Cheatham, Benjamin
2025-12-04 20:50     ` dan.j.williams
2025-12-05  3:37   ` Alison Schofield
2025-12-04  2:21 ` [PATCH 5/6] cxl/mem: Drop @host argument to devm_cxl_add_memdev() Dan Williams
2025-12-04 19:09   ` Cheatham, Benjamin
2025-12-04 20:02   ` Dave Jiang
2025-12-05  3:38   ` Alison Schofield
2025-12-15 12:15   ` Jonathan Cameron
2025-12-04  2:21 ` [PATCH 6/6] cxl/mem: Introduce a memdev creation ->probe() operation Dan Williams
2025-12-04 19:10   ` Cheatham, Benjamin
2025-12-04 21:11     ` dan.j.williams
2025-12-04 22:02       ` dan.j.williams
2025-12-04 22:15         ` Cheatham, Benjamin
2025-12-04 20:03   ` Dave Jiang
2025-12-05 15:15 ` [PATCH 0/6] cxl: Initialization reworks in support Soft Reserve Recovery and Accelerator Memory Alejandro Lucero Palau
2025-12-05 21:17   ` dan.j.williams
2025-12-08 14:04     ` Alejandro Lucero Palau
2025-12-09  7:53       ` dan.j.williams
2025-12-08 17:04 ` Alejandro Lucero Palau
2025-12-15 23:29   ` dan.j.williams

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20251215120859.0000198d@huawei.com \
    --to=jonathan.cameron@huawei.com \
    --cc=Smita.KoralahalliChannabasappa@amd.com \
    --cc=alejandro.lucero-palau@amd.com \
    --cc=alison.schofield@intel.com \
    --cc=alucerop@amd.com \
    --cc=dan.j.williams@intel.com \
    --cc=dave.jiang@intel.com \
    --cc=linux-cxl@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=terry.bowman@amd.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.