From: "Cheatham, Benjamin" <benjamin.cheatham@amd.com>
To: Dan Williams <dan.j.williams@intel.com>, <dave.jiang@intel.com>
Cc: <linux-cxl@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<Smita.KoralahalliChannabasappa@amd.com>,
<alison.schofield@intel.com>, <terry.bowman@amd.com>,
<alejandro.lucero-palau@amd.com>, <linux-pci@vger.kernel.org>,
<Jonathan.Cameron@huawei.com>,
Alejandro Lucero <alucerop@amd.com>
Subject: Re: [PATCH 3/6] cxl/port: Arrange for always synchronous endpoint attach
Date: Thu, 4 Dec 2025 13:09:48 -0600 [thread overview]
Message-ID: <22e47fe0-e2fa-484b-8fa1-2bff55cec8a4@amd.com> (raw)
In-Reply-To: <20251204022136.2573521-4-dan.j.williams@intel.com>
On 12/3/2025 8:21 PM, Dan Williams wrote:
> Make it so that upon return from devm_cxl_add_endpoint() that
> cxl_mem_probe() can assume that the endpoint has had a chance to complete
> cxl_port_probe(). I.e. cxl_port module loading has completed prior to
> device registration.
>
> Delete the MODULE_SOFTDEP() as it is not sufficient for this purpose, but a
> hard link-time dependency is reliable. Specifically MODULE_SOFTDEP() does
> not guarantee that the module loading has completed prior to the completion
> of the current module's init.
>
> Cc: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
> Cc: Alejandro Lucero <alucerop@amd.com>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
> ---
Reviewed-by: Ben Cheatham <benjamin.cheatham@amd.com>
next prev parent reply other threads:[~2025-12-04 19:09 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-04 2:21 [PATCH 0/6] cxl: Initialization reworks in support Soft Reserve Recovery and Accelerator Memory Dan Williams
2025-12-04 2:21 ` [PATCH 1/6] cxl/mem: Fix devm_cxl_memdev_edac_release() confusion Dan Williams
2025-12-04 16:48 ` Dave Jiang
2025-12-04 20:15 ` dan.j.williams
2025-12-04 19:09 ` Cheatham, Benjamin
2025-12-05 2:46 ` Alison Schofield
2025-12-08 14:19 ` Alejandro Lucero Palau
2025-12-15 21:11 ` dan.j.williams
2025-12-08 19:20 ` Shiju Jose
2025-12-15 12:00 ` Jonathan Cameron
2025-12-04 2:21 ` [PATCH 2/6] cxl/mem: Arrange for always-synchronous memdev attach Dan Williams
2025-12-04 16:58 ` Dave Jiang
2025-12-04 19:09 ` Cheatham, Benjamin
2025-12-05 2:49 ` Alison Schofield
2025-12-15 12:08 ` Jonathan Cameron
2025-12-04 2:21 ` [PATCH 3/6] cxl/port: Arrange for always synchronous endpoint attach Dan Williams
2025-12-04 18:36 ` Dave Jiang
2025-12-04 19:09 ` Cheatham, Benjamin [this message]
2025-12-05 3:36 ` Alison Schofield
2025-12-15 12:09 ` Jonathan Cameron
2025-12-04 2:21 ` [PATCH 4/6] cxl/mem: Convert devm_cxl_add_memdev() to scope-based-cleanup Dan Williams
2025-12-04 18:58 ` Dave Jiang
2025-12-04 19:09 ` Cheatham, Benjamin
2025-12-04 20:50 ` dan.j.williams
2025-12-05 3:37 ` Alison Schofield
2025-12-04 2:21 ` [PATCH 5/6] cxl/mem: Drop @host argument to devm_cxl_add_memdev() Dan Williams
2025-12-04 19:09 ` Cheatham, Benjamin
2025-12-04 20:02 ` Dave Jiang
2025-12-05 3:38 ` Alison Schofield
2025-12-15 12:15 ` Jonathan Cameron
2025-12-04 2:21 ` [PATCH 6/6] cxl/mem: Introduce a memdev creation ->probe() operation Dan Williams
2025-12-04 19:10 ` Cheatham, Benjamin
2025-12-04 21:11 ` dan.j.williams
2025-12-04 22:02 ` dan.j.williams
2025-12-04 22:15 ` Cheatham, Benjamin
2025-12-04 20:03 ` Dave Jiang
2025-12-05 15:15 ` [PATCH 0/6] cxl: Initialization reworks in support Soft Reserve Recovery and Accelerator Memory Alejandro Lucero Palau
2025-12-05 21:17 ` dan.j.williams
2025-12-08 14:04 ` Alejandro Lucero Palau
2025-12-09 7:53 ` dan.j.williams
2025-12-08 17:04 ` Alejandro Lucero Palau
2025-12-15 23:29 ` dan.j.williams
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