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From: Jonathan Cameron <jonathan.cameron@huawei.com>
To: Neeraj Kumar <s.neeraj@samsung.com>
Cc: <linux-cxl@vger.kernel.org>, <nvdimm@lists.linux.dev>,
	<linux-kernel@vger.kernel.org>, <gost.dev@samsung.com>,
	<a.manzanares@samsung.com>, <vishak.g@samsung.com>,
	<neeraj.kernel@gmail.com>
Subject: Re: [PATCH V4 11/17] cxl/region: Add devm_cxl_pmem_add_region() for pmem region creation
Date: Wed, 17 Dec 2025 15:28:56 +0000	[thread overview]
Message-ID: <20251217152856.00003c17@huawei.com> (raw)
In-Reply-To: <20251119075255.2637388-12-s.neeraj@samsung.com>

On Wed, 19 Nov 2025 13:22:49 +0530
Neeraj Kumar <s.neeraj@samsung.com> wrote:

> devm_cxl_pmem_add_region() is used to create cxl region based on region
> information scanned from LSA.
> 
> devm_cxl_add_region() is used to just allocate cxlr and its fields are
> filled later by userspace tool using device attributes (*_store()).
> 
> Inspiration for devm_cxl_pmem_add_region() is taken from these device
> attributes (_store*) calls. It allocates cxlr and fills information
> parsed from LSA and calls device_add(&cxlr->dev) to initiate further
> region creation porbes
> 
> Rename __create_region() to cxl_create_region(), which will be used
> in later patch to create cxl region after fetching region information
> from LSA.
> 
> Signed-off-by: Neeraj Kumar <s.neeraj@samsung.com>

I think there is an underflow of the device reference count in an error
path. See below.  

Jonathan

> +static struct cxl_region *
> +devm_cxl_pmem_add_region(struct cxl_root_decoder *cxlrd, int id,
> +			 struct cxl_pmem_region_params *params,
> +			 struct cxl_decoder *cxld,
> +			 enum cxl_decoder_type type)
> +{
> +	struct cxl_endpoint_decoder *cxled;
> +	struct cxl_region_params *p;
> +	struct cxl_port *root_port;
> +	struct device *dev;
> +	int rc;
> +
> +	struct cxl_region *cxlr __free(put_cxl_region) =
> +		cxl_region_alloc(cxlrd, id);
It can be tricky to get the use of __free() when related
to devices that are being registered right.  I'm not sure it
is quite correct here.

> +	if (IS_ERR(cxlr))
> +		return cxlr;
> +
> +	cxlr->mode = CXL_PARTMODE_PMEM;
> +	cxlr->type = type;
> +
> +	dev = &cxlr->dev;
> +	rc = dev_set_name(dev, "region%d", id);
> +	if (rc)
> +		return ERR_PTR(rc);
> +
> +	p = &cxlr->params;
> +	p->uuid = params->uuid;
> +	p->interleave_ways = params->nlabel;
> +	p->interleave_granularity = params->ig;
> +
> +	rc = alloc_region_hpa(cxlr, params->rawsize);
> +	if (rc)
> +		return ERR_PTR(rc);
> +
> +	cxled = to_cxl_endpoint_decoder(&cxld->dev);
> +
> +	rc = cxl_dpa_set_part(cxled, CXL_PARTMODE_PMEM);
> +	if (rc)
> +		return ERR_PTR(rc);
> +
> +	rc = alloc_region_dpa(cxled, params->rawsize);
> +	if (rc)
> +		return ERR_PTR(rc);
> +
> +	/*
> +	 * TODO: Currently we have support of interleave_way == 1, where
> +	 * we can only have one region per mem device. It means mem device
> +	 * position (params->position) will always be 0. It is therefore
> +	 * attaching only one target at params->position
> +	 */
> +	if (params->position)
> +		return ERR_PTR(-EOPNOTSUPP);
> +
> +	rc = attach_target(cxlr, cxled, params->position, TASK_INTERRUPTIBLE);
> +	if (rc)
> +		return ERR_PTR(rc);
> +
> +	rc = __commit(cxlr);
> +	if (rc)
> +		return ERR_PTR(rc);
> +
> +	rc = device_add(dev);
> +	if (rc)
> +		return ERR_PTR(rc);
> +
> +	root_port = to_cxl_port(cxlrd->cxlsd.cxld.dev.parent);
> +	rc = devm_add_action_or_reset(root_port->uport_dev,
> +			unregister_region, cxlr);
> +	if (rc)
In this path the __free(put_cxl_region) will put once.
The unregister_region will both unregister and put.  The
dev_add_action_or_reset() will have called unregister_region()
Which does both device_del() and a put on cxlr->dev. 

I might have missed another reference but at first glance at least
this underflows.

Note the different error path for the devm_add_action_or_reset
in current devm_cxl_add_region() which is there because there isn't
another reference count to decrement.

Various ways to solve this.  A common one is to separate the
allocation and adding stuff into another function (with __free as
you have here) and call that from here, leaving this outer wrapper
just doing the devm_add_action_or_reset() if everything else
has succeeded and hence no need for the outer function to do any
other reference coutn handling.  Or just don't use __free() as
is done in devm_cxl_add_region()


> +		return ERR_PTR(rc);
> +
> +	dev_dbg(root_port->uport_dev, "%s: created %s\n",
> +		dev_name(&cxlrd->cxlsd.cxld.dev), dev_name(dev));
> +
> +	return no_free_ptr(cxlr);
> +}


  parent reply	other threads:[~2025-12-17 15:29 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20251119075306epcas5p22a87515de65a3c668275b394cdea83b0@epcas5p2.samsung.com>
2025-11-19  7:52 ` [PATCH V4 00/17] Add CXL LSA 2.1 format support in nvdimm and cxl pmem Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 01/17] nvdimm/label: Introduce NDD_REGION_LABELING flag to set region label Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 02/17] nvdimm/label: CXL labels skip the need for 'interleave-set cookie' Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 03/17] nvdimm/label: Add namespace/region label support as per LSA 2.1 Neeraj Kumar
2025-11-19 15:51     ` Dave Jiang
2026-01-09 11:46       ` Neeraj Kumar
2025-12-17 14:31     ` Jonathan Cameron
2026-01-09 11:51       ` Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 04/17] nvdimm/label: Include region label in slot validation Neeraj Kumar
2025-11-19 16:54     ` Dave Jiang
2025-11-19  7:52   ` [PATCH V4 05/17] nvdimm/label: Skip region label during ns label DPA reservation Neeraj Kumar
2025-11-19 17:01     ` Dave Jiang
2025-12-17 14:33     ` Jonathan Cameron
2026-01-09 11:53       ` Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 06/17] nvdimm/label: Preserve region label during namespace creation Neeraj Kumar
2025-11-19 18:07     ` Dave Jiang
2025-11-19  7:52   ` [PATCH V4 07/17] nvdimm/label: Add region label delete support Neeraj Kumar
2025-11-19 19:50     ` Dave Jiang
2026-01-09 11:56       ` Neeraj Kumar
2025-12-17 15:05     ` Jonathan Cameron
2026-01-09 11:58       ` Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 08/17] nvdimm/label: Preserve cxl region information from region label Neeraj Kumar
2025-11-19 20:13     ` Dave Jiang
2026-01-09 12:03       ` Neeraj Kumar
2025-12-17 15:09     ` Jonathan Cameron
2026-01-09 12:06       ` Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 09/17] nvdimm/label: Export routine to fetch region information Neeraj Kumar
2025-11-19 20:18     ` Dave Jiang
2025-12-17 15:12     ` Jonathan Cameron
2026-01-09 12:09       ` Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 10/17] cxl/mem: Refactor cxl pmem region auto-assembling Neeraj Kumar
2025-11-19 20:44     ` Dave Jiang
2026-01-09 12:10       ` Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 11/17] cxl/region: Add devm_cxl_pmem_add_region() for pmem region creation Neeraj Kumar
2025-11-19 21:33     ` Dave Jiang
2026-01-09 12:13       ` Neeraj Kumar
2025-12-17 15:28     ` Jonathan Cameron [this message]
2026-01-09 12:22       ` Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 12/17] cxl/pmem: Preserve region information into nd_set Neeraj Kumar
2025-11-19 22:00     ` Dave Jiang
2025-11-19  7:52   ` [PATCH V4 13/17] cxl/pmem_region: Prep patch to accommodate pmem_region attributes Neeraj Kumar
2025-11-19 22:08     ` Dave Jiang
2025-12-17 15:35     ` Jonathan Cameron
2026-01-09 12:26       ` Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 14/17] cxl/pmem_region: Introduce CONFIG_CXL_PMEM_REGION for core/pmem_region.c Neeraj Kumar
2025-11-19 22:24     ` Dave Jiang
2025-12-17 15:38     ` Jonathan Cameron
2026-01-09 12:29       ` Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 15/17] cxl/pmem_region: Add sysfs attribute cxl region label updation/deletion Neeraj Kumar
2025-11-19 23:10     ` Dave Jiang
2026-01-09 12:31       ` Neeraj Kumar
2025-12-17 15:40     ` Jonathan Cameron
2026-01-09 12:32       ` Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 16/17] cxl/pmem_region: Create pmem region using information parsed from LSA Neeraj Kumar
2025-11-19 23:37     ` Dave Jiang
2026-01-09 12:37       ` Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 17/17] cxl/pmem: Add CXL LSA 2.1 support in cxl pmem Neeraj Kumar
2025-11-19 23:37     ` Dave Jiang

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