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From: Dave Jiang <dave.jiang@intel.com>
To: Neeraj Kumar <s.neeraj@samsung.com>,
	linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev,
	linux-kernel@vger.kernel.org, gost.dev@samsung.com
Cc: a.manzanares@samsung.com, vishak.g@samsung.com, neeraj.kernel@gmail.com
Subject: Re: [PATCH V4 10/17] cxl/mem: Refactor cxl pmem region auto-assembling
Date: Wed, 19 Nov 2025 13:44:54 -0700	[thread overview]
Message-ID: <48855612-3643-4d91-84aa-784cbc3fd593@intel.com> (raw)
In-Reply-To: <20251119075255.2637388-11-s.neeraj@samsung.com>



On 11/19/25 12:52 AM, Neeraj Kumar wrote:
> In 84ec985944ef3, devm_cxl_add_nvdimm() sequence was changed and called
> before devm_cxl_add_endpoint(). It's because cxl pmem region auto-assembly
> used to get called at last in cxl_endpoint_port_probe(), which requires
> cxl_nvd presence.
> 
> For cxl region persistency, region creation happens during nvdimm_probe
> which need the completion of endpoint probe.
> 
> In order to accommodate both cxl pmem region auto-assembly and cxl region
> persistency, refactored following
> 
> 1. Re-Sequence devm_cxl_add_nvdimm() after devm_cxl_add_endpoint(). This
>    will be called only after successful completion of endpoint probe.
> 
> 2. Create cxl_region_discovery() which performs pmem region
>    auto-assembly and remove cxl pmem region auto-assembly from
>    cxl_endpoint_port_probe()
> 
> 3. Register cxl_region_discovery() with devm_cxl_add_memdev() which gets
>    called during cxl_pci_probe() in context of cxl_mem_probe()
> 
> 4. As cxlmd->ops->probe() calls registered cxl_region_discovery(), so
>    move devm_cxl_add_nvdimm() before cxlmd->ops->probe(). It gurantees

s/gurantees/guarantees/

>    both the completion of endpoint probe and cxl_nvd presence before
>    calling cxlmd->ops->probe().
> 
> Signed-off-by: Neeraj Kumar <s.neeraj@samsung.com>

Reviewed-by: Dave Jiang <dave.jiang@intel.com>

> ---
>  drivers/cxl/core/region.c | 37 +++++++++++++++++++++++++++++++++++++
>  drivers/cxl/cxl.h         |  5 +++++
>  drivers/cxl/mem.c         | 18 +++++++++---------
>  drivers/cxl/pci.c         |  4 +++-
>  drivers/cxl/port.c        | 39 +--------------------------------------
>  5 files changed, 55 insertions(+), 48 deletions(-)
> 
> diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
> index 2cf5b29cefd2..3c868c4de4ec 100644
> --- a/drivers/cxl/core/region.c
> +++ b/drivers/cxl/core/region.c
> @@ -3724,6 +3724,43 @@ int cxl_add_to_region(struct cxl_endpoint_decoder *cxled)
>  }
>  EXPORT_SYMBOL_NS_GPL(cxl_add_to_region, "CXL");
>  
> +static int discover_region(struct device *dev, void *unused)
> +{
> +	struct cxl_endpoint_decoder *cxled;
> +	int rc;
> +
> +	if (!is_endpoint_decoder(dev))
> +		return 0;
> +
> +	cxled = to_cxl_endpoint_decoder(dev);
> +	if ((cxled->cxld.flags & CXL_DECODER_F_ENABLE) == 0)
> +		return 0;
> +
> +	if (cxled->state != CXL_DECODER_STATE_AUTO)
> +		return 0;
> +
> +	/*
> +	 * Region enumeration is opportunistic, if this add-event fails,
> +	 * continue to the next endpoint decoder.
> +	 */
> +	rc = cxl_add_to_region(cxled);
> +	if (rc)
> +		dev_dbg(dev, "failed to add to region: %#llx-%#llx\n",
> +			cxled->cxld.hpa_range.start, cxled->cxld.hpa_range.end);
> +
> +	return 0;
> +}
> +
> +int cxl_region_discovery(struct cxl_memdev *cxlmd)
> +{
> +	struct cxl_port *port = cxlmd->endpoint;
> +
> +	device_for_each_child(&port->dev, NULL, discover_region);
> +
> +	return 0;
> +}
> +EXPORT_SYMBOL_NS_GPL(cxl_region_discovery, "CXL");
> +
>  u64 cxl_port_get_spa_cache_alias(struct cxl_port *endpoint, u64 spa)
>  {
>  	struct cxl_region_ref *iter;
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index ba17fa86d249..684a0d1b441a 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -904,6 +904,7 @@ struct cxl_pmem_region *to_cxl_pmem_region(struct device *dev);
>  int cxl_add_to_region(struct cxl_endpoint_decoder *cxled);
>  struct cxl_dax_region *to_cxl_dax_region(struct device *dev);
>  u64 cxl_port_get_spa_cache_alias(struct cxl_port *endpoint, u64 spa);
> +int cxl_region_discovery(struct cxl_memdev *cxlmd);
>  #else
>  static inline bool is_cxl_pmem_region(struct device *dev)
>  {
> @@ -926,6 +927,10 @@ static inline u64 cxl_port_get_spa_cache_alias(struct cxl_port *endpoint,
>  {
>  	return 0;
>  }
> +static inline int cxl_region_discovery(struct cxl_memdev *cxlmd)
> +{
> +	return 0;
> +}
>  #endif
>  
>  void cxl_endpoint_parse_cdat(struct cxl_port *port);
> diff --git a/drivers/cxl/mem.c b/drivers/cxl/mem.c
> index 13d9e089ecaf..f5e3e2fca86c 100644
> --- a/drivers/cxl/mem.c
> +++ b/drivers/cxl/mem.c
> @@ -115,15 +115,6 @@ static int cxl_mem_probe(struct device *dev)
>  		return -ENXIO;
>  	}
>  
> -	if (cxl_pmem_size(cxlds) && IS_ENABLED(CONFIG_CXL_PMEM)) {
> -		rc = devm_cxl_add_nvdimm(parent_port, cxlmd);
> -		if (rc) {
> -			if (rc == -ENODEV)
> -				dev_info(dev, "PMEM disabled by platform\n");
> -			return rc;
> -		}
> -	}
> -
>  	if (dport->rch)
>  		endpoint_parent = parent_port->uport_dev;
>  	else
> @@ -143,6 +134,15 @@ static int cxl_mem_probe(struct device *dev)
>  			return rc;
>  	}
>  
> +	if (cxl_pmem_size(cxlds) && IS_ENABLED(CONFIG_CXL_PMEM)) {
> +		rc = devm_cxl_add_nvdimm(parent_port, cxlmd);
> +		if (rc) {
> +			if (rc == -ENODEV)
> +				dev_info(dev, "PMEM disabled by platform\n");
> +			return rc;
> +		}
> +	}
> +
>  	if (cxlmd->ops) {
>  		rc = cxlmd->ops->probe(cxlmd);
>  		if (rc)
> diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
> index e21051d79b25..d56fdfe4b43b 100644
> --- a/drivers/cxl/pci.c
> +++ b/drivers/cxl/pci.c
> @@ -907,6 +907,7 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
>  	struct cxl_memdev_state *mds;
>  	struct cxl_dev_state *cxlds;
>  	struct cxl_register_map map;
> +	struct cxl_memdev_ops ops;
>  	struct cxl_memdev *cxlmd;
>  	int rc, pmu_count;
>  	unsigned int i;
> @@ -1006,7 +1007,8 @@ static int cxl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
>  	if (rc)
>  		dev_dbg(&pdev->dev, "No CXL Features discovered\n");
>  
> -	cxlmd = devm_cxl_add_memdev(&pdev->dev, cxlds, NULL);
> +	ops.probe = cxl_region_discovery;
> +	cxlmd = devm_cxl_add_memdev(&pdev->dev, cxlds, &ops);
>  	if (IS_ERR(cxlmd))
>  		return PTR_ERR(cxlmd);
>  
> diff --git a/drivers/cxl/port.c b/drivers/cxl/port.c
> index d5fd0c5ae49b..ad98b2881fed 100644
> --- a/drivers/cxl/port.c
> +++ b/drivers/cxl/port.c
> @@ -31,33 +31,6 @@ static void schedule_detach(void *cxlmd)
>  	schedule_cxl_memdev_detach(cxlmd);
>  }
>  
> -static int discover_region(struct device *dev, void *unused)
> -{
> -	struct cxl_endpoint_decoder *cxled;
> -	int rc;
> -
> -	if (!is_endpoint_decoder(dev))
> -		return 0;
> -
> -	cxled = to_cxl_endpoint_decoder(dev);
> -	if ((cxled->cxld.flags & CXL_DECODER_F_ENABLE) == 0)
> -		return 0;
> -
> -	if (cxled->state != CXL_DECODER_STATE_AUTO)
> -		return 0;
> -
> -	/*
> -	 * Region enumeration is opportunistic, if this add-event fails,
> -	 * continue to the next endpoint decoder.
> -	 */
> -	rc = cxl_add_to_region(cxled);
> -	if (rc)
> -		dev_dbg(dev, "failed to add to region: %#llx-%#llx\n",
> -			cxled->cxld.hpa_range.start, cxled->cxld.hpa_range.end);
> -
> -	return 0;
> -}
> -
>  static int cxl_switch_port_probe(struct cxl_port *port)
>  {
>  	/* Reset nr_dports for rebind of driver */
> @@ -83,17 +56,7 @@ static int cxl_endpoint_port_probe(struct cxl_port *port)
>  	if (rc)
>  		return rc;
>  
> -	rc = devm_cxl_endpoint_decoders_setup(port);
> -	if (rc)
> -		return rc;
> -
> -	/*
> -	 * Now that all endpoint decoders are successfully enumerated, try to
> -	 * assemble regions from committed decoders
> -	 */
> -	device_for_each_child(&port->dev, NULL, discover_region);
> -
> -	return 0;
> +	return devm_cxl_endpoint_decoders_setup(port);
>  }
>  
>  static int cxl_port_probe(struct device *dev)


  reply	other threads:[~2025-11-19 20:44 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20251119075306epcas5p22a87515de65a3c668275b394cdea83b0@epcas5p2.samsung.com>
2025-11-19  7:52 ` [PATCH V4 00/17] Add CXL LSA 2.1 format support in nvdimm and cxl pmem Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 01/17] nvdimm/label: Introduce NDD_REGION_LABELING flag to set region label Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 02/17] nvdimm/label: CXL labels skip the need for 'interleave-set cookie' Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 03/17] nvdimm/label: Add namespace/region label support as per LSA 2.1 Neeraj Kumar
2025-11-19 15:51     ` Dave Jiang
2026-01-09 11:46       ` Neeraj Kumar
2025-12-17 14:31     ` Jonathan Cameron
2026-01-09 11:51       ` Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 04/17] nvdimm/label: Include region label in slot validation Neeraj Kumar
2025-11-19 16:54     ` Dave Jiang
2025-11-19  7:52   ` [PATCH V4 05/17] nvdimm/label: Skip region label during ns label DPA reservation Neeraj Kumar
2025-11-19 17:01     ` Dave Jiang
2025-12-17 14:33     ` Jonathan Cameron
2026-01-09 11:53       ` Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 06/17] nvdimm/label: Preserve region label during namespace creation Neeraj Kumar
2025-11-19 18:07     ` Dave Jiang
2025-11-19  7:52   ` [PATCH V4 07/17] nvdimm/label: Add region label delete support Neeraj Kumar
2025-11-19 19:50     ` Dave Jiang
2026-01-09 11:56       ` Neeraj Kumar
2025-12-17 15:05     ` Jonathan Cameron
2026-01-09 11:58       ` Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 08/17] nvdimm/label: Preserve cxl region information from region label Neeraj Kumar
2025-11-19 20:13     ` Dave Jiang
2026-01-09 12:03       ` Neeraj Kumar
2025-12-17 15:09     ` Jonathan Cameron
2026-01-09 12:06       ` Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 09/17] nvdimm/label: Export routine to fetch region information Neeraj Kumar
2025-11-19 20:18     ` Dave Jiang
2025-12-17 15:12     ` Jonathan Cameron
2026-01-09 12:09       ` Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 10/17] cxl/mem: Refactor cxl pmem region auto-assembling Neeraj Kumar
2025-11-19 20:44     ` Dave Jiang [this message]
2026-01-09 12:10       ` Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 11/17] cxl/region: Add devm_cxl_pmem_add_region() for pmem region creation Neeraj Kumar
2025-11-19 21:33     ` Dave Jiang
2026-01-09 12:13       ` Neeraj Kumar
2025-12-17 15:28     ` Jonathan Cameron
2026-01-09 12:22       ` Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 12/17] cxl/pmem: Preserve region information into nd_set Neeraj Kumar
2025-11-19 22:00     ` Dave Jiang
2025-11-19  7:52   ` [PATCH V4 13/17] cxl/pmem_region: Prep patch to accommodate pmem_region attributes Neeraj Kumar
2025-11-19 22:08     ` Dave Jiang
2025-12-17 15:35     ` Jonathan Cameron
2026-01-09 12:26       ` Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 14/17] cxl/pmem_region: Introduce CONFIG_CXL_PMEM_REGION for core/pmem_region.c Neeraj Kumar
2025-11-19 22:24     ` Dave Jiang
2025-12-17 15:38     ` Jonathan Cameron
2026-01-09 12:29       ` Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 15/17] cxl/pmem_region: Add sysfs attribute cxl region label updation/deletion Neeraj Kumar
2025-11-19 23:10     ` Dave Jiang
2026-01-09 12:31       ` Neeraj Kumar
2025-12-17 15:40     ` Jonathan Cameron
2026-01-09 12:32       ` Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 16/17] cxl/pmem_region: Create pmem region using information parsed from LSA Neeraj Kumar
2025-11-19 23:37     ` Dave Jiang
2026-01-09 12:37       ` Neeraj Kumar
2025-11-19  7:52   ` [PATCH V4 17/17] cxl/pmem: Add CXL LSA 2.1 support in cxl pmem Neeraj Kumar
2025-11-19 23:37     ` Dave Jiang

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