From: Subbaraya Sundeep <sbhatta@marvell.com>
To: Osose Itua <osose.itua@savoirfairelinux.com>
Cc: <netdev@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <michael.hennerich@analog.com>,
<jerome.oufella@savoirfairelinux.com>
Subject: Re: [PATCH v2 1/2] net: phy: adin: enable configuration of the LP Termination Register
Date: Tue, 23 Dec 2025 08:27:37 +0530 [thread overview]
Message-ID: <20251223025737.GA319469@kernel-ep2> (raw)
In-Reply-To: <20251222222210.3651577-2-osose.itua@savoirfairelinux.com>
Hi,
On 2025-12-23 at 03:51:04, Osose Itua (osose.itua@savoirfairelinux.com) wrote:
> The ADIN1200/ADIN1300 provide a control bit that selects between normal
> receive termination and the lowest common mode impedance for 100BASE-TX
> operation. This behavior is controlled through the Low Power Termination
> register (B_100_ZPTM_EN_DIMRX).
>
> Bit 0 of this register enables normal termination when set (this is the
> default), and selects the lowest common mode impedance when cleared.
>
> Signed-off-by: Osose Itua <osose.itua@savoirfairelinux.com>
> ---
> drivers/net/phy/adin.c | 34 ++++++++++++++++++++++++++++++++++
> 1 file changed, 34 insertions(+)
>
> diff --git a/drivers/net/phy/adin.c b/drivers/net/phy/adin.c
> index 7fa713ca8d45..e8b778cb191d 100644
> --- a/drivers/net/phy/adin.c
> +++ b/drivers/net/phy/adin.c
> @@ -4,6 +4,7 @@
> *
> * Copyright 2019 Analog Devices Inc.
> */
> +#include <cerrno>
> #include <linux/kernel.h>
> #include <linux/bitfield.h>
> #include <linux/delay.h>
> @@ -89,6 +90,9 @@
> #define ADIN1300_CLOCK_STOP_REG 0x9400
> #define ADIN1300_LPI_WAKE_ERR_CNT_REG 0xa000
>
> +#define ADIN1300_B_100_ZPTM_DIMRX 0xB685
> +#define ADIN1300_B_100_ZPTM_EN_DIMRX BIT(0)
> +
> #define ADIN1300_CDIAG_RUN 0xba1b
> #define ADIN1300_CDIAG_RUN_EN BIT(0)
>
> @@ -522,6 +526,32 @@ static int adin_config_clk_out(struct phy_device *phydev)
> ADIN1300_GE_CLK_CFG_MASK, sel);
> }
>
> +static int adin_config_zptm100(struct phy_device *phydev)
> +{
> + struct device *dev = &phydev->mdio.dev;
> + int reg;
> + int rc;
> +
> + if (!(device_property_read_bool(dev, "adi,low-cmode-impedance")))
> + return 0;
> +
> + /* set to 0 to configure for lowest common-mode impedance */
> + rc = phy_write_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_B_100_ZPTM_DIMRX, 0x0);
This clears full register instead of just bit 0. Is that intended?
> + if (rc < 0)
> + return rc;
> +
> + reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_B_100_ZPTM_DIMRX);
> + if (reg < 0)
> + return reg;
> +
> + if (!(reg & ADIN1300_B_100_ZPTM_EN_DIMRX)) {
From commit description, check should be if (reg & ADIN1300_B_100_ZPTM_EN_DIMRX)
AI review also caught this:
https://netdev-ai.bots.linux.dev/ai-review.html?id=05b38bb2-1244-46fc-a4d9-311ca8c825ee#patch-0
Fix the build errors reported at:
https://patchwork.kernel.org/project/netdevbpf/patch/20251222222210.3651577-2-osose.itua@savoirfairelinux.com/
Also net-next is closed till Jan 2. Please post v3 after that.
Thanks,
Sundeep
> + phydev_err(phydev, "Failed to set lowest common-mode impedance.\n");
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> static int adin_config_init(struct phy_device *phydev)
> {
> int rc;
> @@ -548,6 +578,10 @@ static int adin_config_init(struct phy_device *phydev)
> if (rc < 0)
> return rc;
>
> + rc = adin_config_zptm100(phydev);
> + if (rc < 0)
> + return rc;
> +
> phydev_dbg(phydev, "PHY is using mode '%s'\n",
> phy_modes(phydev->interface));
>
next prev parent reply other threads:[~2025-12-23 2:57 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-22 22:21 [PATCH v2 0/2] net: phy: adin: enable configuration of the LP Termination Register Osose Itua
2025-12-22 22:21 ` [PATCH v2 1/2] " Osose Itua
2025-12-23 2:57 ` Subbaraya Sundeep [this message]
2025-12-23 7:36 ` Vadim Fedorenko
2025-12-23 9:36 ` Andrew Lunn
2026-01-07 10:18 ` Nuno Sá
2025-12-23 13:22 ` kernel test robot
2025-12-23 13:33 ` kernel test robot
2025-12-22 22:21 ` [PATCH v2 2/2] dt-bindings: net: adi,adin: document LP Termination property Osose Itua
2025-12-23 9:33 ` Andrew Lunn
2025-12-27 12:29 ` Krzysztof Kozlowski
2026-01-07 10:25 ` Nuno Sá
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