* [PATCH v1 0/3] Remove AST2700 A0 Settings
@ 2026-01-02 9:07 ` Jamin Lin via
0 siblings, 0 replies; 12+ messages in thread
From: Jamin Lin via @ 2026-01-02 9:07 UTC (permalink / raw)
To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Andrew Jeffery, Joel Stanley, open list:ASPEED BMCs,
open list:All patches CC here
Cc: jamin_lin, troy_lee, kane_chen
This patch series is based on legoater/qemu, branch aspeed-next.
https://github.com/legoater/qemu
v1:
1. Remove SSP NVIC 128 to 138 for AST2700 A0
2. Remove TSP NVIC 128 to 138 for AST2700 A0
3. Fix wrong I2CC_DMA_LEN when I2CM_DMA_TX/RX_ADDR set first
Jamin Lin (3):
hw/intc/aspeed: Remove SSP 128 - 138
hw/intc/aspeed: Remove TSP 128 - 138
hw/i2c/aspeed: Fix wrong I2CC_DMA_LEN when I2CM_DMA_TX/RX_ADDR set
first
hw/arm/aspeed_ast27x0-ssp.c | 13 +----
hw/arm/aspeed_ast27x0-tsp.c | 13 +----
hw/i2c/aspeed_i2c.c | 10 ++--
hw/intc/aspeed_intc.c | 110 ++----------------------------------
4 files changed, 14 insertions(+), 132 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 12+ messages in thread* [PATCH v1 1/3] hw/intc/aspeed: Remove SSP 128 - 138
2026-01-02 9:07 ` Jamin Lin via
@ 2026-01-02 9:07 ` Jamin Lin via
-1 siblings, 0 replies; 12+ messages in thread
From: Jamin Lin via @ 2026-01-02 9:07 UTC (permalink / raw)
To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Andrew Jeffery, Joel Stanley, open list:ASPEED BMCs,
open list:All patches CC here
Cc: jamin_lin, troy_lee, kane_chen
The SSP interrupts 128 - 138 were only used by the AST2700 A0 SoC.
Since the AST2700 A0 has been deprecated, these interrupt
definitions are no longer needed. This commit removes them to
clean up the codebase.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/arm/aspeed_ast27x0-ssp.c | 13 ++-------
hw/intc/aspeed_intc.c | 55 ++-----------------------------------
2 files changed, 4 insertions(+), 64 deletions(-)
diff --git a/hw/arm/aspeed_ast27x0-ssp.c b/hw/arm/aspeed_ast27x0-ssp.c
index 04d3705659..cee937b37e 100644
--- a/hw/arm/aspeed_ast27x0-ssp.c
+++ b/hw/arm/aspeed_ast27x0-ssp.c
@@ -62,7 +62,7 @@ static const int aspeed_soc_ast27x0ssp_irqmap[] = {
};
/* SSPINT 164 */
-static const int ast2700_ssp132_ssp164_intcmap[] = {
+static const int ast2700_ssp164_intcmap[] = {
[ASPEED_DEV_UART0] = 7,
[ASPEED_DEV_UART1] = 8,
[ASPEED_DEV_UART2] = 9,
@@ -89,21 +89,12 @@ static struct nvic_intc_irq_info ast2700_ssp_intcmap[] = {
{161, 1, 1, NULL},
{162, 1, 2, NULL},
{163, 1, 3, NULL},
- {164, 1, 4, ast2700_ssp132_ssp164_intcmap},
+ {164, 1, 4, ast2700_ssp164_intcmap},
{165, 1, 5, NULL},
{166, 1, 6, NULL},
{167, 1, 7, NULL},
{168, 1, 8, NULL},
{169, 1, 9, NULL},
- {128, 0, 1, NULL},
- {129, 0, 2, NULL},
- {130, 0, 3, NULL},
- {131, 0, 4, NULL},
- {132, 0, 5, ast2700_ssp132_ssp164_intcmap},
- {133, 0, 6, NULL},
- {134, 0, 7, NULL},
- {135, 0, 8, NULL},
- {136, 0, 9, NULL},
};
static qemu_irq aspeed_soc_ast27x0ssp_get_irq(AspeedCoprocessorState *s,
diff --git a/hw/intc/aspeed_intc.c b/hw/intc/aspeed_intc.c
index 606bde65bb..305458d6d4 100644
--- a/hw/intc/aspeed_intc.c
+++ b/hw/intc/aspeed_intc.c
@@ -47,28 +47,6 @@ REG32(GICINT197_STATUS, 0x54)
/*
* SSP INTC Registers
*/
-REG32(SSPINT128_EN, 0x2000)
-REG32(SSPINT128_STATUS, 0x2004)
-REG32(SSPINT129_EN, 0x2100)
-REG32(SSPINT129_STATUS, 0x2104)
-REG32(SSPINT130_EN, 0x2200)
-REG32(SSPINT130_STATUS, 0x2204)
-REG32(SSPINT131_EN, 0x2300)
-REG32(SSPINT131_STATUS, 0x2304)
-REG32(SSPINT132_EN, 0x2400)
-REG32(SSPINT132_STATUS, 0x2404)
-REG32(SSPINT133_EN, 0x2500)
-REG32(SSPINT133_STATUS, 0x2504)
-REG32(SSPINT134_EN, 0x2600)
-REG32(SSPINT134_STATUS, 0x2604)
-REG32(SSPINT135_EN, 0x2700)
-REG32(SSPINT135_STATUS, 0x2704)
-REG32(SSPINT136_EN, 0x2800)
-REG32(SSPINT136_STATUS, 0x2804)
-REG32(SSPINT137_EN, 0x2900)
-REG32(SSPINT137_STATUS, 0x2904)
-REG32(SSPINT138_EN, 0x2A00)
-REG32(SSPINT138_STATUS, 0x2A04)
REG32(SSPINT160_169_EN, 0x2B00)
REG32(SSPINT160_169_STATUS, 0x2B04)
@@ -511,29 +489,9 @@ static void aspeed_ssp_intc_write(void *opaque, hwaddr offset, uint64_t data,
trace_aspeed_intc_write(name, offset, size, data);
switch (reg) {
- case R_SSPINT128_EN:
- case R_SSPINT129_EN:
- case R_SSPINT130_EN:
- case R_SSPINT131_EN:
- case R_SSPINT132_EN:
- case R_SSPINT133_EN:
- case R_SSPINT134_EN:
- case R_SSPINT135_EN:
- case R_SSPINT136_EN:
case R_SSPINT160_169_EN:
aspeed_intc_enable_handler(s, offset, data);
break;
- case R_SSPINT128_STATUS:
- case R_SSPINT129_STATUS:
- case R_SSPINT130_STATUS:
- case R_SSPINT131_STATUS:
- case R_SSPINT132_STATUS:
- case R_SSPINT133_STATUS:
- case R_SSPINT134_STATUS:
- case R_SSPINT135_STATUS:
- case R_SSPINT136_STATUS:
- aspeed_intc_status_handler(s, offset, data);
- break;
case R_SSPINT160_169_STATUS:
aspeed_intc_status_handler_multi_outpins(s, offset, data);
break;
@@ -911,15 +869,6 @@ static const TypeInfo aspeed_2700_intcio_info = {
static AspeedINTCIRQ aspeed_2700ssp_intc_irqs[ASPEED_INTC_MAX_INPINS] = {
{0, 0, 10, R_SSPINT160_169_EN, R_SSPINT160_169_STATUS},
- {1, 10, 1, R_SSPINT128_EN, R_SSPINT128_STATUS},
- {2, 11, 1, R_SSPINT129_EN, R_SSPINT129_STATUS},
- {3, 12, 1, R_SSPINT130_EN, R_SSPINT130_STATUS},
- {4, 13, 1, R_SSPINT131_EN, R_SSPINT131_STATUS},
- {5, 14, 1, R_SSPINT132_EN, R_SSPINT132_STATUS},
- {6, 15, 1, R_SSPINT133_EN, R_SSPINT133_STATUS},
- {7, 16, 1, R_SSPINT134_EN, R_SSPINT134_STATUS},
- {8, 17, 1, R_SSPINT135_EN, R_SSPINT135_STATUS},
- {9, 18, 1, R_SSPINT136_EN, R_SSPINT136_STATUS},
};
static void aspeed_2700ssp_intc_class_init(ObjectClass *klass, const void *data)
@@ -929,8 +878,8 @@ static void aspeed_2700ssp_intc_class_init(ObjectClass *klass, const void *data)
dc->desc = "ASPEED 2700 SSP INTC Controller";
aic->num_lines = 32;
- aic->num_inpins = 10;
- aic->num_outpins = 19;
+ aic->num_inpins = 1;
+ aic->num_outpins = 10;
aic->mem_size = 0x4000;
aic->nr_regs = 0x2B08 >> 2;
aic->reg_offset = 0x0;
--
2.43.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v1 1/3] hw/intc/aspeed: Remove SSP 128 - 138
@ 2026-01-02 9:07 ` Jamin Lin via
0 siblings, 0 replies; 12+ messages in thread
From: Jamin Lin via @ 2026-01-02 9:07 UTC (permalink / raw)
To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Andrew Jeffery, Joel Stanley, open list:ASPEED BMCs,
open list:All patches CC here
Cc: jamin_lin, troy_lee, kane_chen
The SSP interrupts 128 - 138 were only used by the AST2700 A0 SoC.
Since the AST2700 A0 has been deprecated, these interrupt
definitions are no longer needed. This commit removes them to
clean up the codebase.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/arm/aspeed_ast27x0-ssp.c | 13 ++-------
hw/intc/aspeed_intc.c | 55 ++-----------------------------------
2 files changed, 4 insertions(+), 64 deletions(-)
diff --git a/hw/arm/aspeed_ast27x0-ssp.c b/hw/arm/aspeed_ast27x0-ssp.c
index 04d3705659..cee937b37e 100644
--- a/hw/arm/aspeed_ast27x0-ssp.c
+++ b/hw/arm/aspeed_ast27x0-ssp.c
@@ -62,7 +62,7 @@ static const int aspeed_soc_ast27x0ssp_irqmap[] = {
};
/* SSPINT 164 */
-static const int ast2700_ssp132_ssp164_intcmap[] = {
+static const int ast2700_ssp164_intcmap[] = {
[ASPEED_DEV_UART0] = 7,
[ASPEED_DEV_UART1] = 8,
[ASPEED_DEV_UART2] = 9,
@@ -89,21 +89,12 @@ static struct nvic_intc_irq_info ast2700_ssp_intcmap[] = {
{161, 1, 1, NULL},
{162, 1, 2, NULL},
{163, 1, 3, NULL},
- {164, 1, 4, ast2700_ssp132_ssp164_intcmap},
+ {164, 1, 4, ast2700_ssp164_intcmap},
{165, 1, 5, NULL},
{166, 1, 6, NULL},
{167, 1, 7, NULL},
{168, 1, 8, NULL},
{169, 1, 9, NULL},
- {128, 0, 1, NULL},
- {129, 0, 2, NULL},
- {130, 0, 3, NULL},
- {131, 0, 4, NULL},
- {132, 0, 5, ast2700_ssp132_ssp164_intcmap},
- {133, 0, 6, NULL},
- {134, 0, 7, NULL},
- {135, 0, 8, NULL},
- {136, 0, 9, NULL},
};
static qemu_irq aspeed_soc_ast27x0ssp_get_irq(AspeedCoprocessorState *s,
diff --git a/hw/intc/aspeed_intc.c b/hw/intc/aspeed_intc.c
index 606bde65bb..305458d6d4 100644
--- a/hw/intc/aspeed_intc.c
+++ b/hw/intc/aspeed_intc.c
@@ -47,28 +47,6 @@ REG32(GICINT197_STATUS, 0x54)
/*
* SSP INTC Registers
*/
-REG32(SSPINT128_EN, 0x2000)
-REG32(SSPINT128_STATUS, 0x2004)
-REG32(SSPINT129_EN, 0x2100)
-REG32(SSPINT129_STATUS, 0x2104)
-REG32(SSPINT130_EN, 0x2200)
-REG32(SSPINT130_STATUS, 0x2204)
-REG32(SSPINT131_EN, 0x2300)
-REG32(SSPINT131_STATUS, 0x2304)
-REG32(SSPINT132_EN, 0x2400)
-REG32(SSPINT132_STATUS, 0x2404)
-REG32(SSPINT133_EN, 0x2500)
-REG32(SSPINT133_STATUS, 0x2504)
-REG32(SSPINT134_EN, 0x2600)
-REG32(SSPINT134_STATUS, 0x2604)
-REG32(SSPINT135_EN, 0x2700)
-REG32(SSPINT135_STATUS, 0x2704)
-REG32(SSPINT136_EN, 0x2800)
-REG32(SSPINT136_STATUS, 0x2804)
-REG32(SSPINT137_EN, 0x2900)
-REG32(SSPINT137_STATUS, 0x2904)
-REG32(SSPINT138_EN, 0x2A00)
-REG32(SSPINT138_STATUS, 0x2A04)
REG32(SSPINT160_169_EN, 0x2B00)
REG32(SSPINT160_169_STATUS, 0x2B04)
@@ -511,29 +489,9 @@ static void aspeed_ssp_intc_write(void *opaque, hwaddr offset, uint64_t data,
trace_aspeed_intc_write(name, offset, size, data);
switch (reg) {
- case R_SSPINT128_EN:
- case R_SSPINT129_EN:
- case R_SSPINT130_EN:
- case R_SSPINT131_EN:
- case R_SSPINT132_EN:
- case R_SSPINT133_EN:
- case R_SSPINT134_EN:
- case R_SSPINT135_EN:
- case R_SSPINT136_EN:
case R_SSPINT160_169_EN:
aspeed_intc_enable_handler(s, offset, data);
break;
- case R_SSPINT128_STATUS:
- case R_SSPINT129_STATUS:
- case R_SSPINT130_STATUS:
- case R_SSPINT131_STATUS:
- case R_SSPINT132_STATUS:
- case R_SSPINT133_STATUS:
- case R_SSPINT134_STATUS:
- case R_SSPINT135_STATUS:
- case R_SSPINT136_STATUS:
- aspeed_intc_status_handler(s, offset, data);
- break;
case R_SSPINT160_169_STATUS:
aspeed_intc_status_handler_multi_outpins(s, offset, data);
break;
@@ -911,15 +869,6 @@ static const TypeInfo aspeed_2700_intcio_info = {
static AspeedINTCIRQ aspeed_2700ssp_intc_irqs[ASPEED_INTC_MAX_INPINS] = {
{0, 0, 10, R_SSPINT160_169_EN, R_SSPINT160_169_STATUS},
- {1, 10, 1, R_SSPINT128_EN, R_SSPINT128_STATUS},
- {2, 11, 1, R_SSPINT129_EN, R_SSPINT129_STATUS},
- {3, 12, 1, R_SSPINT130_EN, R_SSPINT130_STATUS},
- {4, 13, 1, R_SSPINT131_EN, R_SSPINT131_STATUS},
- {5, 14, 1, R_SSPINT132_EN, R_SSPINT132_STATUS},
- {6, 15, 1, R_SSPINT133_EN, R_SSPINT133_STATUS},
- {7, 16, 1, R_SSPINT134_EN, R_SSPINT134_STATUS},
- {8, 17, 1, R_SSPINT135_EN, R_SSPINT135_STATUS},
- {9, 18, 1, R_SSPINT136_EN, R_SSPINT136_STATUS},
};
static void aspeed_2700ssp_intc_class_init(ObjectClass *klass, const void *data)
@@ -929,8 +878,8 @@ static void aspeed_2700ssp_intc_class_init(ObjectClass *klass, const void *data)
dc->desc = "ASPEED 2700 SSP INTC Controller";
aic->num_lines = 32;
- aic->num_inpins = 10;
- aic->num_outpins = 19;
+ aic->num_inpins = 1;
+ aic->num_outpins = 10;
aic->mem_size = 0x4000;
aic->nr_regs = 0x2B08 >> 2;
aic->reg_offset = 0x0;
--
2.43.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v1 1/3] hw/intc/aspeed: Remove SSP 128 - 138
2026-01-02 9:07 ` Jamin Lin via
(?)
@ 2026-01-02 13:28 ` Cédric Le Goater
-1 siblings, 0 replies; 12+ messages in thread
From: Cédric Le Goater @ 2026-01-02 13:28 UTC (permalink / raw)
To: Jamin Lin, Peter Maydell, Steven Lee, Troy Lee, Andrew Jeffery,
Joel Stanley, open list:ASPEED BMCs,
open list:All patches CC here
Cc: troy_lee, kane_chen
On 1/2/26 10:07, Jamin Lin wrote:
> The SSP interrupts 128 - 138 were only used by the AST2700 A0 SoC.
> Since the AST2700 A0 has been deprecated, these interrupt
> definitions are no longer needed. This commit removes them to
> clean up the codebase.
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Thanks,
C.
> ---
> hw/arm/aspeed_ast27x0-ssp.c | 13 ++-------
> hw/intc/aspeed_intc.c | 55 ++-----------------------------------
> 2 files changed, 4 insertions(+), 64 deletions(-)
>
> diff --git a/hw/arm/aspeed_ast27x0-ssp.c b/hw/arm/aspeed_ast27x0-ssp.c
> index 04d3705659..cee937b37e 100644
> --- a/hw/arm/aspeed_ast27x0-ssp.c
> +++ b/hw/arm/aspeed_ast27x0-ssp.c
> @@ -62,7 +62,7 @@ static const int aspeed_soc_ast27x0ssp_irqmap[] = {
> };
>
> /* SSPINT 164 */
> -static const int ast2700_ssp132_ssp164_intcmap[] = {
> +static const int ast2700_ssp164_intcmap[] = {
> [ASPEED_DEV_UART0] = 7,
> [ASPEED_DEV_UART1] = 8,
> [ASPEED_DEV_UART2] = 9,
> @@ -89,21 +89,12 @@ static struct nvic_intc_irq_info ast2700_ssp_intcmap[] = {
> {161, 1, 1, NULL},
> {162, 1, 2, NULL},
> {163, 1, 3, NULL},
> - {164, 1, 4, ast2700_ssp132_ssp164_intcmap},
> + {164, 1, 4, ast2700_ssp164_intcmap},
> {165, 1, 5, NULL},
> {166, 1, 6, NULL},
> {167, 1, 7, NULL},
> {168, 1, 8, NULL},
> {169, 1, 9, NULL},
> - {128, 0, 1, NULL},
> - {129, 0, 2, NULL},
> - {130, 0, 3, NULL},
> - {131, 0, 4, NULL},
> - {132, 0, 5, ast2700_ssp132_ssp164_intcmap},
> - {133, 0, 6, NULL},
> - {134, 0, 7, NULL},
> - {135, 0, 8, NULL},
> - {136, 0, 9, NULL},
> };
>
> static qemu_irq aspeed_soc_ast27x0ssp_get_irq(AspeedCoprocessorState *s,
> diff --git a/hw/intc/aspeed_intc.c b/hw/intc/aspeed_intc.c
> index 606bde65bb..305458d6d4 100644
> --- a/hw/intc/aspeed_intc.c
> +++ b/hw/intc/aspeed_intc.c
> @@ -47,28 +47,6 @@ REG32(GICINT197_STATUS, 0x54)
> /*
> * SSP INTC Registers
> */
> -REG32(SSPINT128_EN, 0x2000)
> -REG32(SSPINT128_STATUS, 0x2004)
> -REG32(SSPINT129_EN, 0x2100)
> -REG32(SSPINT129_STATUS, 0x2104)
> -REG32(SSPINT130_EN, 0x2200)
> -REG32(SSPINT130_STATUS, 0x2204)
> -REG32(SSPINT131_EN, 0x2300)
> -REG32(SSPINT131_STATUS, 0x2304)
> -REG32(SSPINT132_EN, 0x2400)
> -REG32(SSPINT132_STATUS, 0x2404)
> -REG32(SSPINT133_EN, 0x2500)
> -REG32(SSPINT133_STATUS, 0x2504)
> -REG32(SSPINT134_EN, 0x2600)
> -REG32(SSPINT134_STATUS, 0x2604)
> -REG32(SSPINT135_EN, 0x2700)
> -REG32(SSPINT135_STATUS, 0x2704)
> -REG32(SSPINT136_EN, 0x2800)
> -REG32(SSPINT136_STATUS, 0x2804)
> -REG32(SSPINT137_EN, 0x2900)
> -REG32(SSPINT137_STATUS, 0x2904)
> -REG32(SSPINT138_EN, 0x2A00)
> -REG32(SSPINT138_STATUS, 0x2A04)
> REG32(SSPINT160_169_EN, 0x2B00)
> REG32(SSPINT160_169_STATUS, 0x2B04)
>
> @@ -511,29 +489,9 @@ static void aspeed_ssp_intc_write(void *opaque, hwaddr offset, uint64_t data,
> trace_aspeed_intc_write(name, offset, size, data);
>
> switch (reg) {
> - case R_SSPINT128_EN:
> - case R_SSPINT129_EN:
> - case R_SSPINT130_EN:
> - case R_SSPINT131_EN:
> - case R_SSPINT132_EN:
> - case R_SSPINT133_EN:
> - case R_SSPINT134_EN:
> - case R_SSPINT135_EN:
> - case R_SSPINT136_EN:
> case R_SSPINT160_169_EN:
> aspeed_intc_enable_handler(s, offset, data);
> break;
> - case R_SSPINT128_STATUS:
> - case R_SSPINT129_STATUS:
> - case R_SSPINT130_STATUS:
> - case R_SSPINT131_STATUS:
> - case R_SSPINT132_STATUS:
> - case R_SSPINT133_STATUS:
> - case R_SSPINT134_STATUS:
> - case R_SSPINT135_STATUS:
> - case R_SSPINT136_STATUS:
> - aspeed_intc_status_handler(s, offset, data);
> - break;
> case R_SSPINT160_169_STATUS:
> aspeed_intc_status_handler_multi_outpins(s, offset, data);
> break;
> @@ -911,15 +869,6 @@ static const TypeInfo aspeed_2700_intcio_info = {
>
> static AspeedINTCIRQ aspeed_2700ssp_intc_irqs[ASPEED_INTC_MAX_INPINS] = {
> {0, 0, 10, R_SSPINT160_169_EN, R_SSPINT160_169_STATUS},
> - {1, 10, 1, R_SSPINT128_EN, R_SSPINT128_STATUS},
> - {2, 11, 1, R_SSPINT129_EN, R_SSPINT129_STATUS},
> - {3, 12, 1, R_SSPINT130_EN, R_SSPINT130_STATUS},
> - {4, 13, 1, R_SSPINT131_EN, R_SSPINT131_STATUS},
> - {5, 14, 1, R_SSPINT132_EN, R_SSPINT132_STATUS},
> - {6, 15, 1, R_SSPINT133_EN, R_SSPINT133_STATUS},
> - {7, 16, 1, R_SSPINT134_EN, R_SSPINT134_STATUS},
> - {8, 17, 1, R_SSPINT135_EN, R_SSPINT135_STATUS},
> - {9, 18, 1, R_SSPINT136_EN, R_SSPINT136_STATUS},
> };
>
> static void aspeed_2700ssp_intc_class_init(ObjectClass *klass, const void *data)
> @@ -929,8 +878,8 @@ static void aspeed_2700ssp_intc_class_init(ObjectClass *klass, const void *data)
>
> dc->desc = "ASPEED 2700 SSP INTC Controller";
> aic->num_lines = 32;
> - aic->num_inpins = 10;
> - aic->num_outpins = 19;
> + aic->num_inpins = 1;
> + aic->num_outpins = 10;
> aic->mem_size = 0x4000;
> aic->nr_regs = 0x2B08 >> 2;
> aic->reg_offset = 0x0;
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v1 2/3] hw/intc/aspeed: Remove TSP 128 - 138
2026-01-02 9:07 ` Jamin Lin via
@ 2026-01-02 9:07 ` Jamin Lin via
-1 siblings, 0 replies; 12+ messages in thread
From: Jamin Lin via @ 2026-01-02 9:07 UTC (permalink / raw)
To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Andrew Jeffery, Joel Stanley, open list:ASPEED BMCs,
open list:All patches CC here
Cc: jamin_lin, troy_lee, kane_chen
The SSP interrupts 128 - 138 were only used by the AST2700 A0 SoC.
Since the AST2700 A0 has been deprecated, these interrupt
definitions are no longer needed. This commit removes them to
clean up the codebase.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/arm/aspeed_ast27x0-tsp.c | 13 ++-------
hw/intc/aspeed_intc.c | 55 ++-----------------------------------
2 files changed, 4 insertions(+), 64 deletions(-)
diff --git a/hw/arm/aspeed_ast27x0-tsp.c b/hw/arm/aspeed_ast27x0-tsp.c
index f40c70fea5..9c11c016ca 100644
--- a/hw/arm/aspeed_ast27x0-tsp.c
+++ b/hw/arm/aspeed_ast27x0-tsp.c
@@ -62,7 +62,7 @@ static const int aspeed_soc_ast27x0tsp_irqmap[] = {
};
/* TSPINT 164 */
-static const int ast2700_tsp132_tsp164_intcmap[] = {
+static const int ast2700_tsp164_intcmap[] = {
[ASPEED_DEV_UART0] = 7,
[ASPEED_DEV_UART1] = 8,
[ASPEED_DEV_UART2] = 9,
@@ -89,21 +89,12 @@ static struct nvic_intc_irq_info ast2700_tsp_intcmap[] = {
{161, 1, 1, NULL},
{162, 1, 2, NULL},
{163, 1, 3, NULL},
- {164, 1, 4, ast2700_tsp132_tsp164_intcmap},
+ {164, 1, 4, ast2700_tsp164_intcmap},
{165, 1, 5, NULL},
{166, 1, 6, NULL},
{167, 1, 7, NULL},
{168, 1, 8, NULL},
{169, 1, 9, NULL},
- {128, 0, 1, NULL},
- {129, 0, 2, NULL},
- {130, 0, 3, NULL},
- {131, 0, 4, NULL},
- {132, 0, 5, ast2700_tsp132_tsp164_intcmap},
- {133, 0, 6, NULL},
- {134, 0, 7, NULL},
- {135, 0, 8, NULL},
- {136, 0, 9, NULL},
};
static qemu_irq aspeed_soc_ast27x0tsp_get_irq(AspeedCoprocessorState *s,
diff --git a/hw/intc/aspeed_intc.c b/hw/intc/aspeed_intc.c
index 305458d6d4..1702cb87dc 100644
--- a/hw/intc/aspeed_intc.c
+++ b/hw/intc/aspeed_intc.c
@@ -69,28 +69,6 @@ REG32(SSPINT165_STATUS, 0x1D4)
/*
* TSP INTC Registers
*/
-REG32(TSPINT128_EN, 0x3000)
-REG32(TSPINT128_STATUS, 0x3004)
-REG32(TSPINT129_EN, 0x3100)
-REG32(TSPINT129_STATUS, 0x3104)
-REG32(TSPINT130_EN, 0x3200)
-REG32(TSPINT130_STATUS, 0x3204)
-REG32(TSPINT131_EN, 0x3300)
-REG32(TSPINT131_STATUS, 0x3304)
-REG32(TSPINT132_EN, 0x3400)
-REG32(TSPINT132_STATUS, 0x3404)
-REG32(TSPINT133_EN, 0x3500)
-REG32(TSPINT133_STATUS, 0x3504)
-REG32(TSPINT134_EN, 0x3600)
-REG32(TSPINT134_STATUS, 0x3604)
-REG32(TSPINT135_EN, 0x3700)
-REG32(TSPINT135_STATUS, 0x3704)
-REG32(TSPINT136_EN, 0x3800)
-REG32(TSPINT136_STATUS, 0x3804)
-REG32(TSPINT137_EN, 0x3900)
-REG32(TSPINT137_STATUS, 0x3904)
-REG32(TSPINT138_EN, 0x3A00)
-REG32(TSPINT138_STATUS, 0x3A04)
REG32(TSPINT160_169_EN, 0x3B00)
REG32(TSPINT160_169_STATUS, 0x3B04)
@@ -511,29 +489,9 @@ static void aspeed_tsp_intc_write(void *opaque, hwaddr offset, uint64_t data,
trace_aspeed_intc_write(name, offset, size, data);
switch (reg) {
- case R_TSPINT128_EN:
- case R_TSPINT129_EN:
- case R_TSPINT130_EN:
- case R_TSPINT131_EN:
- case R_TSPINT132_EN:
- case R_TSPINT133_EN:
- case R_TSPINT134_EN:
- case R_TSPINT135_EN:
- case R_TSPINT136_EN:
case R_TSPINT160_169_EN:
aspeed_intc_enable_handler(s, offset, data);
break;
- case R_TSPINT128_STATUS:
- case R_TSPINT129_STATUS:
- case R_TSPINT130_STATUS:
- case R_TSPINT131_STATUS:
- case R_TSPINT132_STATUS:
- case R_TSPINT133_STATUS:
- case R_TSPINT134_STATUS:
- case R_TSPINT135_STATUS:
- case R_TSPINT136_STATUS:
- aspeed_intc_status_handler(s, offset, data);
- break;
case R_TSPINT160_169_STATUS:
aspeed_intc_status_handler_multi_outpins(s, offset, data);
break;
@@ -929,15 +887,6 @@ static const TypeInfo aspeed_2700ssp_intcio_info = {
static AspeedINTCIRQ aspeed_2700tsp_intc_irqs[ASPEED_INTC_MAX_INPINS] = {
{0, 0, 10, R_TSPINT160_169_EN, R_TSPINT160_169_STATUS},
- {1, 10, 1, R_TSPINT128_EN, R_TSPINT128_STATUS},
- {2, 11, 1, R_TSPINT129_EN, R_TSPINT129_STATUS},
- {3, 12, 1, R_TSPINT130_EN, R_TSPINT130_STATUS},
- {4, 13, 1, R_TSPINT131_EN, R_TSPINT131_STATUS},
- {5, 14, 1, R_TSPINT132_EN, R_TSPINT132_STATUS},
- {6, 15, 1, R_TSPINT133_EN, R_TSPINT133_STATUS},
- {7, 16, 1, R_TSPINT134_EN, R_TSPINT134_STATUS},
- {8, 17, 1, R_TSPINT135_EN, R_TSPINT135_STATUS},
- {9, 18, 1, R_TSPINT136_EN, R_TSPINT136_STATUS},
};
static void aspeed_2700tsp_intc_class_init(ObjectClass *klass, const void *data)
@@ -947,8 +896,8 @@ static void aspeed_2700tsp_intc_class_init(ObjectClass *klass, const void *data)
dc->desc = "ASPEED 2700 TSP INTC Controller";
aic->num_lines = 32;
- aic->num_inpins = 10;
- aic->num_outpins = 19;
+ aic->num_inpins = 1;
+ aic->num_outpins = 10;
aic->mem_size = 0x4000;
aic->nr_regs = 0x3B08 >> 2;
aic->reg_offset = 0;
--
2.43.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v1 2/3] hw/intc/aspeed: Remove TSP 128 - 138
@ 2026-01-02 9:07 ` Jamin Lin via
0 siblings, 0 replies; 12+ messages in thread
From: Jamin Lin via @ 2026-01-02 9:07 UTC (permalink / raw)
To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Andrew Jeffery, Joel Stanley, open list:ASPEED BMCs,
open list:All patches CC here
Cc: jamin_lin, troy_lee, kane_chen
The SSP interrupts 128 - 138 were only used by the AST2700 A0 SoC.
Since the AST2700 A0 has been deprecated, these interrupt
definitions are no longer needed. This commit removes them to
clean up the codebase.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
hw/arm/aspeed_ast27x0-tsp.c | 13 ++-------
hw/intc/aspeed_intc.c | 55 ++-----------------------------------
2 files changed, 4 insertions(+), 64 deletions(-)
diff --git a/hw/arm/aspeed_ast27x0-tsp.c b/hw/arm/aspeed_ast27x0-tsp.c
index f40c70fea5..9c11c016ca 100644
--- a/hw/arm/aspeed_ast27x0-tsp.c
+++ b/hw/arm/aspeed_ast27x0-tsp.c
@@ -62,7 +62,7 @@ static const int aspeed_soc_ast27x0tsp_irqmap[] = {
};
/* TSPINT 164 */
-static const int ast2700_tsp132_tsp164_intcmap[] = {
+static const int ast2700_tsp164_intcmap[] = {
[ASPEED_DEV_UART0] = 7,
[ASPEED_DEV_UART1] = 8,
[ASPEED_DEV_UART2] = 9,
@@ -89,21 +89,12 @@ static struct nvic_intc_irq_info ast2700_tsp_intcmap[] = {
{161, 1, 1, NULL},
{162, 1, 2, NULL},
{163, 1, 3, NULL},
- {164, 1, 4, ast2700_tsp132_tsp164_intcmap},
+ {164, 1, 4, ast2700_tsp164_intcmap},
{165, 1, 5, NULL},
{166, 1, 6, NULL},
{167, 1, 7, NULL},
{168, 1, 8, NULL},
{169, 1, 9, NULL},
- {128, 0, 1, NULL},
- {129, 0, 2, NULL},
- {130, 0, 3, NULL},
- {131, 0, 4, NULL},
- {132, 0, 5, ast2700_tsp132_tsp164_intcmap},
- {133, 0, 6, NULL},
- {134, 0, 7, NULL},
- {135, 0, 8, NULL},
- {136, 0, 9, NULL},
};
static qemu_irq aspeed_soc_ast27x0tsp_get_irq(AspeedCoprocessorState *s,
diff --git a/hw/intc/aspeed_intc.c b/hw/intc/aspeed_intc.c
index 305458d6d4..1702cb87dc 100644
--- a/hw/intc/aspeed_intc.c
+++ b/hw/intc/aspeed_intc.c
@@ -69,28 +69,6 @@ REG32(SSPINT165_STATUS, 0x1D4)
/*
* TSP INTC Registers
*/
-REG32(TSPINT128_EN, 0x3000)
-REG32(TSPINT128_STATUS, 0x3004)
-REG32(TSPINT129_EN, 0x3100)
-REG32(TSPINT129_STATUS, 0x3104)
-REG32(TSPINT130_EN, 0x3200)
-REG32(TSPINT130_STATUS, 0x3204)
-REG32(TSPINT131_EN, 0x3300)
-REG32(TSPINT131_STATUS, 0x3304)
-REG32(TSPINT132_EN, 0x3400)
-REG32(TSPINT132_STATUS, 0x3404)
-REG32(TSPINT133_EN, 0x3500)
-REG32(TSPINT133_STATUS, 0x3504)
-REG32(TSPINT134_EN, 0x3600)
-REG32(TSPINT134_STATUS, 0x3604)
-REG32(TSPINT135_EN, 0x3700)
-REG32(TSPINT135_STATUS, 0x3704)
-REG32(TSPINT136_EN, 0x3800)
-REG32(TSPINT136_STATUS, 0x3804)
-REG32(TSPINT137_EN, 0x3900)
-REG32(TSPINT137_STATUS, 0x3904)
-REG32(TSPINT138_EN, 0x3A00)
-REG32(TSPINT138_STATUS, 0x3A04)
REG32(TSPINT160_169_EN, 0x3B00)
REG32(TSPINT160_169_STATUS, 0x3B04)
@@ -511,29 +489,9 @@ static void aspeed_tsp_intc_write(void *opaque, hwaddr offset, uint64_t data,
trace_aspeed_intc_write(name, offset, size, data);
switch (reg) {
- case R_TSPINT128_EN:
- case R_TSPINT129_EN:
- case R_TSPINT130_EN:
- case R_TSPINT131_EN:
- case R_TSPINT132_EN:
- case R_TSPINT133_EN:
- case R_TSPINT134_EN:
- case R_TSPINT135_EN:
- case R_TSPINT136_EN:
case R_TSPINT160_169_EN:
aspeed_intc_enable_handler(s, offset, data);
break;
- case R_TSPINT128_STATUS:
- case R_TSPINT129_STATUS:
- case R_TSPINT130_STATUS:
- case R_TSPINT131_STATUS:
- case R_TSPINT132_STATUS:
- case R_TSPINT133_STATUS:
- case R_TSPINT134_STATUS:
- case R_TSPINT135_STATUS:
- case R_TSPINT136_STATUS:
- aspeed_intc_status_handler(s, offset, data);
- break;
case R_TSPINT160_169_STATUS:
aspeed_intc_status_handler_multi_outpins(s, offset, data);
break;
@@ -929,15 +887,6 @@ static const TypeInfo aspeed_2700ssp_intcio_info = {
static AspeedINTCIRQ aspeed_2700tsp_intc_irqs[ASPEED_INTC_MAX_INPINS] = {
{0, 0, 10, R_TSPINT160_169_EN, R_TSPINT160_169_STATUS},
- {1, 10, 1, R_TSPINT128_EN, R_TSPINT128_STATUS},
- {2, 11, 1, R_TSPINT129_EN, R_TSPINT129_STATUS},
- {3, 12, 1, R_TSPINT130_EN, R_TSPINT130_STATUS},
- {4, 13, 1, R_TSPINT131_EN, R_TSPINT131_STATUS},
- {5, 14, 1, R_TSPINT132_EN, R_TSPINT132_STATUS},
- {6, 15, 1, R_TSPINT133_EN, R_TSPINT133_STATUS},
- {7, 16, 1, R_TSPINT134_EN, R_TSPINT134_STATUS},
- {8, 17, 1, R_TSPINT135_EN, R_TSPINT135_STATUS},
- {9, 18, 1, R_TSPINT136_EN, R_TSPINT136_STATUS},
};
static void aspeed_2700tsp_intc_class_init(ObjectClass *klass, const void *data)
@@ -947,8 +896,8 @@ static void aspeed_2700tsp_intc_class_init(ObjectClass *klass, const void *data)
dc->desc = "ASPEED 2700 TSP INTC Controller";
aic->num_lines = 32;
- aic->num_inpins = 10;
- aic->num_outpins = 19;
+ aic->num_inpins = 1;
+ aic->num_outpins = 10;
aic->mem_size = 0x4000;
aic->nr_regs = 0x3B08 >> 2;
aic->reg_offset = 0;
--
2.43.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v1 2/3] hw/intc/aspeed: Remove TSP 128 - 138
2026-01-02 9:07 ` Jamin Lin via
(?)
@ 2026-01-02 13:28 ` Cédric Le Goater
-1 siblings, 0 replies; 12+ messages in thread
From: Cédric Le Goater @ 2026-01-02 13:28 UTC (permalink / raw)
To: Jamin Lin, Peter Maydell, Steven Lee, Troy Lee, Andrew Jeffery,
Joel Stanley, open list:ASPEED BMCs,
open list:All patches CC here
Cc: troy_lee, kane_chen
On 1/2/26 10:07, Jamin Lin wrote:
> The SSP interrupts 128 - 138 were only used by the AST2700 A0 SoC.
> Since the AST2700 A0 has been deprecated, these interrupt
> definitions are no longer needed. This commit removes them to
> clean up the codebase.
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Thanks,
C.
> ---
> hw/arm/aspeed_ast27x0-tsp.c | 13 ++-------
> hw/intc/aspeed_intc.c | 55 ++-----------------------------------
> 2 files changed, 4 insertions(+), 64 deletions(-)
>
> diff --git a/hw/arm/aspeed_ast27x0-tsp.c b/hw/arm/aspeed_ast27x0-tsp.c
> index f40c70fea5..9c11c016ca 100644
> --- a/hw/arm/aspeed_ast27x0-tsp.c
> +++ b/hw/arm/aspeed_ast27x0-tsp.c
> @@ -62,7 +62,7 @@ static const int aspeed_soc_ast27x0tsp_irqmap[] = {
> };
>
> /* TSPINT 164 */
> -static const int ast2700_tsp132_tsp164_intcmap[] = {
> +static const int ast2700_tsp164_intcmap[] = {
> [ASPEED_DEV_UART0] = 7,
> [ASPEED_DEV_UART1] = 8,
> [ASPEED_DEV_UART2] = 9,
> @@ -89,21 +89,12 @@ static struct nvic_intc_irq_info ast2700_tsp_intcmap[] = {
> {161, 1, 1, NULL},
> {162, 1, 2, NULL},
> {163, 1, 3, NULL},
> - {164, 1, 4, ast2700_tsp132_tsp164_intcmap},
> + {164, 1, 4, ast2700_tsp164_intcmap},
> {165, 1, 5, NULL},
> {166, 1, 6, NULL},
> {167, 1, 7, NULL},
> {168, 1, 8, NULL},
> {169, 1, 9, NULL},
> - {128, 0, 1, NULL},
> - {129, 0, 2, NULL},
> - {130, 0, 3, NULL},
> - {131, 0, 4, NULL},
> - {132, 0, 5, ast2700_tsp132_tsp164_intcmap},
> - {133, 0, 6, NULL},
> - {134, 0, 7, NULL},
> - {135, 0, 8, NULL},
> - {136, 0, 9, NULL},
> };
>
> static qemu_irq aspeed_soc_ast27x0tsp_get_irq(AspeedCoprocessorState *s,
> diff --git a/hw/intc/aspeed_intc.c b/hw/intc/aspeed_intc.c
> index 305458d6d4..1702cb87dc 100644
> --- a/hw/intc/aspeed_intc.c
> +++ b/hw/intc/aspeed_intc.c
> @@ -69,28 +69,6 @@ REG32(SSPINT165_STATUS, 0x1D4)
> /*
> * TSP INTC Registers
> */
> -REG32(TSPINT128_EN, 0x3000)
> -REG32(TSPINT128_STATUS, 0x3004)
> -REG32(TSPINT129_EN, 0x3100)
> -REG32(TSPINT129_STATUS, 0x3104)
> -REG32(TSPINT130_EN, 0x3200)
> -REG32(TSPINT130_STATUS, 0x3204)
> -REG32(TSPINT131_EN, 0x3300)
> -REG32(TSPINT131_STATUS, 0x3304)
> -REG32(TSPINT132_EN, 0x3400)
> -REG32(TSPINT132_STATUS, 0x3404)
> -REG32(TSPINT133_EN, 0x3500)
> -REG32(TSPINT133_STATUS, 0x3504)
> -REG32(TSPINT134_EN, 0x3600)
> -REG32(TSPINT134_STATUS, 0x3604)
> -REG32(TSPINT135_EN, 0x3700)
> -REG32(TSPINT135_STATUS, 0x3704)
> -REG32(TSPINT136_EN, 0x3800)
> -REG32(TSPINT136_STATUS, 0x3804)
> -REG32(TSPINT137_EN, 0x3900)
> -REG32(TSPINT137_STATUS, 0x3904)
> -REG32(TSPINT138_EN, 0x3A00)
> -REG32(TSPINT138_STATUS, 0x3A04)
> REG32(TSPINT160_169_EN, 0x3B00)
> REG32(TSPINT160_169_STATUS, 0x3B04)
>
> @@ -511,29 +489,9 @@ static void aspeed_tsp_intc_write(void *opaque, hwaddr offset, uint64_t data,
> trace_aspeed_intc_write(name, offset, size, data);
>
> switch (reg) {
> - case R_TSPINT128_EN:
> - case R_TSPINT129_EN:
> - case R_TSPINT130_EN:
> - case R_TSPINT131_EN:
> - case R_TSPINT132_EN:
> - case R_TSPINT133_EN:
> - case R_TSPINT134_EN:
> - case R_TSPINT135_EN:
> - case R_TSPINT136_EN:
> case R_TSPINT160_169_EN:
> aspeed_intc_enable_handler(s, offset, data);
> break;
> - case R_TSPINT128_STATUS:
> - case R_TSPINT129_STATUS:
> - case R_TSPINT130_STATUS:
> - case R_TSPINT131_STATUS:
> - case R_TSPINT132_STATUS:
> - case R_TSPINT133_STATUS:
> - case R_TSPINT134_STATUS:
> - case R_TSPINT135_STATUS:
> - case R_TSPINT136_STATUS:
> - aspeed_intc_status_handler(s, offset, data);
> - break;
> case R_TSPINT160_169_STATUS:
> aspeed_intc_status_handler_multi_outpins(s, offset, data);
> break;
> @@ -929,15 +887,6 @@ static const TypeInfo aspeed_2700ssp_intcio_info = {
>
> static AspeedINTCIRQ aspeed_2700tsp_intc_irqs[ASPEED_INTC_MAX_INPINS] = {
> {0, 0, 10, R_TSPINT160_169_EN, R_TSPINT160_169_STATUS},
> - {1, 10, 1, R_TSPINT128_EN, R_TSPINT128_STATUS},
> - {2, 11, 1, R_TSPINT129_EN, R_TSPINT129_STATUS},
> - {3, 12, 1, R_TSPINT130_EN, R_TSPINT130_STATUS},
> - {4, 13, 1, R_TSPINT131_EN, R_TSPINT131_STATUS},
> - {5, 14, 1, R_TSPINT132_EN, R_TSPINT132_STATUS},
> - {6, 15, 1, R_TSPINT133_EN, R_TSPINT133_STATUS},
> - {7, 16, 1, R_TSPINT134_EN, R_TSPINT134_STATUS},
> - {8, 17, 1, R_TSPINT135_EN, R_TSPINT135_STATUS},
> - {9, 18, 1, R_TSPINT136_EN, R_TSPINT136_STATUS},
> };
>
> static void aspeed_2700tsp_intc_class_init(ObjectClass *klass, const void *data)
> @@ -947,8 +896,8 @@ static void aspeed_2700tsp_intc_class_init(ObjectClass *klass, const void *data)
>
> dc->desc = "ASPEED 2700 TSP INTC Controller";
> aic->num_lines = 32;
> - aic->num_inpins = 10;
> - aic->num_outpins = 19;
> + aic->num_inpins = 1;
> + aic->num_outpins = 10;
> aic->mem_size = 0x4000;
> aic->nr_regs = 0x3B08 >> 2;
> aic->reg_offset = 0;
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v1 3/3] hw/i2c/aspeed: Fix wrong I2CC_DMA_LEN when I2CM_DMA_TX/RX_ADDR set first
2026-01-02 9:07 ` Jamin Lin via
@ 2026-01-02 9:07 ` Jamin Lin via
-1 siblings, 0 replies; 12+ messages in thread
From: Jamin Lin via @ 2026-01-02 9:07 UTC (permalink / raw)
To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Andrew Jeffery, Joel Stanley, open list:ASPEED BMCs,
open list:All patches CC here
Cc: jamin_lin, troy_lee, kane_chen
In the previous design, the I2C model would update I2CC_DMA_LEN (0x54) based on
the value of I2CM_DMA_LEN (0x1C) when the firmware set either I2CM_DMA_TX_ADDR
(0x30) or I2CM_DMA_RX_ADDR (0x34). However, this only worked correctly if the
firmware set I2CM_DMA_LEN before setting I2CM_DMA_TX_ADDR or I2CM_DMA_RX_ADDR.
If the firmware instead set I2CM_DMA_TX_ADDR or I2CM_DMA_RX_ADDR before setting
I2CM_DMA_LEN, the value written to I2CC_DMA_LEN would be incorrect.
To fix this issue, the model should be updated to set I2CC_DMA_LEN when the
firmware writes to the I2CM_DMA_LEN register, rather than when it writes to the
I2CM_DMA_RX_ADDR and I2CM_DMA_TX_ADDR registers.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Fixes: ba2cccd (aspeed: i2c: Add new mode support)
---
hw/i2c/aspeed_i2c.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c
index faf2160c06..1b8ac561c3 100644
--- a/hw/i2c/aspeed_i2c.c
+++ b/hw/i2c/aspeed_i2c.c
@@ -656,8 +656,6 @@ static void aspeed_i2c_bus_new_write(AspeedI2CBus *bus, hwaddr offset,
bus->dma_dram_offset =
deposit64(bus->dma_dram_offset, 0, 32,
FIELD_EX32(value, I2CM_DMA_TX_ADDR, ADDR));
- bus->regs[R_I2CC_DMA_LEN] = ARRAY_FIELD_EX32(bus->regs, I2CM_DMA_LEN,
- TX_BUF_LEN) + 1;
break;
case A_I2CM_DMA_RX_ADDR:
bus->regs[R_I2CM_DMA_RX_ADDR] = FIELD_EX32(value, I2CM_DMA_RX_ADDR,
@@ -665,8 +663,6 @@ static void aspeed_i2c_bus_new_write(AspeedI2CBus *bus, hwaddr offset,
bus->dma_dram_offset =
deposit64(bus->dma_dram_offset, 0, 32,
FIELD_EX32(value, I2CM_DMA_RX_ADDR, ADDR));
- bus->regs[R_I2CC_DMA_LEN] = ARRAY_FIELD_EX32(bus->regs, I2CM_DMA_LEN,
- RX_BUF_LEN) + 1;
break;
case A_I2CM_DMA_LEN:
w1t = FIELD_EX32(value, I2CM_DMA_LEN, RX_BUF_LEN_W1T) ||
@@ -679,10 +675,16 @@ static void aspeed_i2c_bus_new_write(AspeedI2CBus *bus, hwaddr offset,
if (FIELD_EX32(value, I2CM_DMA_LEN, RX_BUF_LEN_W1T)) {
ARRAY_FIELD_DP32(bus->regs, I2CM_DMA_LEN, RX_BUF_LEN,
FIELD_EX32(value, I2CM_DMA_LEN, RX_BUF_LEN));
+ bus->regs[R_I2CC_DMA_LEN] = ARRAY_FIELD_EX32(bus->regs,
+ I2CM_DMA_LEN,
+ RX_BUF_LEN) + 1;
}
if (FIELD_EX32(value, I2CM_DMA_LEN, TX_BUF_LEN_W1T)) {
ARRAY_FIELD_DP32(bus->regs, I2CM_DMA_LEN, TX_BUF_LEN,
FIELD_EX32(value, I2CM_DMA_LEN, TX_BUF_LEN));
+ bus->regs[R_I2CC_DMA_LEN] = ARRAY_FIELD_EX32(bus->regs,
+ I2CM_DMA_LEN,
+ TX_BUF_LEN) + 1;
}
break;
case A_I2CM_DMA_LEN_STS:
--
2.43.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v1 3/3] hw/i2c/aspeed: Fix wrong I2CC_DMA_LEN when I2CM_DMA_TX/RX_ADDR set first
@ 2026-01-02 9:07 ` Jamin Lin via
0 siblings, 0 replies; 12+ messages in thread
From: Jamin Lin via @ 2026-01-02 9:07 UTC (permalink / raw)
To: Cédric Le Goater, Peter Maydell, Steven Lee, Troy Lee,
Andrew Jeffery, Joel Stanley, open list:ASPEED BMCs,
open list:All patches CC here
Cc: jamin_lin, troy_lee, kane_chen
In the previous design, the I2C model would update I2CC_DMA_LEN (0x54) based on
the value of I2CM_DMA_LEN (0x1C) when the firmware set either I2CM_DMA_TX_ADDR
(0x30) or I2CM_DMA_RX_ADDR (0x34). However, this only worked correctly if the
firmware set I2CM_DMA_LEN before setting I2CM_DMA_TX_ADDR or I2CM_DMA_RX_ADDR.
If the firmware instead set I2CM_DMA_TX_ADDR or I2CM_DMA_RX_ADDR before setting
I2CM_DMA_LEN, the value written to I2CC_DMA_LEN would be incorrect.
To fix this issue, the model should be updated to set I2CC_DMA_LEN when the
firmware writes to the I2CM_DMA_LEN register, rather than when it writes to the
I2CM_DMA_RX_ADDR and I2CM_DMA_TX_ADDR registers.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Fixes: ba2cccd (aspeed: i2c: Add new mode support)
---
hw/i2c/aspeed_i2c.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c
index faf2160c06..1b8ac561c3 100644
--- a/hw/i2c/aspeed_i2c.c
+++ b/hw/i2c/aspeed_i2c.c
@@ -656,8 +656,6 @@ static void aspeed_i2c_bus_new_write(AspeedI2CBus *bus, hwaddr offset,
bus->dma_dram_offset =
deposit64(bus->dma_dram_offset, 0, 32,
FIELD_EX32(value, I2CM_DMA_TX_ADDR, ADDR));
- bus->regs[R_I2CC_DMA_LEN] = ARRAY_FIELD_EX32(bus->regs, I2CM_DMA_LEN,
- TX_BUF_LEN) + 1;
break;
case A_I2CM_DMA_RX_ADDR:
bus->regs[R_I2CM_DMA_RX_ADDR] = FIELD_EX32(value, I2CM_DMA_RX_ADDR,
@@ -665,8 +663,6 @@ static void aspeed_i2c_bus_new_write(AspeedI2CBus *bus, hwaddr offset,
bus->dma_dram_offset =
deposit64(bus->dma_dram_offset, 0, 32,
FIELD_EX32(value, I2CM_DMA_RX_ADDR, ADDR));
- bus->regs[R_I2CC_DMA_LEN] = ARRAY_FIELD_EX32(bus->regs, I2CM_DMA_LEN,
- RX_BUF_LEN) + 1;
break;
case A_I2CM_DMA_LEN:
w1t = FIELD_EX32(value, I2CM_DMA_LEN, RX_BUF_LEN_W1T) ||
@@ -679,10 +675,16 @@ static void aspeed_i2c_bus_new_write(AspeedI2CBus *bus, hwaddr offset,
if (FIELD_EX32(value, I2CM_DMA_LEN, RX_BUF_LEN_W1T)) {
ARRAY_FIELD_DP32(bus->regs, I2CM_DMA_LEN, RX_BUF_LEN,
FIELD_EX32(value, I2CM_DMA_LEN, RX_BUF_LEN));
+ bus->regs[R_I2CC_DMA_LEN] = ARRAY_FIELD_EX32(bus->regs,
+ I2CM_DMA_LEN,
+ RX_BUF_LEN) + 1;
}
if (FIELD_EX32(value, I2CM_DMA_LEN, TX_BUF_LEN_W1T)) {
ARRAY_FIELD_DP32(bus->regs, I2CM_DMA_LEN, TX_BUF_LEN,
FIELD_EX32(value, I2CM_DMA_LEN, TX_BUF_LEN));
+ bus->regs[R_I2CC_DMA_LEN] = ARRAY_FIELD_EX32(bus->regs,
+ I2CM_DMA_LEN,
+ TX_BUF_LEN) + 1;
}
break;
case A_I2CM_DMA_LEN_STS:
--
2.43.0
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v1 3/3] hw/i2c/aspeed: Fix wrong I2CC_DMA_LEN when I2CM_DMA_TX/RX_ADDR set first
2026-01-02 9:07 ` Jamin Lin via
(?)
@ 2026-01-02 13:28 ` Cédric Le Goater
-1 siblings, 0 replies; 12+ messages in thread
From: Cédric Le Goater @ 2026-01-02 13:28 UTC (permalink / raw)
To: Jamin Lin, Peter Maydell, Steven Lee, Troy Lee, Andrew Jeffery,
Joel Stanley, open list:ASPEED BMCs,
open list:All patches CC here
Cc: troy_lee, kane_chen
On 1/2/26 10:07, Jamin Lin wrote:
> In the previous design, the I2C model would update I2CC_DMA_LEN (0x54) based on
> the value of I2CM_DMA_LEN (0x1C) when the firmware set either I2CM_DMA_TX_ADDR
> (0x30) or I2CM_DMA_RX_ADDR (0x34). However, this only worked correctly if the
> firmware set I2CM_DMA_LEN before setting I2CM_DMA_TX_ADDR or I2CM_DMA_RX_ADDR.
>
> If the firmware instead set I2CM_DMA_TX_ADDR or I2CM_DMA_RX_ADDR before setting
> I2CM_DMA_LEN, the value written to I2CC_DMA_LEN would be incorrect.
>
> To fix this issue, the model should be updated to set I2CC_DMA_LEN when the
> firmware writes to the I2CM_DMA_LEN register, rather than when it writes to the
> I2CM_DMA_RX_ADDR and I2CM_DMA_TX_ADDR registers.
>
> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
> Fixes: ba2cccd (aspeed: i2c: Add new mode support)
Fixes: ba2cccd64e90 ("aspeed: i2c: Add new mode support")
This change should be backported on the stable branches.
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Thanks,
C.
> ---
> hw/i2c/aspeed_i2c.c | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c
> index faf2160c06..1b8ac561c3 100644
> --- a/hw/i2c/aspeed_i2c.c
> +++ b/hw/i2c/aspeed_i2c.c
> @@ -656,8 +656,6 @@ static void aspeed_i2c_bus_new_write(AspeedI2CBus *bus, hwaddr offset,
> bus->dma_dram_offset =
> deposit64(bus->dma_dram_offset, 0, 32,
> FIELD_EX32(value, I2CM_DMA_TX_ADDR, ADDR));
> - bus->regs[R_I2CC_DMA_LEN] = ARRAY_FIELD_EX32(bus->regs, I2CM_DMA_LEN,
> - TX_BUF_LEN) + 1;
> break;
> case A_I2CM_DMA_RX_ADDR:
> bus->regs[R_I2CM_DMA_RX_ADDR] = FIELD_EX32(value, I2CM_DMA_RX_ADDR,
> @@ -665,8 +663,6 @@ static void aspeed_i2c_bus_new_write(AspeedI2CBus *bus, hwaddr offset,
> bus->dma_dram_offset =
> deposit64(bus->dma_dram_offset, 0, 32,
> FIELD_EX32(value, I2CM_DMA_RX_ADDR, ADDR));
> - bus->regs[R_I2CC_DMA_LEN] = ARRAY_FIELD_EX32(bus->regs, I2CM_DMA_LEN,
> - RX_BUF_LEN) + 1;
> break;
> case A_I2CM_DMA_LEN:
> w1t = FIELD_EX32(value, I2CM_DMA_LEN, RX_BUF_LEN_W1T) ||
> @@ -679,10 +675,16 @@ static void aspeed_i2c_bus_new_write(AspeedI2CBus *bus, hwaddr offset,
> if (FIELD_EX32(value, I2CM_DMA_LEN, RX_BUF_LEN_W1T)) {
> ARRAY_FIELD_DP32(bus->regs, I2CM_DMA_LEN, RX_BUF_LEN,
> FIELD_EX32(value, I2CM_DMA_LEN, RX_BUF_LEN));
> + bus->regs[R_I2CC_DMA_LEN] = ARRAY_FIELD_EX32(bus->regs,
> + I2CM_DMA_LEN,
> + RX_BUF_LEN) + 1;
> }
> if (FIELD_EX32(value, I2CM_DMA_LEN, TX_BUF_LEN_W1T)) {
> ARRAY_FIELD_DP32(bus->regs, I2CM_DMA_LEN, TX_BUF_LEN,
> FIELD_EX32(value, I2CM_DMA_LEN, TX_BUF_LEN));
> + bus->regs[R_I2CC_DMA_LEN] = ARRAY_FIELD_EX32(bus->regs,
> + I2CM_DMA_LEN,
> + TX_BUF_LEN) + 1;
> }
> break;
> case A_I2CM_DMA_LEN_STS:
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v1 0/3] Remove AST2700 A0 Settings
2026-01-02 9:07 ` Jamin Lin via
` (3 preceding siblings ...)
(?)
@ 2026-01-02 13:42 ` Cédric Le Goater
-1 siblings, 0 replies; 12+ messages in thread
From: Cédric Le Goater @ 2026-01-02 13:42 UTC (permalink / raw)
To: Jamin Lin, Peter Maydell, Steven Lee, Troy Lee, Andrew Jeffery,
Joel Stanley, open list:ASPEED BMCs,
open list:All patches CC here
Cc: troy_lee, kane_chen
On 1/2/26 10:07, Jamin Lin wrote:
> This patch series is based on legoater/qemu, branch aspeed-next.
> https://github.com/legoater/qemu
Applied to aspeed-next.
Thanks,
C.
>
> v1:
> 1. Remove SSP NVIC 128 to 138 for AST2700 A0
> 2. Remove TSP NVIC 128 to 138 for AST2700 A0
> 3. Fix wrong I2CC_DMA_LEN when I2CM_DMA_TX/RX_ADDR set first
>
> Jamin Lin (3):
> hw/intc/aspeed: Remove SSP 128 - 138
> hw/intc/aspeed: Remove TSP 128 - 138
> hw/i2c/aspeed: Fix wrong I2CC_DMA_LEN when I2CM_DMA_TX/RX_ADDR set
> first
>
> hw/arm/aspeed_ast27x0-ssp.c | 13 +----
> hw/arm/aspeed_ast27x0-tsp.c | 13 +----
> hw/i2c/aspeed_i2c.c | 10 ++--
> hw/intc/aspeed_intc.c | 110 ++----------------------------------
> 4 files changed, 14 insertions(+), 132 deletions(-)
>
^ permalink raw reply [flat|nested] 12+ messages in thread