From: Anand Moon <linux.amoon@gmail.com>
To: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Heiko Stuebner" <heiko@sntech.de>,
"Niklas Cassel" <cassel@kernel.org>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Hans Zhang" <18255117159@163.com>,
"Nicolas Frattaroli" <nicolas.frattaroli@collabora.com>,
linux-pci@vger.kernel.org (open list:PCI NATIVE HOST BRIDGE AND
ENDPOINT DRIVERS),
linux-arm-kernel@lists.infradead.org (moderated
list:ARM/Rockchip SoC support),
linux-rockchip@lists.infradead.org (open list:ARM/Rockchip SoC
support), linux-kernel@vger.kernel.org (open list)
Cc: Anand Moon <linux.amoon@gmail.com>
Subject: [PATCH v2] PCI: dw-rockchip: Add runtime PM support to Rockchip PCIe
Date: Fri, 2 Jan 2026 18:47:50 +0530 [thread overview]
Message-ID: <20260102131819.123745-1-linux.amoon@gmail.com> (raw)
Add runtime powwe manageement functionality into the Rockchip DesignWare
PCIe controller driver. Calling devm_pm_runtime_enable() during device
probing allows the controller to report its runtime PM status, enabling
power management controls to be applied consistently across the entire
connected PCIe hierarchy.
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
v2:
improve the commit message
Drop the .remove patch
Drop the disable_pm_runtime
v1:
https://lore.kernel.org/all/20251027145602.199154-3-linux.amoon@gmail.com/
---
drivers/pci/controller/dwc/pcie-dw-rockchip.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
index f8605fe61a415..2498ff5146a5a 100644
--- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
+++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
@@ -20,6 +20,7 @@
#include <linux/of_irq.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/reset.h>
@@ -709,6 +710,20 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
if (ret)
goto deinit_phy;
+ ret = pm_runtime_set_suspended(dev);
+ if (ret)
+ goto deinit_clk;
+
+ ret = devm_pm_runtime_enable(dev);
+ if (ret) {
+ ret = dev_err_probe(dev, ret, "Failed to enable runtime PM\n");
+ goto deinit_clk;
+ }
+
+ ret = pm_runtime_resume_and_get(dev);
+ if (ret)
+ goto deinit_clk;
+
switch (data->mode) {
case DW_PCIE_RC_TYPE:
ret = rockchip_pcie_configure_rc(pdev, rockchip);
@@ -730,6 +745,8 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
deinit_clk:
clk_bulk_disable_unprepare(rockchip->clk_cnt, rockchip->clks);
+ pm_runtime_disable(dev);
+ pm_runtime_no_callbacks(dev);
deinit_phy:
rockchip_pcie_phy_deinit(rockchip);
base-commit: b69053dd3ffbc0d2dedbbc86182cdef6f641fe1b
--
2.50.1
WARNING: multiple messages have this Message-ID (diff)
From: Anand Moon <linux.amoon@gmail.com>
To: "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Heiko Stuebner" <heiko@sntech.de>,
"Niklas Cassel" <cassel@kernel.org>,
"Shawn Lin" <shawn.lin@rock-chips.com>,
"Hans Zhang" <18255117159@163.com>,
"Nicolas Frattaroli" <nicolas.frattaroli@collabora.com>,
linux-pci@vger.kernel.org (open list:PCI NATIVE HOST BRIDGE AND
ENDPOINT DRIVERS),
linux-arm-kernel@lists.infradead.org (moderated
list:ARM/Rockchip SoC support),
linux-rockchip@lists.infradead.org (open list:ARM/Rockchip SoC
support), linux-kernel@vger.kernel.org (open list)
Cc: Anand Moon <linux.amoon@gmail.com>
Subject: [PATCH v2] PCI: dw-rockchip: Add runtime PM support to Rockchip PCIe
Date: Fri, 2 Jan 2026 18:47:50 +0530 [thread overview]
Message-ID: <20260102131819.123745-1-linux.amoon@gmail.com> (raw)
Add runtime powwe manageement functionality into the Rockchip DesignWare
PCIe controller driver. Calling devm_pm_runtime_enable() during device
probing allows the controller to report its runtime PM status, enabling
power management controls to be applied consistently across the entire
connected PCIe hierarchy.
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
v2:
improve the commit message
Drop the .remove patch
Drop the disable_pm_runtime
v1:
https://lore.kernel.org/all/20251027145602.199154-3-linux.amoon@gmail.com/
---
drivers/pci/controller/dwc/pcie-dw-rockchip.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
index f8605fe61a415..2498ff5146a5a 100644
--- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
+++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
@@ -20,6 +20,7 @@
#include <linux/of_irq.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <linux/reset.h>
@@ -709,6 +710,20 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
if (ret)
goto deinit_phy;
+ ret = pm_runtime_set_suspended(dev);
+ if (ret)
+ goto deinit_clk;
+
+ ret = devm_pm_runtime_enable(dev);
+ if (ret) {
+ ret = dev_err_probe(dev, ret, "Failed to enable runtime PM\n");
+ goto deinit_clk;
+ }
+
+ ret = pm_runtime_resume_and_get(dev);
+ if (ret)
+ goto deinit_clk;
+
switch (data->mode) {
case DW_PCIE_RC_TYPE:
ret = rockchip_pcie_configure_rc(pdev, rockchip);
@@ -730,6 +745,8 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
deinit_clk:
clk_bulk_disable_unprepare(rockchip->clk_cnt, rockchip->clks);
+ pm_runtime_disable(dev);
+ pm_runtime_no_callbacks(dev);
deinit_phy:
rockchip_pcie_phy_deinit(rockchip);
base-commit: b69053dd3ffbc0d2dedbbc86182cdef6f641fe1b
--
2.50.1
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
next reply other threads:[~2026-01-02 13:18 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-02 13:17 Anand Moon [this message]
2026-01-02 13:17 ` [PATCH v2] PCI: dw-rockchip: Add runtime PM support to Rockchip PCIe Anand Moon
2026-01-03 4:00 ` Anand Moon
2026-01-03 4:00 ` Anand Moon
2026-01-06 13:36 ` Manivannan Sadhasivam
2026-01-06 13:36 ` Manivannan Sadhasivam
2026-01-08 7:04 ` Anand Moon
2026-01-08 7:04 ` Anand Moon
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