From: Jonathan Cameron <jonathan.cameron@huawei.com>
To: Sascha Bischoff <Sascha.Bischoff@arm.com>
Cc: "linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"kvmarm@lists.linux.dev" <kvmarm@lists.linux.dev>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>, nd <nd@arm.com>,
"maz@kernel.org" <maz@kernel.org>,
"oliver.upton@linux.dev" <oliver.upton@linux.dev>,
Joey Gouly <Joey.Gouly@arm.com>,
Suzuki Poulose <Suzuki.Poulose@arm.com>,
"yuzenghui@huawei.com" <yuzenghui@huawei.com>,
"peter.maydell@linaro.org" <peter.maydell@linaro.org>,
"lpieralisi@kernel.org" <lpieralisi@kernel.org>,
Timothy Hayes <Timothy.Hayes@arm.com>
Subject: Re: [PATCH v2 17/36] KVM: arm64: gic: Introduce irq_queue and set_pending_state to irq_ops
Date: Wed, 7 Jan 2026 12:22:00 +0000 [thread overview]
Message-ID: <20260107122200.00004455@huawei.com> (raw)
In-Reply-To: <20251219155222.1383109-18-sascha.bischoff@arm.com>
On Fri, 19 Dec 2025 15:52:41 +0000
Sascha Bischoff <Sascha.Bischoff@arm.com> wrote:
> There are times when the default behaviour of vgic_queue_irq_unlock is
Nice to make function names explicit in a patch description by using
vgic_queue_irq_unlock() style. Some subsystems insist we do that in commit
descriptions. No idea if kvm does though.
> undesirable. This is because some GICs, such a GICv5 which is the main
> driver for this change, handle the majority of the interrupt lifecycle
> in hardware. In this case, there is no need for a per-VCPU AP list as
> the interrupt can be made pending directly. This is done either via
> the ICH_PPI_x_EL2 registers for PPIs, or with the VDPEND system
> instruction for SPIs and LPIs.
>
> The queue_irq_unlock function is made overridable using a new function
> pointer in struct irq_ops. In kvm_vgic_inject_irq,
> vgic_queue_irq_unlock is overridden if the function pointer is
> non-null.
>
> Additionally, a new function is added via a function pointer -
> set_pending_state. The intent is for this to be used to directly set
> the pending state in hardware.
>
> Both of these new irq_ops are unused in this change - it is purely
> providing the infrastructure itself. The subsequent PPI injection
> changes provide a demonstration of their usage.
>
> Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
Trivial stuff only.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> ---
> arch/arm64/kvm/vgic/vgic.c | 11 +++++++++++
> include/kvm/arm_vgic.h | 15 +++++++++++++++
> 2 files changed, 26 insertions(+)
>
> diff --git a/arch/arm64/kvm/vgic/vgic.c b/arch/arm64/kvm/vgic/vgic.c
> index d88570bb2f9f0..ac8cb0270e1e4 100644
> --- a/arch/arm64/kvm/vgic/vgic.c
> +++ b/arch/arm64/kvm/vgic/vgic.c
> @@ -404,6 +404,13 @@ bool vgic_queue_irq_unlock(struct kvm *kvm, struct vgic_irq *irq,
>
> lockdep_assert_held(&irq->irq_lock);
>
> + /*
> + * If we have the queue_irq_unlock irq_op, we want to override
> + * the default behaviour. Call that, and return early.
I'd say this comment is really just saying what the code clearly does
so provides not benefit. So drop it.
> + */
> + if (irq->ops && irq->ops->queue_irq_unlock)
> + return irq->ops->queue_irq_unlock(kvm, irq, flags);
> +
> retry:
> vcpu = vgic_target_oracle(irq);
> if (irq->vcpu || !vcpu) {
> @@ -547,7 +554,11 @@ int kvm_vgic_inject_irq(struct kvm *kvm, struct kvm_vcpu *vcpu,
> else
> irq->pending_latch = true;
>
> + if (irq->ops && irq->ops->set_pending_state)
> + WARN_ON_ONCE(!irq->ops->set_pending_state(vcpu, irq));
> +
> vgic_queue_irq_unlock(kvm, irq, flags);
> +
Reasonable change, for readability but not relevant to this patch, so don't
do it here.
> vgic_put_irq(kvm, irq);
>
> return 0;
> diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h
next prev parent reply other threads:[~2026-01-07 12:22 UTC|newest]
Thread overview: 101+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-19 15:52 [PATCH v2 00/36] KVM: arm64: Introduce vGIC-v5 with PPI support Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 02/36] KVM: arm64: gic-v3: Switch vGIC-v3 to use generated ICH_VMCR_EL2 Sascha Bischoff
2026-01-06 18:00 ` Jonathan Cameron
2026-01-07 10:55 ` Sascha Bischoff
2026-01-09 16:57 ` Sascha Bischoff
2026-01-12 12:41 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 03/36] arm64/sysreg: Drop ICH_HFGRTR_EL2.ICC_HAPR_EL1 and make RES1 Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 01/36] KVM: arm64: Account for RES1 bits in DECLARE_FEAT_MAP() and co Sascha Bischoff
2026-01-06 17:23 ` Jonathan Cameron
2026-01-08 16:52 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 06/36] KVM: arm64: gic-v5: Add ARM_VGIC_V5 device to KVM headers Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 05/36] arm64/sysreg: Add GICR CDNMIA encoding Sascha Bischoff
2026-01-06 18:08 ` Jonathan Cameron
2026-01-07 8:39 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 04/36] arm64/sysreg: Add remaining GICv5 ICC_ & ICH_ sysregs for KVM support Sascha Bischoff
2026-01-06 18:28 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 08/36] KVM: arm64: Introduce kvm_call_hyp_nvhe_res() Sascha Bischoff
2026-01-07 10:30 ` Jonathan Cameron
2026-01-08 9:48 ` Sascha Bischoff
2026-01-08 10:26 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 09/36] KVM: arm64: gic-v5: Detect implemented PPIs on boot Sascha Bischoff
2026-01-06 18:34 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 07/36] KVM: arm64: gic: Introduce interrupt type helpers Sascha Bischoff
2026-01-06 14:51 ` Joey Gouly
2026-01-06 18:43 ` Jonathan Cameron
2026-01-08 9:33 ` Sascha Bischoff
2026-01-08 10:25 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 11/36] KVM: arm64: gic-v5: Support GICv5 FGTs & FGUs Sascha Bischoff
2026-01-07 11:19 ` Jonathan Cameron
2026-01-08 10:36 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 10/36] KVM: arm64: gic-v5: Sanitize ID_AA64PFR2_EL1.GCIE Sascha Bischoff
2026-01-07 10:58 ` Jonathan Cameron
2026-01-08 9:54 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 12/36] KVM: arm64: gic-v5: Add emulation for ICC_IAFFIDR_EL1 accesses Sascha Bischoff
2026-01-07 11:10 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 13/36] KVM: arm64: gic: Set vgic_model before initing private IRQs Sascha Bischoff
2026-01-07 11:24 ` Jonathan Cameron
2026-01-08 13:39 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 14/36] KVM: arm64: gic-v5: Add vgic-v5 save/restore hyp interface Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 16/36] KVM: arm64: gic-v5: Implement direct injection of PPIs Sascha Bischoff
2026-01-07 12:16 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 15/36] KVM: arm64: gic-v5: Implement GICv5 load/put and save/restore Sascha Bischoff
2026-01-07 12:28 ` Jonathan Cameron
2026-01-08 13:40 ` Sascha Bischoff
2026-01-08 16:52 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 17/36] KVM: arm64: gic: Introduce irq_queue and set_pending_state to irq_ops Sascha Bischoff
2026-01-07 12:22 ` Jonathan Cameron [this message]
2025-12-19 15:52 ` [PATCH v2 19/36] KVM: arm64: gic-v5: Check for pending PPIs Sascha Bischoff
2026-01-07 15:00 ` Jonathan Cameron
2026-01-08 16:23 ` Sascha Bischoff
2026-01-08 16:57 ` Jonathan Cameron
2026-01-08 16:10 ` Joey Gouly
2026-01-08 16:21 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 20/36] KVM: arm64: gic-v5: Init Private IRQs (PPIs) for GICv5 Sascha Bischoff
2026-01-07 15:04 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 18/36] KVM: arm64: gic-v5: Implement PPI interrupt injection Sascha Bischoff
2026-01-06 16:06 ` Joey Gouly
2026-01-06 18:04 ` Sascha Bischoff
2026-01-07 12:50 ` Jonathan Cameron
2026-01-08 14:43 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 23/36] KVM: arm64: gic-v5: Support GICv5 interrupts with KVM_IRQ_LINE Sascha Bischoff
2026-01-07 15:29 ` Jonathan Cameron
2026-01-08 16:53 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 21/36] KVM: arm64: gic-v5: Finalize GICv5 PPIs and generate mask Sascha Bischoff
2026-01-07 15:08 ` Jonathan Cameron
2026-01-08 16:51 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 22/36] KVM: arm64: gic-v5: Trap and mask guest PPI register accesses Sascha Bischoff
2026-01-07 15:17 ` Jonathan Cameron
2026-01-09 16:59 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 24/36] KVM: arm64: gic-v5: Create, init vgic_v5 Sascha Bischoff
2026-01-07 15:49 ` Jonathan Cameron
2026-01-08 16:55 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 25/36] KVM: arm64: gic-v5: Reset vcpu state Sascha Bischoff
2026-01-07 15:51 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 26/36] KVM: arm64: gic-v5: Bump arch timer for GICv5 Sascha Bischoff
2026-01-07 16:08 ` Jonathan Cameron
2026-01-09 16:56 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 28/36] KVM: arm64: gic: Hide GICv5 for protected guests Sascha Bischoff
2026-01-07 16:12 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 27/36] KVM: arm64: gic-v5: Mandate architected PPI for PMU emulation on GICv5 Sascha Bischoff
2026-01-06 15:06 ` Joey Gouly
2026-01-07 9:48 ` Sascha Bischoff
2026-01-07 16:11 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 29/36] KVM: arm64: gic-v5: Hide FEAT_GCIE from NV GICv5 guests Sascha Bischoff
2026-01-07 16:13 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 30/36] KVM: arm64: gic-v5: Introduce kvm_arm_vgic_v5_ops and register them Sascha Bischoff
2026-01-07 16:19 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 31/36] KVM: arm64: gic-v5: Set ICH_VCTLR_EL2.En on boot Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 34/36] Documentation: KVM: Introduce documentation for VGICv5 Sascha Bischoff
2026-01-07 16:27 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 33/36] KVM: arm64: gic-v5: Probe for GICv5 device Sascha Bischoff
2026-01-07 16:25 ` Jonathan Cameron
2026-01-09 15:00 ` Joey Gouly
2025-12-19 15:52 ` [PATCH v2 32/36] irqchip/gic-v5: Check if impl is virt capable Sascha Bischoff
2026-01-07 16:21 ` Jonathan Cameron
2025-12-19 15:52 ` [PATCH v2 36/36] KVM: arm64: gic-v5: Communicate userspace-drivable PPIs via a UAPI Sascha Bischoff
2026-01-07 16:51 ` Jonathan Cameron
2026-01-09 17:00 ` Sascha Bischoff
2025-12-19 15:52 ` [PATCH v2 35/36] KVM: arm64: selftests: Introduce a minimal GICv5 PPI selftest Sascha Bischoff
2026-01-07 16:38 ` Jonathan Cameron
2025-12-19 16:17 ` [PATCH v2 00/36] KVM: arm64: Introduce vGIC-v5 with PPI support Sascha Bischoff
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