From: Jonathan Cameron <jonathan.cameron@huawei.com>
To: "Cheatham, Benjamin" <benjamin.cheatham@amd.com>
Cc: <dave@stgolabs.net>, Dave Jiang <dave.jiang@intel.com>,
Alison Schofield <alison.schofield@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
<vishal.l.verma@intel.com>, <ira.weiny@intel.com>,
<linux-cxl@vger.kernel.org>
Subject: Re: [PATCH] cxl/core: Fix cxl_dport debugfs EINJ entries
Date: Thu, 15 Jan 2026 18:30:24 +0000 [thread overview]
Message-ID: <20260115183024.000011ac@huawei.com> (raw)
In-Reply-To: <6e9fb657-8264-4028-92e2-5428e2695bf1@amd.com>
On Fri, 9 Jan 2026 07:57:38 -0600
"Cheatham, Benjamin" <benjamin.cheatham@amd.com> wrote:
> Protocol error injection is only valid for CXL 2.0+ root ports and CXL
> 1.1 memory-mapped downstream ports as per the ACPI v6.5 spec (Table
> 8-31). The core code currently creates an 'einj_inject' file in CXL debugfs
> for all CXL 1.1 downstream ports and all PCI CXL 2.0+ downstream ports.
> This results in debugfs EINJ files that won't work due to platform/spec
> restrictions.
>
> Fix by limiting 'einj_inject' file creation to only CXL 1.1 dports and
> CXL 2.0+ root ports. Update the comment above the check to more accurately
> represent the requirements expected by the EINJ module and ACPI spec.
>
> Fixes: 8039804cfa73 ("cxl/core: Add CXL EINJ debugfs files")
> Signed-off-by: Ben Cheatham <Benjamin.Cheatham@amd.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
next prev parent reply other threads:[~2026-01-15 18:30 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-09 13:57 [PATCH] cxl/core: Fix cxl_dport debugfs EINJ entries Cheatham, Benjamin
2026-01-09 15:42 ` Dave Jiang
2026-01-12 20:11 ` Alison Schofield
2026-01-15 18:30 ` Jonathan Cameron [this message]
2026-01-15 18:43 ` Dave Jiang
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