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From: Jamin Lin via <qemu-arm@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Steven Lee" <steven_lee@aspeedtech.com>,
	"Troy Lee" <leetroy@gmail.com>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Joel Stanley" <joel@jms.id.au>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: <jamin_lin@aspeedtech.com>, <troy_lee@aspeedtech.com>,
	<kane_chen@aspeedtech.com>
Subject: [PATCH v1 05/11] hw/arm/ast27x0: Add DRAM alias for TSP SDRAM remap
Date: Tue, 20 Jan 2026 17:29:30 +0800	[thread overview]
Message-ID: <20260120092939.2708302-6-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20260120092939.2708302-1-jamin_lin@aspeedtech.com>

This commit adds a MemoryRegion alias to support PSP access to
TSP SDRAM through shared memory remapping, as defined by the default SCU
configuration.

The TSP coprocessor exposes one DRAM alias:
  - remap maps PSP DRAM at 0x42e000000 (32MB) to TSP SDRAM offset 0x0

This region corresponds to the default SCU register value, which controls
the mapping between PSP and coprocessor memory windows.

Set TSP CPUID 5. SCU VMState version remains at 3, as it was already bumped in a
previous commit.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
 include/hw/misc/aspeed_scu.h |  1 +
 hw/arm/aspeed_ast27x0-fc.c   |  2 ++
 hw/arm/aspeed_ast27x0-tsp.c  |  3 +++
 hw/arm/aspeed_ast27x0.c      |  2 ++
 hw/misc/aspeed_scu.c         | 15 +++++++++++++++
 5 files changed, 23 insertions(+)

diff --git a/include/hw/misc/aspeed_scu.h b/include/hw/misc/aspeed_scu.h
index 6f7f7d2766..1e18dcd4a5 100644
--- a/include/hw/misc/aspeed_scu.h
+++ b/include/hw/misc/aspeed_scu.h
@@ -43,6 +43,7 @@ struct AspeedSCUState {
     MemoryRegion dram_remap_alias[3];
     MemoryRegion *dram;
     int ssp_cpuid;
+    int tsp_cpuid;
 };
 
 #define AST2400_A0_SILICON_REV   0x02000303U
diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c
index b788e6ca2a..e03f6870e7 100644
--- a/hw/arm/aspeed_ast27x0-fc.c
+++ b/hw/arm/aspeed_ast27x0-fc.c
@@ -103,6 +103,8 @@ static bool ast2700fc_ca35_init(MachineState *machine, Error **errp)
                             sc->uarts_num, serial_hd(2));
     object_property_set_int(OBJECT(&s->ca35), "ssp-cpuid", 4,
                             &error_abort);
+    object_property_set_int(OBJECT(&s->ca35), "tsp-cpuid", 5,
+                            &error_abort);
     if (!qdev_realize(DEVICE(&s->ca35), NULL, errp)) {
         return false;
     }
diff --git a/hw/arm/aspeed_ast27x0-tsp.c b/hw/arm/aspeed_ast27x0-tsp.c
index 46691080d1..5d2977b45c 100644
--- a/hw/arm/aspeed_ast27x0-tsp.c
+++ b/hw/arm/aspeed_ast27x0-tsp.c
@@ -198,6 +198,9 @@ static void aspeed_soc_ast27x0tsp_realize(DeviceState *dev_soc, Error **errp)
     memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SCU],
                                 &s->scu_alias);
 
+    /* SDRAM remap alias used by PSP to access TSP SDRAM */
+    memory_region_add_subregion(&s->sdram, 0, &s->scu->dram_remap_alias[2]);
+
     /* INTC */
     if (!sysbus_realize(SYS_BUS_DEVICE(&a->intc[0]), errp)) {
         return;
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index ae8b22fc1c..6e4b456b8c 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -391,6 +391,8 @@ static void aspeed_soc_ast2700_init(Object *obj)
                               "hw-prot-key");
     object_property_add_alias(obj, "ssp-cpuid", OBJECT(&s->scu),
                               "ssp-cpuid");
+    object_property_add_alias(obj, "tsp-cpuid", OBJECT(&s->scu),
+                              "tsp-cpuid");
 
     object_initialize_child(obj, "scuio", &s->scuio, TYPE_ASPEED_2700_SCUIO);
     qdev_prop_set_uint32(DEVICE(&s->scuio), "silicon-rev",
diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
index 4b74e5adcb..ec373147ab 100644
--- a/hw/misc/aspeed_scu.c
+++ b/hw/misc/aspeed_scu.c
@@ -629,6 +629,7 @@ static const Property aspeed_scu_properties[] = {
     DEFINE_PROP_UINT32("hw-strap2", AspeedSCUState, hw_strap2, 0),
     DEFINE_PROP_UINT32("hw-prot-key", AspeedSCUState, hw_prot_key, 0),
     DEFINE_PROP_INT32("ssp-cpuid", AspeedSCUState, ssp_cpuid, -1),
+    DEFINE_PROP_INT32("tsp-cpuid", AspeedSCUState, tsp_cpuid, -1),
     DEFINE_PROP_LINK("dram", AspeedSCUState, dram, TYPE_MEMORY_REGION,
                      MemoryRegion *),
 };
@@ -903,6 +904,20 @@ static void aspeed_2700_scu_dram_remap_alias_init(AspeedSCUState *s)
                                  "ssp.dram.remap2", s->dram,
                                  0x2c000000, 32 * MiB);
     }
+
+    if (s->tsp_cpuid > 0) {
+        /*
+         * The TSP coprocessor uses one memory alias (remap) to access a shared
+         * region in the PSP DRAM:
+         *
+         * - remap maps PSP DRAM at 0x42e000000 (size: 32MB) to TSP SDRAM
+         *   offset 0x0
+         *
+         */
+        memory_region_init_alias(&s->dram_remap_alias[2], OBJECT(s),
+                                 "tsp.dram.remap", s->dram,
+                                 0x2e000000, 32 * MiB);
+    }
 }
 
 static uint64_t aspeed_ast2700_scu_read(void *opaque, hwaddr offset,
-- 
2.43.0



WARNING: multiple messages have this Message-ID (diff)
From: Jamin Lin via qemu development <qemu-devel@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Steven Lee" <steven_lee@aspeedtech.com>,
	"Troy Lee" <leetroy@gmail.com>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Joel Stanley" <joel@jms.id.au>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: <jamin_lin@aspeedtech.com>, <troy_lee@aspeedtech.com>,
	<kane_chen@aspeedtech.com>
Subject: [PATCH v1 05/11] hw/arm/ast27x0: Add DRAM alias for TSP SDRAM remap
Date: Tue, 20 Jan 2026 17:29:30 +0800	[thread overview]
Message-ID: <20260120092939.2708302-6-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20260120092939.2708302-1-jamin_lin@aspeedtech.com>

This commit adds a MemoryRegion alias to support PSP access to
TSP SDRAM through shared memory remapping, as defined by the default SCU
configuration.

The TSP coprocessor exposes one DRAM alias:
  - remap maps PSP DRAM at 0x42e000000 (32MB) to TSP SDRAM offset 0x0

This region corresponds to the default SCU register value, which controls
the mapping between PSP and coprocessor memory windows.

Set TSP CPUID 5. SCU VMState version remains at 3, as it was already bumped in a
previous commit.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
 include/hw/misc/aspeed_scu.h |  1 +
 hw/arm/aspeed_ast27x0-fc.c   |  2 ++
 hw/arm/aspeed_ast27x0-tsp.c  |  3 +++
 hw/arm/aspeed_ast27x0.c      |  2 ++
 hw/misc/aspeed_scu.c         | 15 +++++++++++++++
 5 files changed, 23 insertions(+)

diff --git a/include/hw/misc/aspeed_scu.h b/include/hw/misc/aspeed_scu.h
index 6f7f7d2766..1e18dcd4a5 100644
--- a/include/hw/misc/aspeed_scu.h
+++ b/include/hw/misc/aspeed_scu.h
@@ -43,6 +43,7 @@ struct AspeedSCUState {
     MemoryRegion dram_remap_alias[3];
     MemoryRegion *dram;
     int ssp_cpuid;
+    int tsp_cpuid;
 };
 
 #define AST2400_A0_SILICON_REV   0x02000303U
diff --git a/hw/arm/aspeed_ast27x0-fc.c b/hw/arm/aspeed_ast27x0-fc.c
index b788e6ca2a..e03f6870e7 100644
--- a/hw/arm/aspeed_ast27x0-fc.c
+++ b/hw/arm/aspeed_ast27x0-fc.c
@@ -103,6 +103,8 @@ static bool ast2700fc_ca35_init(MachineState *machine, Error **errp)
                             sc->uarts_num, serial_hd(2));
     object_property_set_int(OBJECT(&s->ca35), "ssp-cpuid", 4,
                             &error_abort);
+    object_property_set_int(OBJECT(&s->ca35), "tsp-cpuid", 5,
+                            &error_abort);
     if (!qdev_realize(DEVICE(&s->ca35), NULL, errp)) {
         return false;
     }
diff --git a/hw/arm/aspeed_ast27x0-tsp.c b/hw/arm/aspeed_ast27x0-tsp.c
index 46691080d1..5d2977b45c 100644
--- a/hw/arm/aspeed_ast27x0-tsp.c
+++ b/hw/arm/aspeed_ast27x0-tsp.c
@@ -198,6 +198,9 @@ static void aspeed_soc_ast27x0tsp_realize(DeviceState *dev_soc, Error **errp)
     memory_region_add_subregion(s->memory, sc->memmap[ASPEED_DEV_SCU],
                                 &s->scu_alias);
 
+    /* SDRAM remap alias used by PSP to access TSP SDRAM */
+    memory_region_add_subregion(&s->sdram, 0, &s->scu->dram_remap_alias[2]);
+
     /* INTC */
     if (!sysbus_realize(SYS_BUS_DEVICE(&a->intc[0]), errp)) {
         return;
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index ae8b22fc1c..6e4b456b8c 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -391,6 +391,8 @@ static void aspeed_soc_ast2700_init(Object *obj)
                               "hw-prot-key");
     object_property_add_alias(obj, "ssp-cpuid", OBJECT(&s->scu),
                               "ssp-cpuid");
+    object_property_add_alias(obj, "tsp-cpuid", OBJECT(&s->scu),
+                              "tsp-cpuid");
 
     object_initialize_child(obj, "scuio", &s->scuio, TYPE_ASPEED_2700_SCUIO);
     qdev_prop_set_uint32(DEVICE(&s->scuio), "silicon-rev",
diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
index 4b74e5adcb..ec373147ab 100644
--- a/hw/misc/aspeed_scu.c
+++ b/hw/misc/aspeed_scu.c
@@ -629,6 +629,7 @@ static const Property aspeed_scu_properties[] = {
     DEFINE_PROP_UINT32("hw-strap2", AspeedSCUState, hw_strap2, 0),
     DEFINE_PROP_UINT32("hw-prot-key", AspeedSCUState, hw_prot_key, 0),
     DEFINE_PROP_INT32("ssp-cpuid", AspeedSCUState, ssp_cpuid, -1),
+    DEFINE_PROP_INT32("tsp-cpuid", AspeedSCUState, tsp_cpuid, -1),
     DEFINE_PROP_LINK("dram", AspeedSCUState, dram, TYPE_MEMORY_REGION,
                      MemoryRegion *),
 };
@@ -903,6 +904,20 @@ static void aspeed_2700_scu_dram_remap_alias_init(AspeedSCUState *s)
                                  "ssp.dram.remap2", s->dram,
                                  0x2c000000, 32 * MiB);
     }
+
+    if (s->tsp_cpuid > 0) {
+        /*
+         * The TSP coprocessor uses one memory alias (remap) to access a shared
+         * region in the PSP DRAM:
+         *
+         * - remap maps PSP DRAM at 0x42e000000 (size: 32MB) to TSP SDRAM
+         *   offset 0x0
+         *
+         */
+        memory_region_init_alias(&s->dram_remap_alias[2], OBJECT(s),
+                                 "tsp.dram.remap", s->dram,
+                                 0x2e000000, 32 * MiB);
+    }
 }
 
 static uint64_t aspeed_ast2700_scu_read(void *opaque, hwaddr offset,
-- 
2.43.0



  parent reply	other threads:[~2026-01-20  9:30 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-20  9:29 [PATCH v1 00/11] Add SSP/TSP power control and DRAM remap support for AST2700 Jamin Lin via
2026-01-20  9:29 ` Jamin Lin via qemu development
2026-01-20  9:29 ` [PATCH v1 01/11] hw/arm/ast27x0: Move DRAM and SDMC initialization earlier to support memory aliasing Jamin Lin via
2026-01-20  9:29   ` Jamin Lin via qemu development
2026-01-20  9:29 ` [PATCH v1 02/11] hw/arm/ast27x0: Start SSP in powered-off state to match hardware behavior Jamin Lin via
2026-01-20  9:29   ` Jamin Lin via qemu development
2026-01-20  9:29 ` [PATCH v1 03/11] hw/arm/ast27x0: Start TSP " Jamin Lin via
2026-01-20  9:29   ` Jamin Lin via qemu development
2026-01-20  9:29 ` [PATCH v1 04/11] hw/arm/ast27x0: Add DRAM alias for SSP SDRAM remap Jamin Lin via
2026-01-20  9:29   ` Jamin Lin via qemu development
2026-01-26  9:01   ` Cédric Le Goater
2026-01-27  5:07     ` Jamin Lin
2026-01-27  6:09       ` Jamin Lin
2026-01-27  9:48         ` Jamin Lin
2026-02-02  6:57           ` Kane Chen
2026-02-02  9:33             ` Cédric Le Goater
2026-02-02  9:46               ` Kane Chen
2026-02-02 10:48                 ` Cédric Le Goater
2026-02-03 10:23                   ` Kane Chen
2026-02-03 12:56                     ` Cédric Le Goater
2026-02-04  7:42                       ` Kane Chen
2026-01-20  9:29 ` Jamin Lin via [this message]
2026-01-20  9:29   ` [PATCH v1 05/11] hw/arm/ast27x0: Add DRAM alias for TSP " Jamin Lin via qemu development
2026-01-20  9:29 ` [PATCH v1 06/11] hw/misc/aspeed_scu: Implement SSP reset and power-on control via SCU registers Jamin Lin via
2026-01-20  9:29   ` Jamin Lin via qemu development
2026-01-20  9:29 ` [PATCH v1 07/11] hw/misc/aspeed_scu: Implement TSP " Jamin Lin via
2026-01-20  9:29   ` Jamin Lin via qemu development
2026-01-20  9:29 ` [PATCH v1 08/11] hw/misc/aspeed_scu: Add SCU support for SSP SDRAM remap Jamin Lin via
2026-01-20  9:29   ` Jamin Lin via qemu development
2026-01-20  9:29 ` [PATCH v1 09/11] hw/misc/aspeed_scu: Add SCU support for TSP " Jamin Lin via
2026-01-20  9:29   ` Jamin Lin via qemu development
2026-01-20  9:29 ` [PATCH v1 10/11] tests/functional/aarch64/test_aspeed_ast2700fc: Boot SSP/TSP via PSP and load binaries from DRAM Jamin Lin via
2026-01-20  9:29   ` Jamin Lin via qemu development
2026-01-20  9:29 ` [PATCH v1 11/11] docs: Add support vbootrom and update Manual boot for ast2700fc Jamin Lin via
2026-01-20  9:29   ` Jamin Lin via qemu development

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