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From: Conor Dooley <conor@kernel.org>
To: Guodong Xu <guodong@riscstar.com>
Cc: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Samuel Holland <samuel.holland@sifive.com>,
	Heinrich Schuchardt <heinrich.schuchardt@canonical.com>,
	Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>, Evan Green <evan@rivosinc.com>,
	Andrew Jones <ajones@ventanamicro.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/3] riscv: cpufeature: Add ISA extension parsing for Supm
Date: Thu, 22 Jan 2026 18:53:26 +0000	[thread overview]
Message-ID: <20260122-brethren-overeager-fa3d3b6fb0cf@spud> (raw)
In-Reply-To: <20260116-supm-ext-id-v1-2-5fcf778ba4a6@riscstar.com>


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On Fri, Jan 16, 2026 at 10:10:32AM +0800, Guodong Xu wrote:
> Supm has been ratified in the RISC-V Pointer Masking specification
> (Version 1.0, 10/2024) and is mandated in RVA23 Profiles (Version 1.0,
> 2024-10-17) for RVA23U64. Supm indicates userspace pointer masking
> support.
> 
> Remove the previous macro aliasing of Supm to Ssnpm/Smnpm in hwcap.h,
> treating Supm as a distinct RISC-V ISA extension ID.
> 
> Add ISA parsing logic for Supm, and implement a validator to ensure
> that Supm is only reported as available if Kconfig allows it and the
> underlying Ssnpm (for supervisor mode) or Smnpm (for machine mode)
> extension is present. Supm relies on Ssnpm or Smnpm to provide the
> underlying hardware implementation.
> 
> With this change, "supm" will be reported (when available) in
> /proc/cpuinfo as part of the "isa" and "hart isa" string.
> 
> Link: https://lore.kernel.org/lkml/20260101-legume-engraved-0fae8282cfbe@spud/#r [1]
> Link: https://lore.kernel.org/all/4ebbe14b-2579-4ba6-808d-d50c24641d04@sifive.com/#r [2]
> Signed-off-by: Guodong Xu <guodong@riscstar.com>

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>


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WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: Guodong Xu <guodong@riscstar.com>
Cc: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Samuel Holland <samuel.holland@sifive.com>,
	Heinrich Schuchardt <heinrich.schuchardt@canonical.com>,
	Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>, Evan Green <evan@rivosinc.com>,
	Andrew Jones <ajones@ventanamicro.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/3] riscv: cpufeature: Add ISA extension parsing for Supm
Date: Thu, 22 Jan 2026 18:53:26 +0000	[thread overview]
Message-ID: <20260122-brethren-overeager-fa3d3b6fb0cf@spud> (raw)
In-Reply-To: <20260116-supm-ext-id-v1-2-5fcf778ba4a6@riscstar.com>

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On Fri, Jan 16, 2026 at 10:10:32AM +0800, Guodong Xu wrote:
> Supm has been ratified in the RISC-V Pointer Masking specification
> (Version 1.0, 10/2024) and is mandated in RVA23 Profiles (Version 1.0,
> 2024-10-17) for RVA23U64. Supm indicates userspace pointer masking
> support.
> 
> Remove the previous macro aliasing of Supm to Ssnpm/Smnpm in hwcap.h,
> treating Supm as a distinct RISC-V ISA extension ID.
> 
> Add ISA parsing logic for Supm, and implement a validator to ensure
> that Supm is only reported as available if Kconfig allows it and the
> underlying Ssnpm (for supervisor mode) or Smnpm (for machine mode)
> extension is present. Supm relies on Ssnpm or Smnpm to provide the
> underlying hardware implementation.
> 
> With this change, "supm" will be reported (when available) in
> /proc/cpuinfo as part of the "isa" and "hart isa" string.
> 
> Link: https://lore.kernel.org/lkml/20260101-legume-engraved-0fae8282cfbe@spud/#r [1]
> Link: https://lore.kernel.org/all/4ebbe14b-2579-4ba6-808d-d50c24641d04@sifive.com/#r [2]
> Signed-off-by: Guodong Xu <guodong@riscstar.com>

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>


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  reply	other threads:[~2026-01-22 18:53 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-16  2:10 [PATCH 0/3] riscv: cpufeature: Add Supm extension id and validation Guodong Xu
2026-01-16  2:10 ` Guodong Xu
2026-01-16  2:10 ` [PATCH 1/3] dt-bindings: riscv: Add Supm extension description Guodong Xu
2026-01-16  2:10   ` Guodong Xu
2026-01-22 18:52   ` Conor Dooley
2026-01-22 18:52     ` Conor Dooley
2026-01-22 23:29     ` Guodong Xu
2026-01-22 23:29       ` Guodong Xu
2026-01-23 17:24       ` Conor Dooley
2026-01-23 17:24         ` Conor Dooley
2026-01-16  2:10 ` [PATCH 2/3] riscv: cpufeature: Add ISA extension parsing for Supm Guodong Xu
2026-01-16  2:10   ` Guodong Xu
2026-01-22 18:53   ` Conor Dooley [this message]
2026-01-22 18:53     ` Conor Dooley
2026-01-16  2:10 ` [PATCH 3/3] riscv: cpufeature: Clarify ISA spec version for canonical order Guodong Xu
2026-01-16  2:10   ` Guodong Xu
2026-01-22 18:56   ` Conor Dooley
2026-01-22 18:56     ` Conor Dooley

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