Re: [PATCH v9 6/7] iommu/arm-smmu-v3: Add arm_smmu_invs based arm_smmu_domain_inv_range()

[Jason Gunthorpe <jgg@nvidia.com>]

On Tue, Jan 27, 2026 at 08:38:31AM -0800, Nicolin Chen wrote:
> Hi Pranjal,
> 
> Sorry, I missed this!
> 
> On Fri, Jan 23, 2026 at 09:48:37AM +0000, Pranjal Shrivastava wrote:
> > On Fri, Dec 19, 2025 at 12:11:28PM -0800, Nicolin Chen wrote:
> > > +	/*
> > > +	 * Avoid locking unless ATS is being used. No ATC invalidation can be
> > > +	 * going on after a domain is detached.
> > > +	 */
> > > +	if (invs->has_ats) {
> > > +		read_lock(&invs->rwlock);
> > 
> > Shouldn't these be read_lock_irqsave for all rwlock variants here? 
> > Invalidations might happen in IRQ context as well..
> > 
> > > +		__arm_smmu_domain_inv_range(invs, iova, size, granule, leaf);
> > > +		read_unlock(&invs->rwlock);
> 
> It was kept from the older versions where we had a trylock. Jason
> had an insight about this, mainly for less latency on invalidation
> threads.
> 
> Yet, now we have a plain locking. TBH, I can't find a good reason
> justifying this. And it does look a bit unsafe to me. So, I think
> I will just change to the _irqsave version. (Jason?)

My understanding has been that this invalidation can run from an IRQ
context - we permit the use of the DMA API from an interrupt handler?

I though that for rwsem the read side does not require the _irqsave,
even if it is in an irq context, unless the write side runs from an
IRQ. 

Here the write side always runs from a process context.

So the write side will block the IRQ which ensures we don't spin
during read in an IRQ.

IOW I think this is OK? Pranjal do you know otherwise?

Jason