From: Jason Gunthorpe <jgg@nvidia.com>
To: Nicolin Chen <nicolinc@nvidia.com>
Cc: will@kernel.org, robin.murphy@arm.com, joro@8bytes.org,
jpb@kernel.org, praan@google.com, miko.lenczewski@arm.com,
linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
linux-kernel@vger.kernel.org, patches@lists.linux.dev
Subject: Re: [PATCH v2 10/10] iommu/arm-smmu-v3: Allow sharing domain across SMMUs
Date: Tue, 27 Jan 2026 13:59:36 -0400 [thread overview]
Message-ID: <20260127175936.GO1134360@nvidia.com> (raw)
In-Reply-To: <aXj6/yhMoveAHv2w@Asurada-Nvidia>
On Tue, Jan 27, 2026 at 09:50:55AM -0800, Nicolin Chen wrote:
> On Tue, Jan 27, 2026 at 11:41:11AM -0400, Jason Gunthorpe wrote:
> > On Wed, Jan 21, 2026 at 05:24:28PM -0800, Nicolin Chen wrote:
> > > VMM needs a domain holding the mappings between gPA to hPA. It can be an S1
> > > domain or an S2 nesting parent domain, depending on whether the VM is built
> > > with a vSMMU or not.
> > >
> > > Given that the IOAS for this gPA mapping is the same across SMMU instances,
> > > this domain can be shared across devices even if they sit behind different
> > > SMMUs, so long as the underlying page table is compatible between the SMMU
> > > instances.
> > >
> > > There is no direct information about the page table from the master device,
> > > but a comparison can be done between the physical SMMU that the domain was
> > > allocated for and the physical SMMU that the device is behind.
> >
> > I would very much prefer this works by inspecting the cfg from the
> > iopgtable..
> >
> > You can get it by doing
> >
> > struct io_pgtable_cfg *pgtbl_cfg =
> > &io_pgtable_ops_to_pgtable(domain->pgtbl_ops)->cfg;
>
> OK. I will make it a detailed scan
>
> > I think it is important that the domain->smmu pointer be removed as
> > well
>
> I will try that too.
>
> There are smmu_domain->smmu validations in two SVA functions,
> which presumably might be replaced with this can_share() too.
Those are because we replicate the mmu notifier for every
instance. That can now be revised too, I think. Let's leave that for
another series after this and leave the smmu pointer for now, but
don't use it outside that SVA stuff.
Jason
prev parent reply other threads:[~2026-01-27 17:59 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-22 1:24 [PATCH v2 00/10] iommu/arm-smmu-v3: Share domain across SMMU/vSMMU instances Nicolin Chen
2026-01-22 1:24 ` [PATCH v2 01/10] iommu/arm-smmu-v3: Store IOTLB cache tags in struct arm_smmu_attach_state Nicolin Chen
2026-01-26 20:44 ` Jason Gunthorpe
2026-01-27 3:23 ` Nicolin Chen
2026-01-27 15:08 ` Jason Gunthorpe
2026-01-27 16:58 ` Nicolin Chen
2026-01-22 1:24 ` [PATCH v2 02/10] iommu/arm-smmu-v3: Pass in IOTLB cache tag to CD and STE Nicolin Chen
2026-01-26 20:53 ` Jason Gunthorpe
2026-01-27 3:28 ` Nicolin Chen
2026-01-22 1:24 ` [PATCH v2 03/10] iommu/arm-smmu-v3: Look for existing iotlb tag in smmu_domain->invs Nicolin Chen
2026-01-26 21:03 ` Jason Gunthorpe
2026-01-27 2:50 ` Nicolin Chen
2026-01-22 1:24 ` [PATCH v2 04/10] iommu/arm-smmu-v3: Allocate IOTLB cache tag if no id to reuse Nicolin Chen
2026-01-26 21:06 ` Jason Gunthorpe
2026-01-26 22:23 ` Nicolin Chen
2026-01-27 16:29 ` Jason Gunthorpe
2026-01-27 16:52 ` Nicolin Chen
2026-01-22 1:24 ` [PATCH v2 05/10] iommu/arm-smmu-v3: Flush iotlb in arm_smmu_iotlb_tag_free() Nicolin Chen
2026-01-26 21:08 ` Jason Gunthorpe
2026-01-27 2:56 ` Nicolin Chen
2026-01-27 15:09 ` Jason Gunthorpe
2026-01-22 1:24 ` [PATCH v2 06/10] iommu/arm-smmu-v3: Allocate vmid in arm_vsmmu_init Nicolin Chen
2026-01-26 21:16 ` Jason Gunthorpe
2026-01-27 3:06 ` Nicolin Chen
2026-01-27 15:11 ` Jason Gunthorpe
2026-01-27 17:11 ` Nicolin Chen
2026-01-27 17:58 ` Jason Gunthorpe
2026-01-22 1:24 ` [PATCH v2 07/10] iommu/arm-smmu-v3: Pass in vsmmu to arm_smmu_domain_get_iotlb_tag() Nicolin Chen
2026-01-26 21:20 ` Jason Gunthorpe
2026-01-27 3:34 ` Nicolin Chen
2026-01-22 1:24 ` [PATCH v2 08/10] iommu/arm-smmu-v3: Introduce INV_TYPE_S2_VMID_VSMMU Nicolin Chen
2026-01-27 15:13 ` Jason Gunthorpe
2026-01-22 1:24 ` [PATCH v2 09/10] iommu/arm-smmu-v3: Remove ASID/VMID from arm_smmu_domain Nicolin Chen
2026-01-22 1:24 ` [PATCH v2 10/10] iommu/arm-smmu-v3: Allow sharing domain across SMMUs Nicolin Chen
2026-01-27 15:41 ` Jason Gunthorpe
2026-01-27 17:50 ` Nicolin Chen
2026-01-27 17:59 ` Jason Gunthorpe [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260127175936.GO1134360@nvidia.com \
--to=jgg@nvidia.com \
--cc=iommu@lists.linux.dev \
--cc=joro@8bytes.org \
--cc=jpb@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=miko.lenczewski@arm.com \
--cc=nicolinc@nvidia.com \
--cc=patches@lists.linux.dev \
--cc=praan@google.com \
--cc=robin.murphy@arm.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.