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From: Jamin Lin via <qemu-arm@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Steven Lee" <steven_lee@aspeedtech.com>,
	"Troy Lee" <leetroy@gmail.com>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Joel Stanley" <joel@jms.id.au>,
	"Pierrick Bouvier" <pierrick.bouvier@linaro.org>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: jamin_lin@aspeedtech.com, troy_lee@aspeedtech.com,
	kane_chen@aspeedtech.com, "Cédric Le Goater" <clg@redhat.com>
Subject: [PATCH v2 2/8] hw/arm/aspeed_ast27x0: Sort SSP and TSP memmap tables by address
Date: Tue, 3 Feb 2026 10:08:47 +0800	[thread overview]
Message-ID: <20260203020855.1642884-3-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20260203020855.1642884-1-jamin_lin@aspeedtech.com>

Sort the SSP and TSP memmap tables to improve readability and
make the definitions easier to maintain.

No functional change.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
 hw/arm/aspeed_ast27x0-ssp.c | 10 +++++-----
 hw/arm/aspeed_ast27x0-tsp.c | 10 +++++-----
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/hw/arm/aspeed_ast27x0-ssp.c b/hw/arm/aspeed_ast27x0-ssp.c
index cee937b37e..e4bcf0fa2a 100644
--- a/hw/arm/aspeed_ast27x0-ssp.c
+++ b/hw/arm/aspeed_ast27x0-ssp.c
@@ -23,15 +23,15 @@ static const hwaddr aspeed_soc_ast27x0ssp_memmap[] = {
     [ASPEED_DEV_SRAM]      =  0x70000000,
     [ASPEED_DEV_INTC]      =  0x72100000,
     [ASPEED_DEV_SCU]       =  0x72C02000,
+    [ASPEED_DEV_TIMER1]    =  0x72C10000,
+    [ASPEED_DEV_UART4]     =  0x72C1A000,
+    [ASPEED_DEV_IPC0]      =  0x72C1C000,
     [ASPEED_DEV_SCUIO]     =  0x74C02000,
+    [ASPEED_DEV_INTCIO]    =  0x74C18000,
     [ASPEED_DEV_UART0]     =  0x74C33000,
     [ASPEED_DEV_UART1]     =  0x74C33100,
     [ASPEED_DEV_UART2]     =  0x74C33200,
     [ASPEED_DEV_UART3]     =  0x74C33300,
-    [ASPEED_DEV_UART4]     =  0x72C1A000,
-    [ASPEED_DEV_INTCIO]    =  0x74C18000,
-    [ASPEED_DEV_IPC0]      =  0x72C1C000,
-    [ASPEED_DEV_IPC1]      =  0x74C39000,
     [ASPEED_DEV_UART5]     =  0x74C33400,
     [ASPEED_DEV_UART6]     =  0x74C33500,
     [ASPEED_DEV_UART7]     =  0x74C33600,
@@ -40,7 +40,7 @@ static const hwaddr aspeed_soc_ast27x0ssp_memmap[] = {
     [ASPEED_DEV_UART10]    =  0x74C33900,
     [ASPEED_DEV_UART11]    =  0x74C33A00,
     [ASPEED_DEV_UART12]    =  0x74C33B00,
-    [ASPEED_DEV_TIMER1]    =  0x72C10000,
+    [ASPEED_DEV_IPC1]      =  0x74C39000,
 };
 
 static const int aspeed_soc_ast27x0ssp_irqmap[] = {
diff --git a/hw/arm/aspeed_ast27x0-tsp.c b/hw/arm/aspeed_ast27x0-tsp.c
index 9c11c016ca..68683a15d8 100644
--- a/hw/arm/aspeed_ast27x0-tsp.c
+++ b/hw/arm/aspeed_ast27x0-tsp.c
@@ -23,15 +23,15 @@ static const hwaddr aspeed_soc_ast27x0tsp_memmap[] = {
     [ASPEED_DEV_SRAM]      =  0x70000000,
     [ASPEED_DEV_INTC]      =  0x72100000,
     [ASPEED_DEV_SCU]       =  0x72C02000,
+    [ASPEED_DEV_TIMER1]    =  0x72C10000,
+    [ASPEED_DEV_UART4]     =  0x72C1A000,
+    [ASPEED_DEV_IPC0]      =  0x72C1C000,
     [ASPEED_DEV_SCUIO]     =  0x74C02000,
+    [ASPEED_DEV_INTCIO]    =  0x74C18000,
     [ASPEED_DEV_UART0]     =  0x74C33000,
     [ASPEED_DEV_UART1]     =  0x74C33100,
     [ASPEED_DEV_UART2]     =  0x74C33200,
     [ASPEED_DEV_UART3]     =  0x74C33300,
-    [ASPEED_DEV_UART4]     =  0x72C1A000,
-    [ASPEED_DEV_INTCIO]    =  0x74C18000,
-    [ASPEED_DEV_IPC0]      =  0x72C1C000,
-    [ASPEED_DEV_IPC1]      =  0x74C39000,
     [ASPEED_DEV_UART5]     =  0x74C33400,
     [ASPEED_DEV_UART6]     =  0x74C33500,
     [ASPEED_DEV_UART7]     =  0x74C33600,
@@ -40,7 +40,7 @@ static const hwaddr aspeed_soc_ast27x0tsp_memmap[] = {
     [ASPEED_DEV_UART10]    =  0x74C33900,
     [ASPEED_DEV_UART11]    =  0x74C33A00,
     [ASPEED_DEV_UART12]    =  0x74C33B00,
-    [ASPEED_DEV_TIMER1]    =  0x72C10000,
+    [ASPEED_DEV_IPC1]      =  0x74C39000,
 };
 
 static const int aspeed_soc_ast27x0tsp_irqmap[] = {
-- 
2.43.0



WARNING: multiple messages have this Message-ID (diff)
From: Jamin Lin via qemu development <qemu-devel@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Steven Lee" <steven_lee@aspeedtech.com>,
	"Troy Lee" <leetroy@gmail.com>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Joel Stanley" <joel@jms.id.au>,
	"Pierrick Bouvier" <pierrick.bouvier@linaro.org>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: jamin_lin@aspeedtech.com, troy_lee@aspeedtech.com,
	kane_chen@aspeedtech.com, "Cédric Le Goater" <clg@redhat.com>
Subject: [PATCH v2 2/8] hw/arm/aspeed_ast27x0: Sort SSP and TSP memmap tables by address
Date: Tue, 3 Feb 2026 10:08:47 +0800	[thread overview]
Message-ID: <20260203020855.1642884-3-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20260203020855.1642884-1-jamin_lin@aspeedtech.com>

Sort the SSP and TSP memmap tables to improve readability and
make the definitions easier to maintain.

No functional change.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
 hw/arm/aspeed_ast27x0-ssp.c | 10 +++++-----
 hw/arm/aspeed_ast27x0-tsp.c | 10 +++++-----
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/hw/arm/aspeed_ast27x0-ssp.c b/hw/arm/aspeed_ast27x0-ssp.c
index cee937b37e..e4bcf0fa2a 100644
--- a/hw/arm/aspeed_ast27x0-ssp.c
+++ b/hw/arm/aspeed_ast27x0-ssp.c
@@ -23,15 +23,15 @@ static const hwaddr aspeed_soc_ast27x0ssp_memmap[] = {
     [ASPEED_DEV_SRAM]      =  0x70000000,
     [ASPEED_DEV_INTC]      =  0x72100000,
     [ASPEED_DEV_SCU]       =  0x72C02000,
+    [ASPEED_DEV_TIMER1]    =  0x72C10000,
+    [ASPEED_DEV_UART4]     =  0x72C1A000,
+    [ASPEED_DEV_IPC0]      =  0x72C1C000,
     [ASPEED_DEV_SCUIO]     =  0x74C02000,
+    [ASPEED_DEV_INTCIO]    =  0x74C18000,
     [ASPEED_DEV_UART0]     =  0x74C33000,
     [ASPEED_DEV_UART1]     =  0x74C33100,
     [ASPEED_DEV_UART2]     =  0x74C33200,
     [ASPEED_DEV_UART3]     =  0x74C33300,
-    [ASPEED_DEV_UART4]     =  0x72C1A000,
-    [ASPEED_DEV_INTCIO]    =  0x74C18000,
-    [ASPEED_DEV_IPC0]      =  0x72C1C000,
-    [ASPEED_DEV_IPC1]      =  0x74C39000,
     [ASPEED_DEV_UART5]     =  0x74C33400,
     [ASPEED_DEV_UART6]     =  0x74C33500,
     [ASPEED_DEV_UART7]     =  0x74C33600,
@@ -40,7 +40,7 @@ static const hwaddr aspeed_soc_ast27x0ssp_memmap[] = {
     [ASPEED_DEV_UART10]    =  0x74C33900,
     [ASPEED_DEV_UART11]    =  0x74C33A00,
     [ASPEED_DEV_UART12]    =  0x74C33B00,
-    [ASPEED_DEV_TIMER1]    =  0x72C10000,
+    [ASPEED_DEV_IPC1]      =  0x74C39000,
 };
 
 static const int aspeed_soc_ast27x0ssp_irqmap[] = {
diff --git a/hw/arm/aspeed_ast27x0-tsp.c b/hw/arm/aspeed_ast27x0-tsp.c
index 9c11c016ca..68683a15d8 100644
--- a/hw/arm/aspeed_ast27x0-tsp.c
+++ b/hw/arm/aspeed_ast27x0-tsp.c
@@ -23,15 +23,15 @@ static const hwaddr aspeed_soc_ast27x0tsp_memmap[] = {
     [ASPEED_DEV_SRAM]      =  0x70000000,
     [ASPEED_DEV_INTC]      =  0x72100000,
     [ASPEED_DEV_SCU]       =  0x72C02000,
+    [ASPEED_DEV_TIMER1]    =  0x72C10000,
+    [ASPEED_DEV_UART4]     =  0x72C1A000,
+    [ASPEED_DEV_IPC0]      =  0x72C1C000,
     [ASPEED_DEV_SCUIO]     =  0x74C02000,
+    [ASPEED_DEV_INTCIO]    =  0x74C18000,
     [ASPEED_DEV_UART0]     =  0x74C33000,
     [ASPEED_DEV_UART1]     =  0x74C33100,
     [ASPEED_DEV_UART2]     =  0x74C33200,
     [ASPEED_DEV_UART3]     =  0x74C33300,
-    [ASPEED_DEV_UART4]     =  0x72C1A000,
-    [ASPEED_DEV_INTCIO]    =  0x74C18000,
-    [ASPEED_DEV_IPC0]      =  0x72C1C000,
-    [ASPEED_DEV_IPC1]      =  0x74C39000,
     [ASPEED_DEV_UART5]     =  0x74C33400,
     [ASPEED_DEV_UART6]     =  0x74C33500,
     [ASPEED_DEV_UART7]     =  0x74C33600,
@@ -40,7 +40,7 @@ static const hwaddr aspeed_soc_ast27x0tsp_memmap[] = {
     [ASPEED_DEV_UART10]    =  0x74C33900,
     [ASPEED_DEV_UART11]    =  0x74C33A00,
     [ASPEED_DEV_UART12]    =  0x74C33B00,
-    [ASPEED_DEV_TIMER1]    =  0x72C10000,
+    [ASPEED_DEV_IPC1]      =  0x74C39000,
 };
 
 static const int aspeed_soc_ast27x0tsp_irqmap[] = {
-- 
2.43.0



  parent reply	other threads:[~2026-02-03  2:09 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-03  2:08 [PATCH v2 0/8] Update test ASPEED SDK v11.00 for AST2700 A1 (RESEND) Jamin Lin via
2026-02-03  2:08 ` Jamin Lin via qemu development
2026-02-03  2:08 ` [PATCH v2 1/8] hw/arm/aspeed_ast27x0: Fix EHCI3/4 IRQ routing to GIC Jamin Lin via
2026-02-03  2:08   ` Jamin Lin via qemu development
2026-02-05 21:07   ` Michael Tokarev
2026-02-03  2:08 ` Jamin Lin via [this message]
2026-02-03  2:08   ` [PATCH v2 2/8] hw/arm/aspeed_ast27x0: Sort SSP and TSP memmap tables by address Jamin Lin via qemu development
2026-02-03  2:08 ` [PATCH v2 3/8] hw/arm/aspeed_ast27x0: Sort SSP and TSP IRQ maps Jamin Lin via
2026-02-03  2:08   ` Jamin Lin via qemu development
2026-02-03  2:08 ` [PATCH v2 4/8] hw/i2c/aspeed_i2c: Fix DMA moving data into incorrect address Jamin Lin via
2026-02-03  2:08   ` Jamin Lin via qemu development
2026-02-03  2:08 ` [PATCH v2 5/8] tests/functional/aarch64/test_aspeed_ast2700: Enable PCIe2 DTS status for AST2700 tests Jamin Lin via
2026-02-03  2:08   ` Jamin Lin via qemu development
2026-02-03  2:08 ` [PATCH v2 6/8] tests/functional/aarch64/test_aspeed_ast2700: Update test ASPEED SDK v11.00 for A1 Jamin Lin via
2026-02-03  2:08   ` Jamin Lin via qemu development
2026-02-03  2:08 ` [PATCH v2 7/8] tests/functional/aarch64/test_aspeed_ast2700fc: " Jamin Lin via
2026-02-03  2:08   ` Jamin Lin via qemu development
2026-02-03  2:08 ` [PATCH v2 8/8] docs/system/arm/aspeed: Load raw U-Boot image in AST2700 boot example Jamin Lin via
2026-02-03  2:08   ` Jamin Lin via qemu development
  -- strict thread matches above, loose matches on Subject: below --
2026-02-03  1:55 [PATCH v2 2/8] hw/arm/aspeed_ast27x0: Sort SSP and TSP memmap tables by address Jamin Lin

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