From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: "Michael S. Tsirkin" <mst@redhat.com>
Cc: <qemu-devel@nongnu.org>, Davidlohr Bueso <dave@stgolabs.net>,
<linuxarm@huawei.com>, <linux-cxl@vger.kernel.org>,
Ravi Shankar <venkataravis@micron.com>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Markus Armbruster <armbru@redhat.com>,
Michael Roth <michael.roth@amd.com>
Subject: Re: [PATCH qemu v5 6/7] hw/cxl: Support type3 HDM-DB
Date: Wed, 4 Feb 2026 11:50:41 +0000 [thread overview]
Message-ID: <20260204115041.00001755@huawei.com> (raw)
In-Reply-To: <20260203144122-mutt-send-email-mst@kernel.org>
> > + }
> > +
> > + return cregs->cache_mem_registers[offset / 4];
> > case 8:
> > qemu_log_mask(LOG_UNIMP,
> > "CXL 8 byte cache mem registers not implemented\n");
> > @@ -118,6 +148,47 @@ static void dumb_hdm_handler(CXLComponentState *cxl_cstate, hwaddr offset,
> > stl_le_p((uint8_t *)cache_mem + offset, value);
> > }
> >
> > +static void bi_handler(CXLComponentState *cxl_cstate, hwaddr offset,
> > + uint32_t value)
> > +{
> > + ComponentRegisters *cregs = &cxl_cstate->crb;
> > + uint32_t sts, *cache_mem = cregs->cache_mem_registers;
> > + bool to_commit = false;
> > + int type;
>
> type is declared here...
>
> > +
> > + switch (offset) {
> > + case A_CXL_BI_RT_CTRL:
> > + to_commit = FIELD_EX32(value, CXL_BI_RT_CTRL, COMMIT);
> > + if (to_commit) {
> > + sts = cxl_cache_mem_read_reg(cxl_cstate,
> > + R_CXL_BI_RT_STATUS, 4);
> > + sts = FIELD_DP32(sts, CXL_BI_RT_STATUS, COMMITTED, 0);
> > + stl_le_p((uint8_t *)cache_mem + R_CXL_BI_RT_STATUS, sts);
> > + type = CXL_BISTATE_RT;
>
> and initialized here
>
> > + }
> > + break;
> > + case A_CXL_BI_DECODER_CTRL:
> > + to_commit = FIELD_EX32(value, CXL_BI_DECODER_CTRL, COMMIT);
> > + if (to_commit) {
> > + sts = cxl_cache_mem_read_reg(cxl_cstate,
> > + R_CXL_BI_DECODER_STATUS, 4);
> > + sts = FIELD_DP32(sts, CXL_BI_DECODER_STATUS, COMMITTED, 0);
> > + stl_le_p((uint8_t *)cache_mem + R_CXL_BI_DECODER_STATUS, sts);
> > + type = CXL_BISTATE_DECODER;
>
> and here
>
> > + }
> > + break;
> > + default:
> > + break;
> > + }
> > +
> > + if (to_commit) {
> > + cxl_cstate->bi_state[type].last_commit =
> > + qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL);
>
> so there is no way for it to be used uninitialized.
>
>
> However some gcc versions are not smart enough to see that
> and they warn:
>
> https://gitlab.com/mstredhat/qemu/-/jobs/12972572228
>
>
> ../hw/cxl/cxl-component-utils.c: In function ‘cxl_cache_mem_write_reg’:
> ../hw/cxl/cxl-component-utils.c:181:48: error: ‘type’ may be used uninitialized in this function [-Werror=maybe-uninitialized]
> 181 | cxl_cstate->bi_state[type].last_commit =
> | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^
> 182 | qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL);
> | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> ../hw/cxl/cxl-component-utils.c:153:9: note: ‘type’ was declared here
> 153 | int type;
> | ^~~~
> cc1: all warnings being treated as errors
>
Thanks. I'll set it to 0 at declaration with a comment that it's there to resolve
a compiler warning (so no one deletes it as a cleanup!)
Jonathan
WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Cameron via qemu development <qemu-devel@nongnu.org>
To: "Michael S. Tsirkin" <mst@redhat.com>
Cc: <qemu-devel@nongnu.org>, Davidlohr Bueso <dave@stgolabs.net>,
<linuxarm@huawei.com>, <linux-cxl@vger.kernel.org>,
Ravi Shankar <venkataravis@micron.com>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Markus Armbruster <armbru@redhat.com>,
Michael Roth <michael.roth@amd.com>
Subject: Re: [PATCH qemu v5 6/7] hw/cxl: Support type3 HDM-DB
Date: Wed, 4 Feb 2026 11:50:41 +0000 [thread overview]
Message-ID: <20260204115041.00001755@huawei.com> (raw)
In-Reply-To: <20260203144122-mutt-send-email-mst@kernel.org>
> > + }
> > +
> > + return cregs->cache_mem_registers[offset / 4];
> > case 8:
> > qemu_log_mask(LOG_UNIMP,
> > "CXL 8 byte cache mem registers not implemented\n");
> > @@ -118,6 +148,47 @@ static void dumb_hdm_handler(CXLComponentState *cxl_cstate, hwaddr offset,
> > stl_le_p((uint8_t *)cache_mem + offset, value);
> > }
> >
> > +static void bi_handler(CXLComponentState *cxl_cstate, hwaddr offset,
> > + uint32_t value)
> > +{
> > + ComponentRegisters *cregs = &cxl_cstate->crb;
> > + uint32_t sts, *cache_mem = cregs->cache_mem_registers;
> > + bool to_commit = false;
> > + int type;
>
> type is declared here...
>
> > +
> > + switch (offset) {
> > + case A_CXL_BI_RT_CTRL:
> > + to_commit = FIELD_EX32(value, CXL_BI_RT_CTRL, COMMIT);
> > + if (to_commit) {
> > + sts = cxl_cache_mem_read_reg(cxl_cstate,
> > + R_CXL_BI_RT_STATUS, 4);
> > + sts = FIELD_DP32(sts, CXL_BI_RT_STATUS, COMMITTED, 0);
> > + stl_le_p((uint8_t *)cache_mem + R_CXL_BI_RT_STATUS, sts);
> > + type = CXL_BISTATE_RT;
>
> and initialized here
>
> > + }
> > + break;
> > + case A_CXL_BI_DECODER_CTRL:
> > + to_commit = FIELD_EX32(value, CXL_BI_DECODER_CTRL, COMMIT);
> > + if (to_commit) {
> > + sts = cxl_cache_mem_read_reg(cxl_cstate,
> > + R_CXL_BI_DECODER_STATUS, 4);
> > + sts = FIELD_DP32(sts, CXL_BI_DECODER_STATUS, COMMITTED, 0);
> > + stl_le_p((uint8_t *)cache_mem + R_CXL_BI_DECODER_STATUS, sts);
> > + type = CXL_BISTATE_DECODER;
>
> and here
>
> > + }
> > + break;
> > + default:
> > + break;
> > + }
> > +
> > + if (to_commit) {
> > + cxl_cstate->bi_state[type].last_commit =
> > + qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL);
>
> so there is no way for it to be used uninitialized.
>
>
> However some gcc versions are not smart enough to see that
> and they warn:
>
> https://gitlab.com/mstredhat/qemu/-/jobs/12972572228
>
>
> ../hw/cxl/cxl-component-utils.c: In function ‘cxl_cache_mem_write_reg’:
> ../hw/cxl/cxl-component-utils.c:181:48: error: ‘type’ may be used uninitialized in this function [-Werror=maybe-uninitialized]
> 181 | cxl_cstate->bi_state[type].last_commit =
> | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^
> 182 | qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL);
> | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> ../hw/cxl/cxl-component-utils.c:153:9: note: ‘type’ was declared here
> 153 | int type;
> | ^~~~
> cc1: all warnings being treated as errors
>
Thanks. I'll set it to 0 at declaration with a comment that it's there to resolve
a compiler warning (so no one deletes it as a cleanup!)
Jonathan
next prev parent reply other threads:[~2026-02-04 11:50 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-09 14:45 [PATCH qemu v5 0/7] hw/cxl: Support Back-Invalidate (+ PCIe Flit mode) Jonathan Cameron
2026-01-09 14:45 ` Jonathan Cameron via
2026-01-09 14:45 ` [PATCH qemu v5 1/7] hw/pcie: Support enabling flit mode Jonathan Cameron
2026-01-09 14:45 ` Jonathan Cameron via
2026-01-09 14:45 ` [PATCH qemu v5 2/7] hw/cxl: Refactor component register initialization Jonathan Cameron
2026-01-09 14:45 ` Jonathan Cameron via
2026-01-09 14:45 ` [PATCH qemu v5 3/7] tests/bios-tables-test: Excluded CEDT.cxl for BI restriction relaxation Jonathan Cameron
2026-01-09 14:45 ` Jonathan Cameron via
2026-01-09 14:45 ` [PATCH qemu v5 4/7] hw/cxl: Update CXL Fixed Memory Window ACPI description to include Back Invalidate support Jonathan Cameron
2026-01-09 14:45 ` Jonathan Cameron via
2026-01-09 15:46 ` Davidlohr Bueso
2026-01-09 14:45 ` [PATCH qemu v5 5/7] tests/acpi/cxl: Update CEDT.cxl to allow BI in CFWMS Jonathan Cameron
2026-01-09 14:45 ` Jonathan Cameron via
2026-01-09 14:45 ` [PATCH qemu v5 6/7] hw/cxl: Support type3 HDM-DB Jonathan Cameron
2026-01-09 14:45 ` Jonathan Cameron via
2026-02-03 19:46 ` Michael S. Tsirkin
2026-02-04 11:50 ` Jonathan Cameron [this message]
2026-02-04 11:50 ` Jonathan Cameron via qemu development
2026-01-09 14:45 ` [PATCH qemu v5 7/7] hw/cxl: Remove register special_ops->read() Jonathan Cameron
2026-01-09 14:45 ` Jonathan Cameron via
2026-01-09 15:45 ` [PATCH qemu v5 0/7] hw/cxl: Support Back-Invalidate (+ PCIe Flit mode) Davidlohr Bueso
2026-02-03 20:39 ` Michael S. Tsirkin
2026-02-04 11:12 ` Jonathan Cameron
2026-02-04 11:12 ` Jonathan Cameron via qemu development
2026-02-04 11:46 ` Jonathan Cameron
2026-02-04 11:46 ` Jonathan Cameron via qemu development
2026-02-05 8:15 ` Michael S. Tsirkin
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