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From: Jonathan Cameron via qemu development <qemu-devel@nongnu.org>
To: Alireza Sanaee <alireza.sanaee@huawei.com>
Cc: <qemu-devel@nongnu.org>, <lizhijian@fujitsu.com>,
	<anisa.su887@gmail.com>,  <armbru@redhat.com>, <david@kernel.org>,
	<gourry@gourry.net>, <imammedo@redhat.com>, <linuxarm@huawei.com>,
	<mst@redhat.com>, <nifan.cxl@gmail.com>, <peterx@redhat.com>,
	<philmd@linaro.org>, <ppbonzini@redhat.com>,
	<venkataravis@micron.com>, <xiaoguangrong.eric@gmail.com>
Subject: Re: [PATCH v3 1/2] hw/cxl: Use HPA in cxl_cfmws_find_device() rather than offset in window.
Date: Tue, 17 Feb 2026 10:07:19 +0000	[thread overview]
Message-ID: <20260217100719.00004f4a@huawei.com> (raw)
In-Reply-To: <20260216145219.1959-2-alireza.sanaee@huawei.com>

On Mon, 16 Feb 2026 14:52:17 +0000
Alireza Sanaee <alireza.sanaee@huawei.com> wrote:

> This function will shortly be used to help find if there is a route to a
> device, serving an HPA, under a particular fixed memory window. Rather
> than having that new use case subtract the base address in the caller,
> only to add it again in cxl_cfmws_find_device(), push the responsibility
> for calculating the HPA to the caller.
> 
> This also reduces the inconsistency in the meaning of the hwaddr
> addr parameter between this function and the calls made within it
> that access the HDM decoders that operating on HPA.
> 
> Signed-off-by: Alireza Sanaee <alireza.sanaee@huawei.com>
> Tested-by: Gregory Price <gourry@gourry.net>
> ---
>  hw/cxl/cxl-host.c | 9 ++++-----
>  1 file changed, 4 insertions(+), 5 deletions(-)
> 
> diff --git a/hw/cxl/cxl-host.c b/hw/cxl/cxl-host.c
> index f3479b1991..415a792380 100644
> --- a/hw/cxl/cxl-host.c
> +++ b/hw/cxl/cxl-host.c
> @@ -157,7 +157,8 @@ static bool cxl_hdm_find_target(uint32_t *cache_mem, hwaddr addr,
>      return found;
>  }
>  
> -static PCIDevice *cxl_cfmws_find_device(CXLFixedWindow *fw, hwaddr addr)
> +static PCIDevice *cxl_cfmws_find_device(CXLFixedWindow *fw, hwaddr addr,
> +                                        bool allow_interleave)

This is doing two things and only one is the mentioned change.
The allow_interleave parameter should be in patch 2.

It'll be a little churn heavy as we'll change a couple of lines twice,
but it won't add an unused parameter and leave us with a harder to
review pair of patches.

Fix that up and you can add
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>

Jonathan



>  {
>      CXLComponentState *hb_cstate, *usp_cstate;
>      PCIHostState *hb;
> @@ -168,8 +169,6 @@ static PCIDevice *cxl_cfmws_find_device(CXLFixedWindow *fw, hwaddr addr)
>      bool target_found;
>      PCIDevice *rp, *d;
>  
> -    /* Address is relative to memory region. Convert to HPA */
> -    addr += fw->base;
>  
>      rb_index = (addr / cxl_decode_ig(fw->enc_int_gran)) % fw->num_targets;
>      hb = PCI_HOST_BRIDGE(fw->target_hbs[rb_index]->cxl_host_bridge);
> @@ -254,7 +253,7 @@ static MemTxResult cxl_read_cfmws(void *opaque, hwaddr addr, uint64_t *data,
>      CXLFixedWindow *fw = opaque;
>      PCIDevice *d;
>  
> -    d = cxl_cfmws_find_device(fw, addr);
> +    d = cxl_cfmws_find_device(fw, addr + fw->base, true);
>      if (d == NULL) {
>          *data = 0;
>          /* Reads to invalid address return poison */
> @@ -271,7 +270,7 @@ static MemTxResult cxl_write_cfmws(void *opaque, hwaddr addr,
>      CXLFixedWindow *fw = opaque;
>      PCIDevice *d;
>  
> -    d = cxl_cfmws_find_device(fw, addr);
> +    d = cxl_cfmws_find_device(fw, addr + fw->base, true);
>      if (d == NULL) {
>          /* Writes to invalid address are silent */
>          return MEMTX_OK;



  reply	other threads:[~2026-02-17 10:07 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-16 14:52 [PATCH v3 0/2] Performant CXL type 3 non-interleaved regions Alireza Sanaee via qemu development
2026-02-16 14:52 ` [PATCH v3 1/2] hw/cxl: Use HPA in cxl_cfmws_find_device() rather than offset in window Alireza Sanaee via qemu development
2026-02-17 10:07   ` Jonathan Cameron via qemu development [this message]
2026-02-16 14:52 ` [PATCH v3 2/2] hw/cxl: Add a performant (and correct) path for the non interleaved cases Alireza Sanaee via qemu development
2026-02-17 10:14   ` Jonathan Cameron via qemu development
2026-02-17 10:01 ` [PATCH v3 0/2] Performant CXL type 3 non-interleaved regions Jonathan Cameron via qemu development

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