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From: Akhil R <akhilrajeev@nvidia.com>
To: Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Frank Li <Frank.Li@nxp.com>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Robert Moore <robert.moore@intel.com>,
	"Len Brown" <lenb@kernel.org>, Guenter Roeck <linux@roeck-us.net>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Eric Biggers <ebiggers@kernel.org>,
	"Fredrik Markstrom" <fredrik.markstrom@est.tech>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Thierry Reding <thierry.reding@kernel.org>,
	"Jon Hunter" <jonathanh@nvidia.com>,
	Suresh Mangipudi <smangipudi@nvidia.com>,
	<linux-tegra@vger.kernel.org>, <linux-i3c@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-acpi@vger.kernel.org>, <acpica-devel@lists.linux.dev>,
	<linux-hwmon@vger.kernel.org>
Cc: Akhil R <akhilrajeev@nvidia.com>
Subject: [PATCH 09/12] i3c: dw-i3c-master: Add a quirk to skip clock and reset
Date: Wed, 18 Mar 2026 22:57:22 +0530	[thread overview]
Message-ID: <20260318172820.13771-10-akhilrajeev@nvidia.com> (raw)
In-Reply-To: <20260318172820.13771-1-akhilrajeev@nvidia.com>

Some ACPI-enumerated devices like Tegra410 do not have clock and reset
resources exposed via the clk/reset frameworks. Add a match data for
such devices to skip acquiring clock and reset controls during probe.

Move match data parsing before clock/reset acquisition so the quirk is
available early enough.  When the quirk is set, fall back to reading
the clock rate from the "clock-frequency" device property instead.

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
---
 drivers/i3c/master/dw-i3c-master.c | 57 +++++++++++++++++++-----------
 1 file changed, 36 insertions(+), 21 deletions(-)

diff --git a/drivers/i3c/master/dw-i3c-master.c b/drivers/i3c/master/dw-i3c-master.c
index 05ccdf177b6d..2dae63983303 100644
--- a/drivers/i3c/master/dw-i3c-master.c
+++ b/drivers/i3c/master/dw-i3c-master.c
@@ -241,6 +241,7 @@
 /* List of quirks */
 #define AMD_I3C_OD_PP_TIMING		BIT(1)
 #define DW_I3C_DISABLE_RUNTIME_PM_QUIRK	BIT(2)
+#define DW_I3C_ACPI_SKIP_CLK_RST		BIT(3)
 
 struct dw_i3c_cmd {
 	u32 cmd_lo;
@@ -560,13 +561,26 @@ static void dw_i3c_master_set_intr_regs(struct dw_i3c_master *master)
 	writel(IBI_REQ_REJECT_ALL, master->regs + IBI_MR_REQ_REJECT);
 }
 
+static unsigned long dw_i3c_master_get_core_rate(struct dw_i3c_master *master)
+{
+	unsigned int core_rate_prop;
+
+	if (!(master->quirks & DW_I3C_ACPI_SKIP_CLK_RST))
+		return clk_get_rate(master->core_clk);
+
+	if (device_property_read_u32(master->dev, "clock-frequency", &core_rate_prop))
+		return 0;
+
+	return core_rate_prop;
+}
+
 static int dw_i3c_clk_cfg(struct dw_i3c_master *master)
 {
 	unsigned long core_rate, core_period;
 	u32 scl_timing;
 	u8 hcnt, lcnt;
 
-	core_rate = clk_get_rate(master->core_clk);
+	core_rate = dw_i3c_master_get_core_rate(master);
 	if (!core_rate)
 		return -EINVAL;
 
@@ -619,7 +633,7 @@ static int dw_i2c_clk_cfg(struct dw_i3c_master *master)
 	u16 hcnt, lcnt;
 	u32 scl_timing;
 
-	core_rate = clk_get_rate(master->core_clk);
+	core_rate = dw_i3c_master_get_core_rate(master);
 	if (!core_rate)
 		return -EINVAL;
 
@@ -1600,21 +1614,31 @@ int dw_i3c_common_probe(struct dw_i3c_master *master,
 	if (IS_ERR(master->regs))
 		return PTR_ERR(master->regs);
 
-	master->core_clk = devm_clk_get_enabled(&pdev->dev, NULL);
-	if (IS_ERR(master->core_clk))
-		return PTR_ERR(master->core_clk);
+	if (has_acpi_companion(&pdev->dev)) {
+		quirks = (unsigned long)device_get_match_data(&pdev->dev);
+	} else if (pdev->dev.of_node) {
+		drvdata = device_get_match_data(&pdev->dev);
+		if (drvdata)
+			quirks = drvdata->flags;
+	}
+	master->quirks = quirks;
+
+	if (!(master->quirks & DW_I3C_ACPI_SKIP_CLK_RST)) {
+		master->core_clk = devm_clk_get_enabled(&pdev->dev, NULL);
+		if (IS_ERR(master->core_clk))
+			return PTR_ERR(master->core_clk);
+
+		master->core_rst = devm_reset_control_get_optional_exclusive(&pdev->dev,
+									     "core_rst");
+		if (IS_ERR(master->core_rst))
+			return PTR_ERR(master->core_rst);
+		reset_control_deassert(master->core_rst);
+	}
 
 	master->pclk = devm_clk_get_optional_enabled(&pdev->dev, "pclk");
 	if (IS_ERR(master->pclk))
 		return PTR_ERR(master->pclk);
 
-	master->core_rst = devm_reset_control_get_optional_exclusive(&pdev->dev,
-								    "core_rst");
-	if (IS_ERR(master->core_rst))
-		return PTR_ERR(master->core_rst);
-
-	reset_control_deassert(master->core_rst);
-
 	spin_lock_init(&master->xferqueue.lock);
 	INIT_LIST_HEAD(&master->xferqueue.list);
 
@@ -1647,15 +1671,6 @@ int dw_i3c_common_probe(struct dw_i3c_master *master,
 	master->maxdevs = ret >> 16;
 	master->free_pos = GENMASK(master->maxdevs - 1, 0);
 
-	if (has_acpi_companion(&pdev->dev)) {
-		quirks = (unsigned long)device_get_match_data(&pdev->dev);
-	} else if (pdev->dev.of_node) {
-		drvdata = device_get_match_data(&pdev->dev);
-		if (drvdata)
-			quirks = drvdata->flags;
-	}
-	master->quirks = quirks;
-
 	/* Keep controller enabled by preventing runtime suspend */
 	if (master->quirks & DW_I3C_DISABLE_RUNTIME_PM_QUIRK)
 		pm_runtime_get_noresume(&pdev->dev);
-- 
2.50.1


WARNING: multiple messages have this Message-ID (diff)
From: Akhil R <akhilrajeev@nvidia.com>
To: Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Frank Li <Frank.Li@nxp.com>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Robert Moore <robert.moore@intel.com>,
	"Len Brown" <lenb@kernel.org>, Guenter Roeck <linux@roeck-us.net>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Eric Biggers <ebiggers@kernel.org>,
	"Fredrik Markstrom" <fredrik.markstrom@est.tech>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Thierry Reding <thierry.reding@kernel.org>,
	"Jon Hunter" <jonathanh@nvidia.com>,
	Suresh Mangipudi <smangipudi@nvidia.com>,
	<linux-tegra@vger.kernel.org>, <linux-i3c@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-acpi@vger.kernel.org>, <acpica-devel@lists.linux.dev>,
	<linux-hwmon@vger.kernel.org>
Cc: Akhil R <akhilrajeev@nvidia.com>
Subject: [PATCH 09/12] i3c: dw-i3c-master: Add a quirk to skip clock and reset
Date: Wed, 18 Mar 2026 22:57:22 +0530	[thread overview]
Message-ID: <20260318172820.13771-10-akhilrajeev@nvidia.com> (raw)
In-Reply-To: <20260318172820.13771-1-akhilrajeev@nvidia.com>

Some ACPI-enumerated devices like Tegra410 do not have clock and reset
resources exposed via the clk/reset frameworks. Add a match data for
such devices to skip acquiring clock and reset controls during probe.

Move match data parsing before clock/reset acquisition so the quirk is
available early enough.  When the quirk is set, fall back to reading
the clock rate from the "clock-frequency" device property instead.

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
---
 drivers/i3c/master/dw-i3c-master.c | 57 +++++++++++++++++++-----------
 1 file changed, 36 insertions(+), 21 deletions(-)

diff --git a/drivers/i3c/master/dw-i3c-master.c b/drivers/i3c/master/dw-i3c-master.c
index 05ccdf177b6d..2dae63983303 100644
--- a/drivers/i3c/master/dw-i3c-master.c
+++ b/drivers/i3c/master/dw-i3c-master.c
@@ -241,6 +241,7 @@
 /* List of quirks */
 #define AMD_I3C_OD_PP_TIMING		BIT(1)
 #define DW_I3C_DISABLE_RUNTIME_PM_QUIRK	BIT(2)
+#define DW_I3C_ACPI_SKIP_CLK_RST		BIT(3)
 
 struct dw_i3c_cmd {
 	u32 cmd_lo;
@@ -560,13 +561,26 @@ static void dw_i3c_master_set_intr_regs(struct dw_i3c_master *master)
 	writel(IBI_REQ_REJECT_ALL, master->regs + IBI_MR_REQ_REJECT);
 }
 
+static unsigned long dw_i3c_master_get_core_rate(struct dw_i3c_master *master)
+{
+	unsigned int core_rate_prop;
+
+	if (!(master->quirks & DW_I3C_ACPI_SKIP_CLK_RST))
+		return clk_get_rate(master->core_clk);
+
+	if (device_property_read_u32(master->dev, "clock-frequency", &core_rate_prop))
+		return 0;
+
+	return core_rate_prop;
+}
+
 static int dw_i3c_clk_cfg(struct dw_i3c_master *master)
 {
 	unsigned long core_rate, core_period;
 	u32 scl_timing;
 	u8 hcnt, lcnt;
 
-	core_rate = clk_get_rate(master->core_clk);
+	core_rate = dw_i3c_master_get_core_rate(master);
 	if (!core_rate)
 		return -EINVAL;
 
@@ -619,7 +633,7 @@ static int dw_i2c_clk_cfg(struct dw_i3c_master *master)
 	u16 hcnt, lcnt;
 	u32 scl_timing;
 
-	core_rate = clk_get_rate(master->core_clk);
+	core_rate = dw_i3c_master_get_core_rate(master);
 	if (!core_rate)
 		return -EINVAL;
 
@@ -1600,21 +1614,31 @@ int dw_i3c_common_probe(struct dw_i3c_master *master,
 	if (IS_ERR(master->regs))
 		return PTR_ERR(master->regs);
 
-	master->core_clk = devm_clk_get_enabled(&pdev->dev, NULL);
-	if (IS_ERR(master->core_clk))
-		return PTR_ERR(master->core_clk);
+	if (has_acpi_companion(&pdev->dev)) {
+		quirks = (unsigned long)device_get_match_data(&pdev->dev);
+	} else if (pdev->dev.of_node) {
+		drvdata = device_get_match_data(&pdev->dev);
+		if (drvdata)
+			quirks = drvdata->flags;
+	}
+	master->quirks = quirks;
+
+	if (!(master->quirks & DW_I3C_ACPI_SKIP_CLK_RST)) {
+		master->core_clk = devm_clk_get_enabled(&pdev->dev, NULL);
+		if (IS_ERR(master->core_clk))
+			return PTR_ERR(master->core_clk);
+
+		master->core_rst = devm_reset_control_get_optional_exclusive(&pdev->dev,
+									     "core_rst");
+		if (IS_ERR(master->core_rst))
+			return PTR_ERR(master->core_rst);
+		reset_control_deassert(master->core_rst);
+	}
 
 	master->pclk = devm_clk_get_optional_enabled(&pdev->dev, "pclk");
 	if (IS_ERR(master->pclk))
 		return PTR_ERR(master->pclk);
 
-	master->core_rst = devm_reset_control_get_optional_exclusive(&pdev->dev,
-								    "core_rst");
-	if (IS_ERR(master->core_rst))
-		return PTR_ERR(master->core_rst);
-
-	reset_control_deassert(master->core_rst);
-
 	spin_lock_init(&master->xferqueue.lock);
 	INIT_LIST_HEAD(&master->xferqueue.list);
 
@@ -1647,15 +1671,6 @@ int dw_i3c_common_probe(struct dw_i3c_master *master,
 	master->maxdevs = ret >> 16;
 	master->free_pos = GENMASK(master->maxdevs - 1, 0);
 
-	if (has_acpi_companion(&pdev->dev)) {
-		quirks = (unsigned long)device_get_match_data(&pdev->dev);
-	} else if (pdev->dev.of_node) {
-		drvdata = device_get_match_data(&pdev->dev);
-		if (drvdata)
-			quirks = drvdata->flags;
-	}
-	master->quirks = quirks;
-
 	/* Keep controller enabled by preventing runtime suspend */
 	if (master->quirks & DW_I3C_DISABLE_RUNTIME_PM_QUIRK)
 		pm_runtime_get_noresume(&pdev->dev);
-- 
2.50.1


-- 
linux-i3c mailing list
linux-i3c@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-i3c

  parent reply	other threads:[~2026-03-18 17:30 UTC|newest]

Thread overview: 114+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-18 17:27 [PATCH 00/12] i3c: Support ACPI and SETAASA device discovery Akhil R
2026-03-18 17:27 ` Akhil R
2026-03-18 17:27 ` [PATCH 01/12] dt-bindings: i3c: Add mipi-i3c-static-method to support SETAASA Akhil R
2026-03-18 17:27   ` Akhil R
2026-03-18 17:31   ` Conor Dooley
2026-03-18 17:31     ` Conor Dooley
2026-03-19  8:46     ` Akhil R
2026-03-19  8:46       ` Akhil R
2026-03-19  9:39       ` Krzysztof Kozlowski
2026-03-19  9:39         ` Krzysztof Kozlowski
2026-03-19 17:01         ` Akhil R
2026-03-19 17:01           ` Akhil R
2026-03-19 17:14           ` Krzysztof Kozlowski
2026-03-19 17:14             ` Krzysztof Kozlowski
2026-03-19 18:13             ` Akhil R
2026-03-19 18:13               ` Akhil R
2026-03-26 15:05     ` Rob Herring
2026-03-26 15:05       ` Rob Herring
2026-03-26 15:44       ` Alexandre Belloni
2026-03-26 15:44         ` Alexandre Belloni
2026-03-27  8:18         ` Akhil R
2026-03-27  8:18           ` Akhil R
2026-03-27  8:27           ` Alexandre Belloni
2026-03-27  8:27             ` Alexandre Belloni
2026-03-27 11:42             ` Akhil R
2026-03-27 11:42               ` Akhil R
2026-03-27 17:06               ` Alexandre Belloni
2026-03-27 17:06                 ` Alexandre Belloni
2026-03-30  5:26                 ` Akhil R
2026-03-30  5:26                   ` Akhil R
2026-03-18 17:27 ` [PATCH 02/12] ACPICA: Read LVR from the I2C resource descriptor Akhil R
2026-03-18 17:27   ` Akhil R
2026-03-18 17:27 ` [PATCH 03/12] i3c: master: Use unified device property interface Akhil R
2026-03-18 17:27   ` Akhil R
2026-03-19 14:22   ` Frank Li
2026-03-19 14:22     ` Frank Li
2026-03-26 15:18   ` Rob Herring
2026-03-26 15:18     ` Rob Herring
2026-03-18 17:27 ` [PATCH 04/12] i3c: master: Support ACPI enumeration Akhil R
2026-03-18 17:27   ` Akhil R
2026-03-19 14:29   ` Frank Li
2026-03-19 14:29     ` Frank Li
2026-03-19 17:45     ` Akhil R
2026-03-19 17:45       ` Akhil R
2026-03-22 16:55   ` kernel test robot
2026-03-22 16:55     ` kernel test robot
2026-03-22 17:47   ` kernel test robot
2026-03-22 17:47     ` kernel test robot
2026-03-23 18:42     ` Akhil R
2026-03-23 18:42       ` Akhil R
2026-03-23 18:54       ` Guenter Roeck
2026-03-23 18:54         ` Guenter Roeck
2026-03-24  8:43       ` Alexandre Belloni
2026-03-24  8:43         ` Alexandre Belloni
2026-03-24 17:22         ` Akhil R
2026-03-24 17:22           ` Akhil R
2026-03-25 10:59           ` Thierry Reding
2026-03-25 10:59             ` Thierry Reding
2026-03-31 10:09             ` Akhil R
2026-03-31 10:09               ` Akhil R
2026-03-18 17:27 ` [PATCH 05/12] i3c: master: Add support for devices using SETAASA Akhil R
2026-03-18 17:27   ` Akhil R
2026-03-18 17:27 ` [PATCH 06/12] i3c: master: Add support for devices without PID Akhil R
2026-03-18 17:27   ` Akhil R
2026-03-18 17:27 ` [PATCH 07/12] i3c: master: match I3C device through DT and ACPI Akhil R
2026-03-18 17:27   ` Akhil R
2026-03-18 17:27 ` [PATCH 08/12] i3c: dw-i3c-master: Add SETAASA as supported CCC Akhil R
2026-03-18 17:27   ` Akhil R
2026-03-18 17:27 ` Akhil R [this message]
2026-03-18 17:27   ` [PATCH 09/12] i3c: dw-i3c-master: Add a quirk to skip clock and reset Akhil R
2026-03-18 17:27 ` [PATCH 10/12] i3c: dw-i3c-master: Add ACPI ID for Tegra410 Akhil R
2026-03-18 17:27   ` Akhil R
2026-03-18 17:27 ` [PATCH 11/12] hwmon: spd5118: Add I3C support Akhil R
2026-03-18 17:27   ` Akhil R
2026-03-18 18:19   ` Alexandre Belloni
2026-03-18 18:19     ` Alexandre Belloni
2026-03-18 18:53   ` Guenter Roeck
2026-03-18 18:53     ` Guenter Roeck
2026-03-19  4:35     ` Akhil R
2026-03-19  4:35       ` Akhil R
2026-03-19 14:34       ` Guenter Roeck
2026-03-19 14:34         ` Guenter Roeck
2026-03-19 17:55         ` Akhil R
2026-03-19 17:55           ` Akhil R
2026-03-19 18:18           ` Guenter Roeck
2026-03-19 18:18             ` Guenter Roeck
2026-03-18 17:27 ` [PATCH 12/12] arm64: defconfig: Enable I3C and SPD5118 hwmon Akhil R
2026-03-18 17:27   ` Akhil R
2026-03-19  9:40   ` Krzysztof Kozlowski
2026-03-19  9:40     ` Krzysztof Kozlowski
2026-03-19 17:09     ` Akhil R
2026-03-19 17:09       ` Akhil R
2026-03-19 17:15       ` Krzysztof Kozlowski
2026-03-19 17:15         ` Krzysztof Kozlowski
2026-03-19 18:17         ` Akhil R
2026-03-19 18:17           ` Akhil R
2026-03-25 10:31         ` Thierry Reding
2026-03-25 10:31           ` Thierry Reding
2026-03-25 10:59           ` Krzysztof Kozlowski
2026-03-25 10:59             ` Krzysztof Kozlowski
2026-03-25 11:03             ` Krzysztof Kozlowski
2026-03-25 11:03               ` Krzysztof Kozlowski
2026-03-25 12:58               ` Thierry Reding
2026-03-25 12:58                 ` Thierry Reding
2026-03-25 13:10                 ` Krzysztof Kozlowski
2026-03-25 13:10                   ` Krzysztof Kozlowski
2026-03-25 12:41             ` Thierry Reding
2026-03-25 12:41               ` Thierry Reding
2026-03-25 12:47               ` Krzysztof Kozlowski
2026-03-25 12:47                 ` Krzysztof Kozlowski
2026-03-25 13:05                 ` Thierry Reding
2026-03-25 13:05                   ` Thierry Reding
2026-03-25 13:13                   ` Krzysztof Kozlowski
2026-03-25 13:13                     ` Krzysztof Kozlowski

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