From: Conor Dooley <conor@kernel.org>
To: linux-riscv@lists.infradead.org, Conor Dooley <conor@kernel.org>
Cc: Conor Dooley <conor.dooley@microchip.com>,
Daire McNamara <daire.mcnamara@microchip.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/3] pic64gx semantic conflict "fixes"
Date: Wed, 8 Apr 2026 18:04:40 +0100 [thread overview]
Message-ID: <20260408-overwrite-expiring-82891c334a1a@spud> (raw)
In-Reply-To: <20260407-rely-speculate-dae3a81ea1fc@spud>
From: Conor Dooley <conor.dooley@microchip.com>
On Tue, 07 Apr 2026 16:36:22 +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> CC: Conor Dooley <conor.dooley@microchip.com>
> CC: Daire McNamara <daire.mcnamara@microchip.com>
> CC: Rob Herring <robh@kernel.org>
> CC: Krzysztof Kozlowski <krzk+dt@kernel.org>
> CC: Paul Walmsley <pjw@kernel.org>
> CC: Palmer Dabbelt <palmer@dabbelt.com>
> CC: Albert Ou <aou@eecs.berkeley.edu>
> CC: Alexandre Ghiti <alex@ghiti.fr>
> CC: linux-riscv@lists.infradead.org
> CC: devicetree@vger.kernel.org
> CC: linux-kernel@vger.kernel.org
>
> [...]
Applied to riscv-dt-for-next, thanks!
[1/3] riscv: dts: microchip: add tsu clock to macb on pic64gx
https://git.kernel.org/conor/c/89991efc78d7
[2/3] riscv: dts: microchip: update pic64gx gpio interrupts to better match the SoC
https://git.kernel.org/conor/c/53c013c3b27b
[3/3] riscv: dts: microchip: sort pic64gx i2c nodes alphanumerically
https://git.kernel.org/conor/c/ae488e2669f3
Thanks,
Conor.
WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor@kernel.org>
To: linux-riscv@lists.infradead.org, Conor Dooley <conor@kernel.org>
Cc: Conor Dooley <conor.dooley@microchip.com>,
Daire McNamara <daire.mcnamara@microchip.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 0/3] pic64gx semantic conflict "fixes"
Date: Wed, 8 Apr 2026 18:04:40 +0100 [thread overview]
Message-ID: <20260408-overwrite-expiring-82891c334a1a@spud> (raw)
In-Reply-To: <20260407-rely-speculate-dae3a81ea1fc@spud>
From: Conor Dooley <conor.dooley@microchip.com>
On Tue, 07 Apr 2026 16:36:22 +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> CC: Conor Dooley <conor.dooley@microchip.com>
> CC: Daire McNamara <daire.mcnamara@microchip.com>
> CC: Rob Herring <robh@kernel.org>
> CC: Krzysztof Kozlowski <krzk+dt@kernel.org>
> CC: Paul Walmsley <pjw@kernel.org>
> CC: Palmer Dabbelt <palmer@dabbelt.com>
> CC: Albert Ou <aou@eecs.berkeley.edu>
> CC: Alexandre Ghiti <alex@ghiti.fr>
> CC: linux-riscv@lists.infradead.org
> CC: devicetree@vger.kernel.org
> CC: linux-kernel@vger.kernel.org
>
> [...]
Applied to riscv-dt-for-next, thanks!
[1/3] riscv: dts: microchip: add tsu clock to macb on pic64gx
https://git.kernel.org/conor/c/89991efc78d7
[2/3] riscv: dts: microchip: update pic64gx gpio interrupts to better match the SoC
https://git.kernel.org/conor/c/53c013c3b27b
[3/3] riscv: dts: microchip: sort pic64gx i2c nodes alphanumerically
https://git.kernel.org/conor/c/ae488e2669f3
Thanks,
Conor.
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2026-04-08 17:04 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-07 15:36 [PATCH 0/3] pic64gx semantic conflict "fixes" Conor Dooley
2026-04-07 15:36 ` Conor Dooley
2026-04-07 15:36 ` [PATCH 1/3] riscv: dts: microchip: add tsu clock to macb on pic64gx Conor Dooley
2026-04-07 15:36 ` Conor Dooley
2026-04-07 15:36 ` [PATCH 2/3] riscv: dts: microchip: update pic64gx gpio interrupts to better match the SoC Conor Dooley
2026-04-07 15:36 ` Conor Dooley
2026-04-07 15:36 ` [PATCH 3/3] riscv: dts: microchip: sort pic64gx i2c nodes alphanumerically Conor Dooley
2026-04-07 15:36 ` Conor Dooley
2026-04-08 17:04 ` Conor Dooley [this message]
2026-04-08 17:04 ` [PATCH 0/3] pic64gx semantic conflict "fixes" Conor Dooley
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260408-overwrite-expiring-82891c334a1a@spud \
--to=conor@kernel.org \
--cc=alex@ghiti.fr \
--cc=aou@eecs.berkeley.edu \
--cc=conor.dooley@microchip.com \
--cc=daire.mcnamara@microchip.com \
--cc=devicetree@vger.kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=pjw@kernel.org \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.