From: Vladimir Oltean <vladimir.oltean@nxp.com>
To: Frank Wunderlich <linux@fw-web.de>,
"Chester A. Unal" <chester.a.unal@arinc9.com>,
Felix Fietkau <nbd@nbd.name>
Cc: Alexander Couzens <lynxis@fe80.eu>,
Daniel Golle <daniel@makrotopia.org>,
Andrew Lunn <andrew@lunn.ch>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Frank Wunderlich <frank-w@public-files.de>,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org
Subject: Re: [RFC net PATCH v1] net: pcs: pcs-mtk-lynxi: fix bpi-r3 serdes configuration
Date: Thu, 9 Apr 2026 19:49:42 +0300 [thread overview]
Message-ID: <20260409164942.wbmwtkpd5d5zibyy@skbuf> (raw)
In-Reply-To: <20260409133344.129620-1-linux@fw-web.de>
On Thu, Apr 09, 2026 at 03:33:42PM +0200, Frank Wunderlich wrote:
> From: Frank Wunderlich <frank-w@public-files.de>
>
> Commit 8871389da151 introduces common pcs dts properties which writes
> rx=normal,tx=normal polarity to register SGMSYS_QPHY_WRAP_CTRL of switch.
> This is initialized with tx-bit set and so change inverts polarity
> compared to before.
>
> It looks like mt7531 has tx polarity inverted in hardware and set tx-bit
> by default to restore the normal polarity.
>
> Till this patch the register write was only called when mediatek,pnswap
> property was set which cannot be done for switch because the fw-node param
> was always NULL from switch driver in the mtk_pcs_lynxi_create call.
>
> Do not configure switch side like it's done before.
>
> Fixes: 8871389da151 ("net: pcs: pcs-mtk-lynxi: deprecate "mediatek,pnswap"")
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
> ---
> drivers/net/pcs/pcs-mtk-lynxi.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/net/pcs/pcs-mtk-lynxi.c b/drivers/net/pcs/pcs-mtk-lynxi.c
> index c12f8087af9b..a753bd88cbc2 100644
> --- a/drivers/net/pcs/pcs-mtk-lynxi.c
> +++ b/drivers/net/pcs/pcs-mtk-lynxi.c
> @@ -129,6 +129,9 @@ static int mtk_pcs_config_polarity(struct mtk_pcs_lynxi *mpcs,
> unsigned int val = 0;
> int ret;
>
> + if (!fwnode)
> + return 0;
> +
> if (fwnode_property_read_bool(fwnode, "mediatek,pnswap"))
> default_pol = PHY_POL_INVERT;
>
> --
> 2.43.0
>
I notice Arınc, listed by ./scripts/get_maintainer.pl drivers/net/dsa/mt7530.c,
and Felix, listed by ./scripts/get_maintainer.pl drivers/net/ethernet/mediatek/mtk_eth_soc.c,
are not on CC. Maybe they have more info.
Only the switch port has a chance of having a non-zero default polarity
setting? (coming from the efuse, if I understood this discussion properly)
https://lore.kernel.org/netdev/C59EED96-3973-4074-A4D8-C264949D447E@linux.dev/
The GMAC doesn't?
WARNING: multiple messages have this Message-ID (diff)
From: Vladimir Oltean <vladimir.oltean@nxp.com>
To: Frank Wunderlich <linux@fw-web.de>,
"Chester A. Unal" <chester.a.unal@arinc9.com>,
Felix Fietkau <nbd@nbd.name>
Cc: Andrew Lunn <andrew@lunn.ch>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
netdev@vger.kernel.org, linux-mediatek@lists.infradead.org,
Russell King <linux@armlinux.org.uk>,
Daniel Golle <daniel@makrotopia.org>,
Eric Dumazet <edumazet@google.com>,
Alexander Couzens <lynxis@fe80.eu>,
linux-arm-kernel@lists.infradead.org,
Matthias Brugger <matthias.bgg@gmail.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
"David S. Miller" <davem@davemloft.net>,
linux-kernel@vger.kernel.org,
Heiner Kallweit <hkallweit1@gmail.com>
Subject: Re: [RFC net PATCH v1] net: pcs: pcs-mtk-lynxi: fix bpi-r3 serdes configuration
Date: Thu, 9 Apr 2026 19:49:42 +0300 [thread overview]
Message-ID: <20260409164942.wbmwtkpd5d5zibyy@skbuf> (raw)
In-Reply-To: <20260409133344.129620-1-linux@fw-web.de>
On Thu, Apr 09, 2026 at 03:33:42PM +0200, Frank Wunderlich wrote:
> From: Frank Wunderlich <frank-w@public-files.de>
>
> Commit 8871389da151 introduces common pcs dts properties which writes
> rx=normal,tx=normal polarity to register SGMSYS_QPHY_WRAP_CTRL of switch.
> This is initialized with tx-bit set and so change inverts polarity
> compared to before.
>
> It looks like mt7531 has tx polarity inverted in hardware and set tx-bit
> by default to restore the normal polarity.
>
> Till this patch the register write was only called when mediatek,pnswap
> property was set which cannot be done for switch because the fw-node param
> was always NULL from switch driver in the mtk_pcs_lynxi_create call.
>
> Do not configure switch side like it's done before.
>
> Fixes: 8871389da151 ("net: pcs: pcs-mtk-lynxi: deprecate "mediatek,pnswap"")
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
> ---
> drivers/net/pcs/pcs-mtk-lynxi.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/net/pcs/pcs-mtk-lynxi.c b/drivers/net/pcs/pcs-mtk-lynxi.c
> index c12f8087af9b..a753bd88cbc2 100644
> --- a/drivers/net/pcs/pcs-mtk-lynxi.c
> +++ b/drivers/net/pcs/pcs-mtk-lynxi.c
> @@ -129,6 +129,9 @@ static int mtk_pcs_config_polarity(struct mtk_pcs_lynxi *mpcs,
> unsigned int val = 0;
> int ret;
>
> + if (!fwnode)
> + return 0;
> +
> if (fwnode_property_read_bool(fwnode, "mediatek,pnswap"))
> default_pol = PHY_POL_INVERT;
>
> --
> 2.43.0
>
I notice Arınc, listed by ./scripts/get_maintainer.pl drivers/net/dsa/mt7530.c,
and Felix, listed by ./scripts/get_maintainer.pl drivers/net/ethernet/mediatek/mtk_eth_soc.c,
are not on CC. Maybe they have more info.
Only the switch port has a chance of having a non-zero default polarity
setting? (coming from the efuse, if I understood this discussion properly)
https://lore.kernel.org/netdev/C59EED96-3973-4074-A4D8-C264949D447E@linux.dev/
The GMAC doesn't?
next prev parent reply other threads:[~2026-04-09 16:50 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-09 13:33 [RFC net PATCH v1] net: pcs: pcs-mtk-lynxi: fix bpi-r3 serdes configuration Frank Wunderlich
2026-04-09 13:33 ` Frank Wunderlich
2026-04-09 16:49 ` Vladimir Oltean [this message]
2026-04-09 16:49 ` Vladimir Oltean
2026-04-09 20:55 ` Daniel Golle
2026-04-09 20:55 ` Daniel Golle
2026-04-09 21:52 ` Vladimir Oltean
2026-04-09 21:52 ` Vladimir Oltean
2026-04-09 21:55 ` Vladimir Oltean
2026-04-09 21:55 ` Vladimir Oltean
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