From: Jakub Kicinski <kuba@kernel.org>
To: Grzegorz Nitka <grzegorz.nitka@intel.com>
Cc: ivecera@redhat.com, vadim.fedorenko@linux.dev, jiri@resnulli.us,
edumazet@google.com, netdev@vger.kernel.org,
richardcochran@gmail.com, donald.hunter@gmail.com,
linux-kernel@vger.kernel.org, arkadiusz.kubalewski@intel.com,
Prathosh.Satish@microchip.com, andrew+netdev@lunn.ch,
intel-wired-lan@lists.osuosl.org, horms@kernel.org,
przemyslaw.kitszel@intel.com, anthony.l.nguyen@intel.com,
pabeni@redhat.com, davem@davemloft.net
Subject: Re: [Intel-wired-lan] [PATCH v6 net-next 0/8] dpll/ice: Add TXC DPLL type and full TX reference clock control for E825
Date: Thu, 9 Apr 2026 17:33:49 -0700 [thread overview]
Message-ID: <20260409173349.61d98cfd@kernel.org> (raw)
In-Reply-To: <20260409235122.436749-1-grzegorz.nitka@intel.com>
On Fri, 10 Apr 2026 01:51:14 +0200 Grzegorz Nitka wrote:
> NOTE: This series is intentionally submitted on net-next (not
> intel-wired-lan) as early feedback of DPLL subsystem changes is
> welcomed. In the past possible approaches were discussed in [1].
I LOVE when someone takes 3 days to respond but then posts the next
version the same day.
WARNING: multiple messages have this Message-ID (diff)
From: Jakub Kicinski <kuba@kernel.org>
To: Grzegorz Nitka <grzegorz.nitka@intel.com>
Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
intel-wired-lan@lists.osuosl.org, poros@redhat.com,
richardcochran@gmail.com, andrew+netdev@lunn.ch,
przemyslaw.kitszel@intel.com, anthony.l.nguyen@intel.com,
Prathosh.Satish@microchip.com, ivecera@redhat.com,
jiri@resnulli.us, arkadiusz.kubalewski@intel.com,
vadim.fedorenko@linux.dev, donald.hunter@gmail.com,
horms@kernel.org, pabeni@redhat.com, davem@davemloft.net,
edumazet@google.com
Subject: Re: [PATCH v6 net-next 0/8] dpll/ice: Add TXC DPLL type and full TX reference clock control for E825
Date: Thu, 9 Apr 2026 17:33:49 -0700 [thread overview]
Message-ID: <20260409173349.61d98cfd@kernel.org> (raw)
In-Reply-To: <20260409235122.436749-1-grzegorz.nitka@intel.com>
On Fri, 10 Apr 2026 01:51:14 +0200 Grzegorz Nitka wrote:
> NOTE: This series is intentionally submitted on net-next (not
> intel-wired-lan) as early feedback of DPLL subsystem changes is
> welcomed. In the past possible approaches were discussed in [1].
I LOVE when someone takes 3 days to respond but then posts the next
version the same day.
next prev parent reply other threads:[~2026-04-10 0:33 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-09 23:51 [Intel-wired-lan] [PATCH v6 net-next 0/8] dpll/ice: Add TXC DPLL type and full TX reference clock control for E825 Grzegorz Nitka
2026-04-09 23:51 ` Grzegorz Nitka
2026-04-09 23:51 ` [Intel-wired-lan] [PATCH v6 net-next 1/8] dpll: add new DPLL type for transmit clock (TXC) usage Grzegorz Nitka
2026-04-09 23:51 ` Grzegorz Nitka
2026-04-09 23:51 ` [Intel-wired-lan] [PATCH v6 net-next 2/8] dpll: allow registering FW-identified pin with a different DPLL Grzegorz Nitka
2026-04-09 23:51 ` Grzegorz Nitka
2026-04-09 23:51 ` [Intel-wired-lan] [PATCH v6 net-next 3/8] dpll: extend pin notifier and netlink events with notification source ID Grzegorz Nitka
2026-04-09 23:51 ` Grzegorz Nitka
2026-04-09 23:51 ` [Intel-wired-lan] [PATCH v6 net-next 4/8] dpll: zl3073x: allow SyncE_Ref pin state change Grzegorz Nitka
2026-04-09 23:51 ` Grzegorz Nitka
2026-04-09 23:51 ` [Intel-wired-lan] [PATCH v6 net-next 5/8] ice: introduce TXC DPLL device and TX ref clock pin framework for E825 Grzegorz Nitka
2026-04-09 23:51 ` Grzegorz Nitka
2026-04-09 23:51 ` [Intel-wired-lan] [PATCH v6 net-next 6/8] ice: implement CPI support for E825C Grzegorz Nitka
2026-04-09 23:51 ` Grzegorz Nitka
2026-04-30 11:40 ` [Intel-wired-lan] " Loktionov, Aleksandr
2026-04-30 11:40 ` Loktionov, Aleksandr
2026-04-09 23:51 ` [Intel-wired-lan] [PATCH v6 net-next 7/8] ice: add Tx reference clock index handling to AN restart command Grzegorz Nitka
2026-04-09 23:51 ` Grzegorz Nitka
2026-04-30 11:44 ` [Intel-wired-lan] " Loktionov, Aleksandr
2026-04-30 11:44 ` Loktionov, Aleksandr
2026-04-09 23:51 ` [Intel-wired-lan] [PATCH v6 net-next 8/8] ice: implement E825 TX ref clock control and TXC hardware sync status Grzegorz Nitka
2026-04-09 23:51 ` Grzegorz Nitka
2026-04-10 0:33 ` Jakub Kicinski [this message]
2026-04-10 0:33 ` [PATCH v6 net-next 0/8] dpll/ice: Add TXC DPLL type and full TX reference clock control for E825 Jakub Kicinski
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