[PATCH 3/4] drm/i915/psr: Apply Intel DPCD workaround when SDP on prior line used

[PATCH 3/4] drm/i915/psr: Apply Intel DPCD workaround when SDP on prior line used

[Jouni Högander]

There is Intel specific workaround DPCD address containing workaround for
case where SDP is on prior line. Apply this workaround according to values
in the offset.

Fixes: 61e887329e33 ("drm/i915/xelpd: Handle PSR2 SDP indication in the prior scanline")
Cc: <stable@vger.kernel.org> # v5.15+
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 36 +++++++++++++++++++++---
 1 file changed, 32 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 1f3f0d35d52a..341186622ed4 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1385,9 +1385,36 @@ static bool psr2_granularity_check(struct intel_crtc_state *crtc_state,
 	return true;
 }
 
-static bool _compute_psr2_sdp_prior_scanline_indication(struct intel_dp *intel_dp,
-							struct intel_crtc_state *crtc_state)
+static bool apply_scanline_indication_wa(struct intel_crtc_state *crtc_state,
+					 struct intel_connector *connector)
 {
+	struct intel_dp *intel_dp = intel_attached_dp(connector);
+	u8 early_scanline_support = connector->dp.psr_caps.intel_wa_dpcd &
+		INTEL_WA_REGISTER_CAPS_PSR2_EARLYSCANLINE_SDP_SUPPORT_MASK;
+
+	if (intel_dp->edp_dpcd[0] >= DP_EDP_15)
+		return true;
+
+	switch(early_scanline_support)
+	{
+	case INTEL_WA_REGISTER_CAPS_FALL_BACK_TO_PSR1:
+		crtc_state->req_psr2_sdp_prior_scanline = false;
+		return false;
+	case INTEL_WA_REGISTER_CAPS_PSR2_WITH_EARLY_SCANLINE:
+		return true;
+	case INTEL_WA_REGISTER_CAPS_PSR2_WITHOUT_EARLY_SCANLINE:
+		crtc_state->req_psr2_sdp_prior_scanline = false;
+		return true;
+	default:
+		MISSING_CASE(early_scanline_support);
+		return false;
+	}
+}
+
+static bool _compute_psr2_sdp_prior_scanline_indication(struct intel_crtc_state *crtc_state,
+							struct intel_connector *connector)
+{
+	struct intel_dp *intel_dp = intel_attached_dp(connector);
 	struct intel_display *display = to_intel_display(intel_dp);
 	const struct drm_display_mode *adjusted_mode = &crtc_state->uapi.adjusted_mode;
 	u32 hblank_total, hblank_ns, req_ns;
@@ -1406,7 +1433,8 @@ static bool _compute_psr2_sdp_prior_scanline_indication(struct intel_dp *intel_d
 		return false;
 
 	crtc_state->req_psr2_sdp_prior_scanline = true;
-	return true;
+
+	return apply_scanline_indication_wa(crtc_state, connector);
 }
 
 static int intel_psr_entry_setup_frames(struct intel_dp *intel_dp,
@@ -1687,7 +1715,7 @@ static bool intel_sel_update_config_valid(struct intel_crtc_state *crtc_state,
 								      conn_state))
 		goto unsupported;
 
-	if (!_compute_psr2_sdp_prior_scanline_indication(intel_dp, crtc_state)) {
+	if (!_compute_psr2_sdp_prior_scanline_indication(crtc_state, connector)) {
 		drm_dbg_kms(display->drm,
 			    "Selective update not enabled, SDP indication do not fit in hblank\n");
 		goto unsupported;
-- 
2.43.0

[PATCH 0/4] PSR2 SDP on Prior Scanline workarounds

[Jouni Högander]

This patch set implements two workarounds:

1. There are problem in PSR2 SDP on Prior Scanline implementation in
   several panels due to eDP1.4b spec ambiguity. Two tackle this there is
   Intel specific DPCD register for panel to indicate implementation
   compatibility with Intel source implementation. eDP1.5 doesn't have
   this problem.

2. In NVL there is an HW optimization done. When there is an SU triggered in
   Capture state, Link will be kept ON post Capture CRC SDP. Before valid SU
   pixels Intel source will transmit dummy pixels. Some TCONS are improperly
   considering these dummy pixels as a valid pixel data. Prior NVL link was
   was turned of even if there was SU triggered in Capture state and no dummy
   pixels were transmitted. These dummy pixels are problem only if SDP on
   prior scanline is used and Early Transport is not in use. The workaround is
   to start SU area always at scanline 0.

Jouni Högander (4):
  drm/i915/psr: Add defininitions for INTEL_WA_REGISTER_CAPS DPCD
    register
  drm/i915/psr: Read Intel DPCD workaround register
  drm/i915/psr: Apply Intel DPCD workaround when SDP on prior line used
  drm/i915/psr: Apply SDP on prior scanline workaround for NVL

 .../drm/i915/display/intel_display_types.h    |  1 +
 drivers/gpu/drm/i915/display/intel_dpcd.h     | 15 ++++++
 drivers/gpu/drm/i915/display/intel_psr.c      | 49 +++++++++++++++++--
 3 files changed, 60 insertions(+), 5 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/display/intel_dpcd.h

-- 
2.43.0

[PATCH 3/4] drm/i915/psr: Apply Intel DPCD workaround when SDP on prior line used

[Jouni Högander]

There is Intel specific workaround DPCD address containing workaround for
case where SDP is on prior line. Apply this workaround according to values
in the offset.

Fixes: 61e887329e33 ("drm/i915/xelpd: Handle PSR2 SDP indication in the prior scanline")
Cc: <stable@vger.kernel.org> # v5.15+
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 36 +++++++++++++++++++++---
 1 file changed, 32 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 1f3f0d35d52a..341186622ed4 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1385,9 +1385,36 @@ static bool psr2_granularity_check(struct intel_crtc_state *crtc_state,
 	return true;
 }
 
-static bool _compute_psr2_sdp_prior_scanline_indication(struct intel_dp *intel_dp,
-							struct intel_crtc_state *crtc_state)
+static bool apply_scanline_indication_wa(struct intel_crtc_state *crtc_state,
+					 struct intel_connector *connector)
 {
+	struct intel_dp *intel_dp = intel_attached_dp(connector);
+	u8 early_scanline_support = connector->dp.psr_caps.intel_wa_dpcd &
+		INTEL_WA_REGISTER_CAPS_PSR2_EARLYSCANLINE_SDP_SUPPORT_MASK;
+
+	if (intel_dp->edp_dpcd[0] >= DP_EDP_15)
+		return true;
+
+	switch(early_scanline_support)
+	{
+	case INTEL_WA_REGISTER_CAPS_FALL_BACK_TO_PSR1:
+		crtc_state->req_psr2_sdp_prior_scanline = false;
+		return false;
+	case INTEL_WA_REGISTER_CAPS_PSR2_WITH_EARLY_SCANLINE:
+		return true;
+	case INTEL_WA_REGISTER_CAPS_PSR2_WITHOUT_EARLY_SCANLINE:
+		crtc_state->req_psr2_sdp_prior_scanline = false;
+		return true;
+	default:
+		MISSING_CASE(early_scanline_support);
+		return false;
+	}
+}
+
+static bool _compute_psr2_sdp_prior_scanline_indication(struct intel_crtc_state *crtc_state,
+							struct intel_connector *connector)
+{
+	struct intel_dp *intel_dp = intel_attached_dp(connector);
 	struct intel_display *display = to_intel_display(intel_dp);
 	const struct drm_display_mode *adjusted_mode = &crtc_state->uapi.adjusted_mode;
 	u32 hblank_total, hblank_ns, req_ns;
@@ -1406,7 +1433,8 @@ static bool _compute_psr2_sdp_prior_scanline_indication(struct intel_dp *intel_d
 		return false;
 
 	crtc_state->req_psr2_sdp_prior_scanline = true;
-	return true;
+
+	return apply_scanline_indication_wa(crtc_state, connector);
 }
 
 static int intel_psr_entry_setup_frames(struct intel_dp *intel_dp,
@@ -1687,7 +1715,7 @@ static bool intel_sel_update_config_valid(struct intel_crtc_state *crtc_state,
 								      conn_state))
 		goto unsupported;
 
-	if (!_compute_psr2_sdp_prior_scanline_indication(intel_dp, crtc_state)) {
+	if (!_compute_psr2_sdp_prior_scanline_indication(crtc_state, connector)) {
 		drm_dbg_kms(display->drm,
 			    "Selective update not enabled, SDP indication do not fit in hblank\n");
 		goto unsupported;
-- 
2.43.0

RE: [PATCH 3/4] drm/i915/psr: Apply Intel DPCD workaround when SDP on prior line used

[Kandpal, Suraj]

> Subject: [PATCH 3/4] drm/i915/psr: Apply Intel DPCD workaround when SDP on
> prior line used
> 
> There is Intel specific workaround DPCD address containing workaround for
> case where SDP is on prior line. Apply this workaround according to values in
> the offset.
> 
> Fixes: 61e887329e33 ("drm/i915/xelpd: Handle PSR2 SDP indication in the prior
> scanline")
> Cc: <stable@vger.kernel.org> # v5.15+
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 36 +++++++++++++++++++++---
>  1 file changed, 32 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 1f3f0d35d52a..341186622ed4 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1385,9 +1385,36 @@ static bool psr2_granularity_check(struct
> intel_crtc_state *crtc_state,
>  	return true;
>  }
> 
> -static bool _compute_psr2_sdp_prior_scanline_indication(struct intel_dp
> *intel_dp,
> -							struct intel_crtc_state
> *crtc_state)
> +static bool apply_scanline_indication_wa(struct intel_crtc_state *crtc_state,
> +					 struct intel_connector *connector)

Should the name be apply_scanline_indicate, since you are not applying the wa here just sort of checking if it needs to be done

Regards,
Suraj Kandpal

>  {
> +	struct intel_dp *intel_dp = intel_attached_dp(connector);
> +	u8 early_scanline_support = connector->dp.psr_caps.intel_wa_dpcd &
> +
> 	INTEL_WA_REGISTER_CAPS_PSR2_EARLYSCANLINE_SDP_SUPPORT_MA
> SK;
> +
> +	if (intel_dp->edp_dpcd[0] >= DP_EDP_15)
> +		return true;
> +
> +	switch(early_scanline_support)
> +	{
> +	case INTEL_WA_REGISTER_CAPS_FALL_BACK_TO_PSR1:
> +		crtc_state->req_psr2_sdp_prior_scanline = false;
> +		return false;
> +	case INTEL_WA_REGISTER_CAPS_PSR2_WITH_EARLY_SCANLINE:
> +		return true;
> +	case INTEL_WA_REGISTER_CAPS_PSR2_WITHOUT_EARLY_SCANLINE:
> +		crtc_state->req_psr2_sdp_prior_scanline = false;
> +		return true;
> +	default:
> +		MISSING_CASE(early_scanline_support);
> +		return false;
> +	}
> +}
> +
> +static bool _compute_psr2_sdp_prior_scanline_indication(struct
> intel_crtc_state *crtc_state,
> +							struct intel_connector
> *connector) {
> +	struct intel_dp *intel_dp = intel_attached_dp(connector);
>  	struct intel_display *display = to_intel_display(intel_dp);
>  	const struct drm_display_mode *adjusted_mode = &crtc_state-
> >uapi.adjusted_mode;
>  	u32 hblank_total, hblank_ns, req_ns;
> @@ -1406,7 +1433,8 @@ static bool
> _compute_psr2_sdp_prior_scanline_indication(struct intel_dp *intel_d
>  		return false;
> 
>  	crtc_state->req_psr2_sdp_prior_scanline = true;
> -	return true;
> +
> +	return apply_scanline_indication_wa(crtc_state, connector);
>  }
> 
>  static int intel_psr_entry_setup_frames(struct intel_dp *intel_dp, @@ -1687,7
> +1715,7 @@ static bool intel_sel_update_config_valid(struct intel_crtc_state
> *crtc_state,
> 
> conn_state))
>  		goto unsupported;
> 
> -	if (!_compute_psr2_sdp_prior_scanline_indication(intel_dp,
> crtc_state)) {
> +	if (!_compute_psr2_sdp_prior_scanline_indication(crtc_state,
> +connector)) {
>  		drm_dbg_kms(display->drm,
>  			    "Selective update not enabled, SDP indication do not
> fit in hblank\n");
>  		goto unsupported;
> --
> 2.43.0

Re: [PATCH 3/4] drm/i915/psr: Apply Intel DPCD workaround when SDP on prior line used

[Hogander, Jouni]

On Wed, 2026-05-06 at 07:24 +0000, Kandpal, Suraj wrote:
> > Subject: [PATCH 3/4] drm/i915/psr: Apply Intel DPCD workaround when
> > SDP on
> > prior line used
> > 
> > There is Intel specific workaround DPCD address containing
> > workaround for
> > case where SDP is on prior line. Apply this workaround according to
> > values in
> > the offset.
> > 
> > Fixes: 61e887329e33 ("drm/i915/xelpd: Handle PSR2 SDP indication in
> > the prior
> > scanline")
> > Cc: <stable@vger.kernel.org> # v5.15+
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_psr.c | 36
> > +++++++++++++++++++++---
> >  1 file changed, 32 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 1f3f0d35d52a..341186622ed4 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -1385,9 +1385,36 @@ static bool psr2_granularity_check(struct
> > intel_crtc_state *crtc_state,
> >  	return true;
> >  }
> > 
> > -static bool _compute_psr2_sdp_prior_scanline_indication(struct
> > intel_dp
> > *intel_dp,
> > -							struct
> > intel_crtc_state
> > *crtc_state)
> > +static bool apply_scanline_indication_wa(struct intel_crtc_state
> > *crtc_state,
> > +					 struct intel_connector
> > *connector)
> 
> Should the name be apply_scanline_indicate, since you are not
> applying the wa here just sort of checking if it needs to be done

It is actually appying WA. I.e. disabling req_psr2_sdp_prior_scanline
if panel is not inline with the eDP1.4b SDP on prior scanline
implementation in intel HW. What do you think?

BR,
Jouni Högander

> 
> Regards,
> Suraj Kandpal
> 
> >  {
> > +	struct intel_dp *intel_dp = intel_attached_dp(connector);
> > +	u8 early_scanline_support = connector-
> > >dp.psr_caps.intel_wa_dpcd &
> > +
> > 	INTEL_WA_REGISTER_CAPS_PSR2_EARLYSCANLINE_SDP_SUPPORT_MA
> > SK;
> > +
> > +	if (intel_dp->edp_dpcd[0] >= DP_EDP_15)
> > +		return true;
> > +
> > +	switch(early_scanline_support)
> > +	{
> > +	case INTEL_WA_REGISTER_CAPS_FALL_BACK_TO_PSR1:
> > +		crtc_state->req_psr2_sdp_prior_scanline = false;
> > +		return false;
> > +	case INTEL_WA_REGISTER_CAPS_PSR2_WITH_EARLY_SCANLINE:
> > +		return true;
> > +	case INTEL_WA_REGISTER_CAPS_PSR2_WITHOUT_EARLY_SCANLINE:
> > +		crtc_state->req_psr2_sdp_prior_scanline = false;
> > +		return true;
> > +	default:
> > +		MISSING_CASE(early_scanline_support);
> > +		return false;
> > +	}
> > +}
> > +
> > +static bool _compute_psr2_sdp_prior_scanline_indication(struct
> > intel_crtc_state *crtc_state,
> > +							struct
> > intel_connector
> > *connector) {
> > +	struct intel_dp *intel_dp = intel_attached_dp(connector);
> >  	struct intel_display *display =
> > to_intel_display(intel_dp);
> >  	const struct drm_display_mode *adjusted_mode =
> > &crtc_state-
> > > uapi.adjusted_mode;
> >  	u32 hblank_total, hblank_ns, req_ns;
> > @@ -1406,7 +1433,8 @@ static bool
> > _compute_psr2_sdp_prior_scanline_indication(struct intel_dp
> > *intel_d
> >  		return false;
> > 
> >  	crtc_state->req_psr2_sdp_prior_scanline = true;
> > -	return true;
> > +
> > +	return apply_scanline_indication_wa(crtc_state,
> > connector);
> >  }
> > 
> >  static int intel_psr_entry_setup_frames(struct intel_dp *intel_dp,
> > @@ -1687,7
> > +1715,7 @@ static bool intel_sel_update_config_valid(struct
> > intel_crtc_state
> > *crtc_state,
> > 
> > conn_state))
> >  		goto unsupported;
> > 
> > -	if (!_compute_psr2_sdp_prior_scanline_indication(intel_dp,
> > crtc_state)) {
> > +	if
> > (!_compute_psr2_sdp_prior_scanline_indication(crtc_state,
> > +connector)) {
> >  		drm_dbg_kms(display->drm,
> >  			    "Selective update not enabled, SDP
> > indication do not
> > fit in hblank\n");
> >  		goto unsupported;
> > --
> > 2.43.0
> 

RE: [PATCH 3/4] drm/i915/psr: Apply Intel DPCD workaround when SDP on prior line used

[Kandpal, Suraj]

> Subject: Re: [PATCH 3/4] drm/i915/psr: Apply Intel DPCD workaround when SDP
> on prior line used
> 
> On Wed, 2026-05-06 at 07:24 +0000, Kandpal, Suraj wrote:
> > > Subject: [PATCH 3/4] drm/i915/psr: Apply Intel DPCD workaround when
> > > SDP on prior line used
> > >
> > > There is Intel specific workaround DPCD address containing
> > > workaround for case where SDP is on prior line. Apply this
> > > workaround according to values in the offset.
> > >
> > > Fixes: 61e887329e33 ("drm/i915/xelpd: Handle PSR2 SDP indication in
> > > the prior
> > > scanline")
> > > Cc: <stable@vger.kernel.org> # v5.15+
> > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_psr.c | 36
> > > +++++++++++++++++++++---
> > >  1 file changed, 32 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > index 1f3f0d35d52a..341186622ed4 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > @@ -1385,9 +1385,36 @@ static bool psr2_granularity_check(struct
> > > intel_crtc_state *crtc_state,
> > >  	return true;
> > >  }
> > >
> > > -static bool _compute_psr2_sdp_prior_scanline_indication(struct
> > > intel_dp
> > > *intel_dp,
> > > -							struct
> > > intel_crtc_state
> > > *crtc_state)
> > > +static bool apply_scanline_indication_wa(struct intel_crtc_state
> > > *crtc_state,
> > > +					 struct intel_connector
> > > *connector)
> >
> > Should the name be apply_scanline_indicate, since you are not applying
> > the wa here just sort of checking if it needs to be done
> 
> It is actually appying WA. I.e. disabling req_psr2_sdp_prior_scanline if panel is
> not inline with the eDP1.4b SDP on prior scanline implementation in intel HW.
> What do you think?

Hmm to me it looks like when a corresponding action will be taken after checking the crtc state variable that we change is when the
We actually apply the WA.
But not a real blocker to hold this series. Okay either way.
LGTM,
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>

> 
> BR,
> Jouni Högander
> 
> >
> > Regards,
> > Suraj Kandpal
> >
> > >  {
> > > +	struct intel_dp *intel_dp = intel_attached_dp(connector);
> > > +	u8 early_scanline_support = connector-
> > > >dp.psr_caps.intel_wa_dpcd &
> > > +
> > > 	INTEL_WA_REGISTER_CAPS_PSR2_EARLYSCANLINE_SDP_SUPPORT_MA
> > > SK;
> > > +
> > > +	if (intel_dp->edp_dpcd[0] >= DP_EDP_15)
> > > +		return true;
> > > +
> > > +	switch(early_scanline_support)
> > > +	{
> > > +	case INTEL_WA_REGISTER_CAPS_FALL_BACK_TO_PSR1:
> > > +		crtc_state->req_psr2_sdp_prior_scanline = false;
> > > +		return false;
> > > +	case INTEL_WA_REGISTER_CAPS_PSR2_WITH_EARLY_SCANLINE:
> > > +		return true;
> > > +	case INTEL_WA_REGISTER_CAPS_PSR2_WITHOUT_EARLY_SCANLINE:
> > > +		crtc_state->req_psr2_sdp_prior_scanline = false;
> > > +		return true;
> > > +	default:
> > > +		MISSING_CASE(early_scanline_support);
> > > +		return false;
> > > +	}
> > > +}
> > > +
> > > +static bool _compute_psr2_sdp_prior_scanline_indication(struct
> > > intel_crtc_state *crtc_state,
> > > +							struct
> > > intel_connector
> > > *connector) {
> > > +	struct intel_dp *intel_dp = intel_attached_dp(connector);
> > >  	struct intel_display *display =
> > > to_intel_display(intel_dp);
> > >  	const struct drm_display_mode *adjusted_mode =
> > > &crtc_state-
> > > > uapi.adjusted_mode;
> > >  	u32 hblank_total, hblank_ns, req_ns; @@ -1406,7 +1433,8 @@ static
> > > bool _compute_psr2_sdp_prior_scanline_indication(struct intel_dp
> > > *intel_d
> > >  		return false;
> > >
> > >  	crtc_state->req_psr2_sdp_prior_scanline = true;
> > > -	return true;
> > > +
> > > +	return apply_scanline_indication_wa(crtc_state,
> > > connector);
> > >  }
> > >
> > >  static int intel_psr_entry_setup_frames(struct intel_dp *intel_dp,
> > > @@ -1687,7
> > > +1715,7 @@ static bool intel_sel_update_config_valid(struct
> > > intel_crtc_state
> > > *crtc_state,
> > >
> > > conn_state))
> > >  		goto unsupported;
> > >
> > > -	if (!_compute_psr2_sdp_prior_scanline_indication(intel_dp,
> > > crtc_state)) {
> > > +	if
> > > (!_compute_psr2_sdp_prior_scanline_indication(crtc_state,
> > > +connector)) {
> > >  		drm_dbg_kms(display->drm,
> > >  			    "Selective update not enabled, SDP indication do not
> fit in
> > > hblank\n");
> > >  		goto unsupported;
> > > --
> > > 2.43.0
> >