From: Troy Mitchell <troy.mitchell@linux.spacemit.com>
To: Vinod Koul <vkoul@kernel.org>, Frank Li <Frank.Li@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Yixun Lan <dlan@kernel.org>,
Guodong Xu <guodong@riscstar.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>
Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org, spacemit@lists.linux.dev,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
Brian Masney <bmasney@redhat.com>,
Troy Mitchell <troy.mitchell@linux.spacemit.com>
Subject: [PATCH v3 4/5] clk: spacemit: k3: mark top_dclk as CLK_IS_CRITICAL
Date: Fri, 24 Apr 2026 16:20:32 +0800 [thread overview]
Message-ID: <20260424-k3-pdma-v3-4-efdf2e414a08@linux.spacemit.com> (raw)
In-Reply-To: <20260424-k3-pdma-v3-0-efdf2e414a08@linux.spacemit.com>
top_dclk is the DDR bus clock. If it is gated by clk_disable_unused,
all memory-mapped bus transactions cease to function, causing DMA
engines to hang and general system instability.
Mark it CLK_IS_CRITICAL so the CCF never gates it during the
unused clock sweep.
Fixes: e371a77255b8 ("clk: spacemit: k3: add the clock tree")
Reviewed-by: Brian Masney <bmasney@redhat.com>
Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
---
drivers/clk/spacemit/ccu-k3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/spacemit/ccu-k3.c b/drivers/clk/spacemit/ccu-k3.c
index e98afd59f05c..bb8b75bdbdb3 100644
--- a/drivers/clk/spacemit/ccu-k3.c
+++ b/drivers/clk/spacemit/ccu-k3.c
@@ -846,7 +846,7 @@ static const struct clk_parent_data top_parents[] = {
CCU_PARENT_HW(pll6_d3),
};
CCU_MUX_DIV_GATE_FC_DEFINE(top_dclk, top_parents, APMU_TOP_DCLK_CTRL, 5, 3,
- BIT(8), 2, 3, BIT(1), 0);
+ BIT(8), 2, 3, BIT(1), CLK_IS_CRITICAL);
static const struct clk_parent_data ucie_parents[] = {
CCU_PARENT_HW(pll1_d8_307p2),
--
2.53.0
WARNING: multiple messages have this Message-ID (diff)
From: Troy Mitchell <troy.mitchell@linux.spacemit.com>
To: Vinod Koul <vkoul@kernel.org>, Frank Li <Frank.Li@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Yixun Lan <dlan@kernel.org>,
Guodong Xu <guodong@riscstar.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>
Cc: dmaengine@vger.kernel.org, devicetree@vger.kernel.org,
linux-riscv@lists.infradead.org, spacemit@lists.linux.dev,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
Brian Masney <bmasney@redhat.com>,
Troy Mitchell <troy.mitchell@linux.spacemit.com>
Subject: [PATCH v3 4/5] clk: spacemit: k3: mark top_dclk as CLK_IS_CRITICAL
Date: Fri, 24 Apr 2026 16:20:32 +0800 [thread overview]
Message-ID: <20260424-k3-pdma-v3-4-efdf2e414a08@linux.spacemit.com> (raw)
In-Reply-To: <20260424-k3-pdma-v3-0-efdf2e414a08@linux.spacemit.com>
top_dclk is the DDR bus clock. If it is gated by clk_disable_unused,
all memory-mapped bus transactions cease to function, causing DMA
engines to hang and general system instability.
Mark it CLK_IS_CRITICAL so the CCF never gates it during the
unused clock sweep.
Fixes: e371a77255b8 ("clk: spacemit: k3: add the clock tree")
Reviewed-by: Brian Masney <bmasney@redhat.com>
Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
---
drivers/clk/spacemit/ccu-k3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/spacemit/ccu-k3.c b/drivers/clk/spacemit/ccu-k3.c
index e98afd59f05c..bb8b75bdbdb3 100644
--- a/drivers/clk/spacemit/ccu-k3.c
+++ b/drivers/clk/spacemit/ccu-k3.c
@@ -846,7 +846,7 @@ static const struct clk_parent_data top_parents[] = {
CCU_PARENT_HW(pll6_d3),
};
CCU_MUX_DIV_GATE_FC_DEFINE(top_dclk, top_parents, APMU_TOP_DCLK_CTRL, 5, 3,
- BIT(8), 2, 3, BIT(1), 0);
+ BIT(8), 2, 3, BIT(1), CLK_IS_CRITICAL);
static const struct clk_parent_data ucie_parents[] = {
CCU_PARENT_HW(pll1_d8_307p2),
--
2.53.0
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next prev parent reply other threads:[~2026-04-24 8:22 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-24 8:20 [PATCH v3 0/5] dmaengine: Add Peripheral DMA support for SpacemiT K3 SoC Troy Mitchell
2026-04-24 8:20 ` Troy Mitchell
2026-04-24 8:20 ` [PATCH v3 1/5] dt-bindings: dmaengine: Add SpacemiT K3 DMA compatible string Troy Mitchell
2026-04-24 8:20 ` Troy Mitchell
2026-04-24 17:03 ` Conor Dooley
2026-04-24 17:03 ` Conor Dooley
2026-04-24 8:20 ` [PATCH v3 2/5] dmaengine: mmp_pdma: support variable extended DRCMR base Troy Mitchell
2026-04-24 8:20 ` Troy Mitchell
2026-04-24 8:20 ` [PATCH v3 3/5] dmaengine: mmp_pdma: add Spacemit K3 support Troy Mitchell
2026-04-24 8:20 ` Troy Mitchell
2026-04-24 8:20 ` Troy Mitchell [this message]
2026-04-24 8:20 ` [PATCH v3 4/5] clk: spacemit: k3: mark top_dclk as CLK_IS_CRITICAL Troy Mitchell
2026-04-29 2:03 ` Stephen Boyd
2026-04-29 2:03 ` Stephen Boyd
2026-04-24 8:20 ` [PATCH v3 5/5] riscv: dts: spacemit: Add PDMA controller node for K3 SoC Troy Mitchell
2026-04-24 8:20 ` Troy Mitchell
2026-04-24 13:58 ` [PATCH v3 0/5] dmaengine: Add Peripheral DMA support for SpacemiT " Troy Mitchell
2026-04-24 13:58 ` Troy Mitchell
-- strict thread matches above, loose matches on Subject: below --
2026-03-31 8:27 Troy Mitchell
2026-03-31 8:27 ` [PATCH v3 4/5] clk: spacemit: k3: mark top_dclk as CLK_IS_CRITICAL Troy Mitchell
2026-03-31 8:27 ` Troy Mitchell
2026-03-31 14:16 ` Brian Masney
2026-03-31 14:16 ` Brian Masney
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