From: Jamin Lin <jamin_lin@aspeedtech.com>
To: "peterx@redhat.com" <peterx@redhat.com>,
"philmd@linaro.org" <philmd@linaro.org>,
"Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Kane Chen" <kane_chen@aspeedtech.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Yanan Wang" <wangyanan55@huawei.com>,
"Zhao Liu" <zhao1.liu@intel.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Laurent Vivier" <laurent@vivier.eu>,
"Nicholas Piggin" <npiggin@gmail.com>,
"Harsh Prateek Bora" <harshpb@linux.ibm.com>,
"Cornelia Huck" <cohuck@redhat.com>,
"Eric Farman" <farman@linux.ibm.com>,
"Matthew Rosato" <mjrosato@linux.ibm.com>,
"Ilya Leoshkevich" <iii@linux.ibm.com>,
"David Hildenbrand" <david@kernel.org>,
"Halil Pasic" <pasic@linux.ibm.com>,
"Christian Borntraeger" <borntraeger@linux.ibm.com>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>,
"open list:sPAPR pseries" <qemu-ppc@nongnu.org>,
"open list:S390 general arch..." <qemu-s390x@nongnu.org>
Cc: "Jamin Lin" <jamin_lin@aspeedtech.com>,
"Troy Lee" <troy_lee@aspeedtech.com>,
"farosas@suse.de" <farosas@suse.de>,
"flwu@google.com" <flwu@google.com>,
"nabihestefan@google.com" <nabihestefan@google.com>,
"Cédric Le Goater" <clg@redhat.com>
Subject: [PATCH v5 15/18] hw/usb/hcd-ehci: Add ctrldssegment-default property
Date: Fri, 24 Apr 2026 08:05:29 +0000 [thread overview]
Message-ID: <20260424080508.53992-16-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20260424080508.53992-1-jamin_lin@aspeedtech.com>
When 64-bit addressing is supported, the Linux EHCI driver programs the
segment register to zero. See ehci_run function:
https://github.com/torvalds/linux/blob/master/drivers/usb/host/ehci-hcd.c
The driver comment also notes that descriptor structures allocated from
the DMA pool use segment zero semantics.
Descriptor memory is allocated using the DMA API. The platform driver
configures a 64-bit DMA mask so memory can be allocated above 4GB.
See ehci_platform_probe function:
https://github.com/torvalds/linux/blob/master/drivers/usb/host/ehci-platform.c
On AST2700 platforms, system DRAM is mapped above 4GB at 0x400000000.
As a result, descriptor addresses constructed directly from the guest
EHCI registers do not match the actual system address used by the
controller when fetching queue heads (QH) and queue element transfer
descriptors (qTD).
Add a ctrldssegment-default property so platforms can provide a
descriptor address offset when constructing descriptor addresses.
This allows systems where DRAM resides above 4GB to access EHCI
descriptors correctly.
The default value is zero, so existing machines are not affected.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
hw/usb/hcd-ehci.h | 5 ++++-
hw/usb/hcd-ehci.c | 1 +
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h
index 8e6a8cdfb0..3d57e1de5f 100644
--- a/hw/usb/hcd-ehci.h
+++ b/hw/usb/hcd-ehci.h
@@ -264,6 +264,7 @@ struct EHCIState {
uint32_t maxframes;
bool migrate_fetch_addr_64bit;
bool caps_64bit_addr;
+ uint32_t ctrldssegment_default;
/*
* EHCI spec version 1.0 Section 2.3
@@ -322,7 +323,9 @@ struct EHCIState {
DEFINE_PROP_BOOL("x-migrate-fetch-addr-64bit", _state, \
ehci.migrate_fetch_addr_64bit, true), \
DEFINE_PROP_BOOL("caps-64bit-addr", _state, \
- ehci.caps_64bit_addr, false)
+ ehci.caps_64bit_addr, false), \
+ DEFINE_PROP_UINT32("ctrldssegment-default", _state, \
+ ehci.ctrldssegment_default, 0)
extern const VMStateDescription vmstate_ehci;
diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c
index dfeb8ef70f..e8086f0432 100644
--- a/hw/usb/hcd-ehci.c
+++ b/hw/usb/hcd-ehci.c
@@ -1134,6 +1134,7 @@ static void ehci_opreg_write(void *ptr, hwaddr addr,
" 64-bit addressing capability is disabled\n");
return;
}
+ val |= s->ctrldssegment_default;
break;
case ASYNCLISTADDR:
--
2.43.0
next prev parent reply other threads:[~2026-04-24 8:08 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-24 8:05 [PATCH v5 00/18] hw/usb/ehci: Add 64-bit descriptor addressing support Jamin Lin
2026-04-24 8:05 ` [PATCH v5 01/18] tests/functional/arm/test_aspeed_ast2600_sdk: Add USB EHCI test for AST2600 SDK Jamin Lin
2026-04-24 8:05 ` [PATCH v5 02/18] hw/usb/hcd-ehci: Remove unused EHCIfstn structure and dead code Jamin Lin
2026-04-24 8:05 ` [PATCH v5 03/18] hw/usb/hcd-ehci.h: Fix coding style issues reported by checkpatch Jamin Lin
2026-04-24 8:05 ` [PATCH v5 04/18] hw/usb/hcd-ehci.c: " Jamin Lin
2026-04-24 8:05 ` [PATCH v5 05/18] hw/usb/hcd-ehci.c: Replace fprintf(stderr, ...) with qemu_log_mask(LOG_GUEST_ERROR) Jamin Lin
2026-04-24 8:05 ` [PATCH v5 06/18] hw/usb/hcd-ehci: Replace DPRINTF debug logs with trace events Jamin Lin
2026-04-24 8:05 ` [PATCH v5 07/18] hw/usb/hcd-ehci: Introduce common properties macro for sysbus and pci Jamin Lin
2026-04-24 15:23 ` Philippe Mathieu-Daudé
2026-04-24 8:05 ` [PATCH v5 08/18] hw/core: Add 11.0 machine compatibility properties Jamin Lin
2026-04-24 8:05 ` [PATCH v5 09/18] hw/usb/hcd-ehci: Change descriptor addresses to 64-bit with migration compatibility Jamin Lin
2026-04-24 11:35 ` Peter Xu
2026-05-03 20:20 ` Cédric Le Goater
2026-05-04 2:25 ` Jamin Lin
2026-04-24 8:05 ` [PATCH v5 10/18] hw/usb/hcd-ehci: Add property to advertise 64-bit addressing capability Jamin Lin
2026-05-03 20:18 ` Cédric Le Goater
2026-05-04 2:10 ` Jamin Lin
2026-04-24 8:05 ` [PATCH v5 11/18] hw/usb/hcd-ehci: Implement 64-bit QH descriptor addressing Jamin Lin
2026-04-24 8:05 ` [PATCH v5 12/18] hw/usb/hcd-ehci: Implement 64-bit qTD " Jamin Lin
2026-04-24 8:05 ` [PATCH v5 13/18] hw/usb/hcd-ehci: Implement 64-bit iTD " Jamin Lin
2026-04-24 8:05 ` [PATCH v5 14/18] hw/usb/hcd-ehci: Implement 64-bit siTD " Jamin Lin
2026-04-24 8:05 ` Jamin Lin [this message]
2026-04-24 8:05 ` [PATCH v5 16/18] hw/arm/aspeed_ast27x0: Set EHCI ctrldssegment-default Jamin Lin
2026-05-03 20:18 ` Cédric Le Goater
2026-05-04 2:19 ` Jamin Lin
2026-04-24 8:05 ` [PATCH v5 17/18] hw/arm/aspeed_ast27x0: Enable 64-bit EHCI DMA addressing Jamin Lin
2026-04-24 8:05 ` [PATCH v5 18/18] tests/functional/aarch64/test_aspeed_ast2700: Add USB EHCI test for AST2700 A1/A2 Jamin Lin
2026-05-03 20:23 ` [PATCH v5 00/18] hw/usb/ehci: Add 64-bit descriptor addressing support Cédric Le Goater
2026-05-04 2:48 ` Jamin Lin
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