From: 54weasels <54weasels@gmail.com>
To: qemu-devel@nongnu.org
Cc: laurent@vivier.eu, thuth@redhat.com, 54weasels <54weasels@gmail.com>
Subject: [PATCH 6/7] tests/qtest: Add Sun-3 hardware interaction tests
Date: Sat, 2 May 2026 18:57:55 -0700 [thread overview]
Message-ID: <20260503015756.99176-7-54weasels@gmail.com> (raw)
In-Reply-To: <20260503015756.99176-1-54weasels@gmail.com>
This adds basic architectural and register validation for the newly assembled Sun-3 machine.
Signed-off-by: 54weasels <54weasels@gmail.com>
---
tests/qtest/meson.build | 1 +
tests/qtest/sun3-test.c | 67 +++++++++++++++++++++++++++++++++++++++++
2 files changed, 68 insertions(+)
create mode 100644 tests/qtest/sun3-test.c
diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
index be4fa627b5..184d1a3f8c 100644
--- a/tests/qtest/meson.build
+++ b/tests/qtest/meson.build
@@ -154,6 +154,7 @@ qtests_loongarch64 = qtests_filter + \
'cpu-plug-test']
qtests_m68k = ['boot-serial-test'] + \
+ ['sun3-test'] + \
qtests_filter
qtests_microblaze = ['boot-serial-test'] + \
diff --git a/tests/qtest/sun3-test.c b/tests/qtest/sun3-test.c
new file mode 100644
index 0000000000..50f6c166d1
--- /dev/null
+++ b/tests/qtest/sun3-test.c
@@ -0,0 +1,67 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * QTest device validation for the Sun-3 Machine
+ *
+ * Copyright (c) 2026
+ */
+
+#include "qemu/osdep.h"
+#include "libqtest.h"
+
+/* OBIO Memory Map Addresses */
+#define SUN3_INTREG_BASE 0x0FEA0000
+#define SUN3_MEMERR_BASE 0x0FE80000
+
+static void test_intreg(void)
+{
+ QTestState *s;
+ uint8_t val;
+
+ s = qtest_init("-machine sun3 -nographic");
+
+ /* Default state should be 0 */
+ val = qtest_readb(s, SUN3_INTREG_BASE);
+ g_assert_cmphex(val, ==, 0x00);
+
+ /* Write and verify */
+ qtest_writeb(s, SUN3_INTREG_BASE, 0x0f);
+ val = qtest_readb(s, SUN3_INTREG_BASE);
+ g_assert_cmphex(val, ==, 0x0f);
+
+ qtest_quit(s);
+}
+
+static void test_memerr(void)
+{
+ QTestState *s;
+ uint8_t val;
+
+ s = qtest_init("-machine sun3 -nographic");
+
+ /* Default state should be 0x40 (default no-error) */
+ val = qtest_readb(s, SUN3_MEMERR_BASE);
+ g_assert_cmphex(val, ==, 0x40);
+
+ /* Test parity error spoof sequence */
+ qtest_writeb(s, SUN3_MEMERR_BASE, 0x20); /* Set test_parity_written */
+ qtest_writeb(s, SUN3_MEMERR_BASE, 0x50); /* Trigger spoof */
+ val = qtest_readb(s, SUN3_MEMERR_BASE);
+
+ /*
+ * Since we didn't clock enough parity lanes, high bit and lane 8 should
+ * be set (0x50 | 0x80 | 0x08 = 0xd8)
+ */
+ g_assert_cmphex(val, ==, 0xd8);
+
+ qtest_quit(s);
+}
+
+int main(int argc, char **argv)
+{
+ g_test_init(&argc, &argv, NULL);
+
+ qtest_add_func("/m68k/sun3/intreg", test_intreg);
+ qtest_add_func("/m68k/sun3/memerr", test_memerr);
+
+ return g_test_run();
+}
--
2.50.1 (Apple Git-155)
next prev parent reply other threads:[~2026-05-03 5:59 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-03 1:57 [PATCH 0/7] m68k: Add Sun-3 Machine Emulation 54weasels
2026-05-03 1:57 ` [PATCH 1/7] target/m68k: Implement Physical Bus Error exception handling 54weasels
2026-05-10 5:40 ` Thomas Huth
2026-05-11 6:38 ` Purr Box
2026-05-03 1:57 ` [PATCH 2/7] hw/net/lance: Add Sun-3 Native DMA byte-swapping support 54weasels
2026-05-03 1:57 ` [PATCH 3/7] hw/char/escc: Expose diagnostic RS232 I/O routing 54weasels
2026-05-03 1:57 ` [PATCH 4/7] hw/timer: Introduce Intersil 7170 RTC implementation 54weasels
2026-05-03 1:57 ` [PATCH 5/7] hw/m68k: Overhaul Sun-3 MMU and Boot PROM mapping 54weasels
2026-05-03 1:57 ` 54weasels [this message]
2026-05-03 1:57 ` [PATCH 7/7] tests/functional: Add Sun-3 firmware boot and diagnostic test 54weasels
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