From: Johan Hovold <johan@kernel.org>
To: Mark Brown <broonie@kernel.org>
Cc: Linus Walleij <linusw@kernel.org>,
Masahisa Kojima <kojima.masahisa@socionext.com>,
Jassi Brar <jassisinghbrar@gmail.com>,
Laxman Dewangan <ldewangan@nvidia.com>,
linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
Johan Hovold <johan@kernel.org>
Subject: [PATCH 20/20] spi: zync-qspi: switch to managed controller allocation
Date: Tue, 5 May 2026 09:29:09 +0200 [thread overview]
Message-ID: <20260505072909.618363-21-johan@kernel.org> (raw)
In-Reply-To: <20260505072909.618363-1-johan@kernel.org>
Switch to device managed controller allocation to simplify error
handling and to avoid having to take another reference during
deregistration.
Signed-off-by: Johan Hovold <johan@kernel.org>
---
drivers/spi/spi-zynq-qspi.c | 40 +++++++++++--------------------------
1 file changed, 12 insertions(+), 28 deletions(-)
diff --git a/drivers/spi/spi-zynq-qspi.c b/drivers/spi/spi-zynq-qspi.c
index 406fd9d5337e..d762aaf452af 100644
--- a/drivers/spi/spi-zynq-qspi.c
+++ b/drivers/spi/spi-zynq-qspi.c
@@ -637,7 +637,7 @@ static int zynq_qspi_probe(struct platform_device *pdev)
struct zynq_qspi *xqspi;
u32 num_cs;
- ctlr = spi_alloc_host(&pdev->dev, sizeof(*xqspi));
+ ctlr = devm_spi_alloc_host(&pdev->dev, sizeof(*xqspi));
if (!ctlr)
return -ENOMEM;
@@ -645,16 +645,13 @@ static int zynq_qspi_probe(struct platform_device *pdev)
xqspi->dev = dev;
platform_set_drvdata(pdev, ctlr);
xqspi->regs = devm_platform_ioremap_resource(pdev, 0);
- if (IS_ERR(xqspi->regs)) {
- ret = PTR_ERR(xqspi->regs);
- goto remove_ctlr;
- }
+ if (IS_ERR(xqspi->regs))
+ return PTR_ERR(xqspi->regs);
xqspi->pclk = devm_clk_get_enabled(&pdev->dev, "pclk");
if (IS_ERR(xqspi->pclk)) {
dev_err(&pdev->dev, "pclk clock not found.\n");
- ret = PTR_ERR(xqspi->pclk);
- goto remove_ctlr;
+ return PTR_ERR(xqspi->pclk);
}
init_completion(&xqspi->data_completion);
@@ -662,21 +659,18 @@ static int zynq_qspi_probe(struct platform_device *pdev)
xqspi->refclk = devm_clk_get_enabled(&pdev->dev, "ref_clk");
if (IS_ERR(xqspi->refclk)) {
dev_err(&pdev->dev, "ref_clk clock not found.\n");
- ret = PTR_ERR(xqspi->refclk);
- goto remove_ctlr;
+ return PTR_ERR(xqspi->refclk);
}
xqspi->irq = platform_get_irq(pdev, 0);
- if (xqspi->irq < 0) {
- ret = xqspi->irq;
- goto remove_ctlr;
- }
+ if (xqspi->irq < 0)
+ return xqspi->irq;
+
ret = devm_request_irq(&pdev->dev, xqspi->irq, zynq_qspi_irq,
0, pdev->name, xqspi);
if (ret != 0) {
- ret = -ENXIO;
dev_err(&pdev->dev, "request_irq failed\n");
- goto remove_ctlr;
+ return -ENXIO;
}
ret = of_property_read_u32(np, "num-cs",
@@ -684,9 +678,8 @@ static int zynq_qspi_probe(struct platform_device *pdev)
if (ret < 0) {
ctlr->num_chipselect = 1;
} else if (num_cs > ZYNQ_QSPI_MAX_NUM_CS) {
- ret = -EINVAL;
dev_err(&pdev->dev, "only 2 chip selects are available\n");
- goto remove_ctlr;
+ return -EINVAL;
} else {
ctlr->num_chipselect = num_cs;
}
@@ -705,15 +698,10 @@ static int zynq_qspi_probe(struct platform_device *pdev)
ret = spi_register_controller(ctlr);
if (ret) {
dev_err(&pdev->dev, "failed to register controller\n");
- goto remove_ctlr;
+ return ret;
}
- return ret;
-
-remove_ctlr:
- spi_controller_put(ctlr);
-
- return ret;
+ return 0;
}
/**
@@ -731,13 +719,9 @@ static void zynq_qspi_remove(struct platform_device *pdev)
struct spi_controller *ctlr = platform_get_drvdata(pdev);
struct zynq_qspi *xqspi = spi_controller_get_devdata(ctlr);
- spi_controller_get(ctlr);
-
spi_unregister_controller(ctlr);
zynq_qspi_write(xqspi, ZYNQ_QSPI_ENABLE_OFFSET, 0);
-
- spi_controller_put(ctlr);
}
static const struct of_device_id zynq_qspi_of_match[] = {
--
2.53.0
next prev parent reply other threads:[~2026-05-05 7:29 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-05 7:28 [PATCH 00/20] spi: switch to managed controller allocation (part 2/3) Johan Hovold
2026-05-05 7:28 ` [PATCH 01/20] spi: pic32: switch to managed controller allocation Johan Hovold
2026-05-05 7:28 ` [PATCH 02/20] spi: pic32-sqi: " Johan Hovold
2026-05-05 7:28 ` [PATCH 03/20] spi: pl022: " Johan Hovold
2026-05-05 9:12 ` Linus Walleij
2026-05-05 7:28 ` [PATCH 04/20] spi: qup: " Johan Hovold
2026-05-05 7:28 ` [PATCH 05/20] spi: rspi: " Johan Hovold
2026-05-05 7:28 ` [PATCH 06/20] spi: sh-hspi: " Johan Hovold
2026-05-05 7:28 ` [PATCH 07/20] spi: sh-msiof: " Johan Hovold
2026-05-05 7:28 ` [PATCH 08/20] spi: sifive: " Johan Hovold
2026-05-05 7:28 ` [PATCH 09/20] spi: slave-mt27xx: " Johan Hovold
2026-05-05 7:28 ` [PATCH 10/20] spi: sprd: " Johan Hovold
2026-05-05 7:29 ` [PATCH 11/20] spi: st-ssc4: " Johan Hovold
2026-05-05 7:29 ` [PATCH 12/20] spi: sun4i: " Johan Hovold
2026-05-05 7:29 ` [PATCH 13/20] spi: sun6i: " Johan Hovold
2026-05-05 7:29 ` [PATCH 14/20] spi: syncuacer: " Johan Hovold
2026-05-05 7:29 ` [PATCH 15/20] spi: tegra114: " Johan Hovold
2026-05-05 7:29 ` [PATCH 16/20] spi: tegra20-sflash: " Johan Hovold
2026-05-05 7:29 ` [PATCH 17/20] spi: ti-qspi: " Johan Hovold
2026-05-05 7:29 ` [PATCH 18/20] spi: ti-qspi: cleanup registration error path Johan Hovold
2026-05-05 7:29 ` [PATCH 19/20] spi: uniphier: switch to managed controller allocation Johan Hovold
2026-05-05 7:29 ` Johan Hovold [this message]
2026-05-11 0:56 ` [PATCH 00/20] spi: switch to managed controller allocation (part 2/3) Mark Brown
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