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From: Johan Hovold <johan@kernel.org>
To: Mark Brown <broonie@kernel.org>
Cc: Linus Walleij <linusw@kernel.org>,
	Masahisa Kojima <kojima.masahisa@socionext.com>,
	Jassi Brar <jassisinghbrar@gmail.com>,
	Laxman Dewangan <ldewangan@nvidia.com>,
	linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
	Johan Hovold <johan@kernel.org>
Subject: [PATCH 08/20] spi: sifive: switch to managed controller allocation
Date: Tue,  5 May 2026 09:28:57 +0200	[thread overview]
Message-ID: <20260505072909.618363-9-johan@kernel.org> (raw)
In-Reply-To: <20260505072909.618363-1-johan@kernel.org>

Switch to device managed controller allocation to simplify error
handling and to avoid having to take another reference during
deregistration.

Signed-off-by: Johan Hovold <johan@kernel.org>
---
 drivers/spi/spi-sifive.c | 39 +++++++++++----------------------------
 1 file changed, 11 insertions(+), 28 deletions(-)

diff --git a/drivers/spi/spi-sifive.c b/drivers/spi/spi-sifive.c
index 74a3e32fd2b5..cee4d92e46f4 100644
--- a/drivers/spi/spi-sifive.c
+++ b/drivers/spi/spi-sifive.c
@@ -296,7 +296,7 @@ static int sifive_spi_probe(struct platform_device *pdev)
 	u32 cs_bits, max_bits_per_word;
 	struct spi_controller *host;
 
-	host = spi_alloc_host(&pdev->dev, sizeof(struct sifive_spi));
+	host = devm_spi_alloc_host(&pdev->dev, sizeof(struct sifive_spi));
 	if (!host) {
 		dev_err(&pdev->dev, "out of memory\n");
 		return -ENOMEM;
@@ -307,24 +307,19 @@ static int sifive_spi_probe(struct platform_device *pdev)
 	platform_set_drvdata(pdev, host);
 
 	spi->regs = devm_platform_ioremap_resource(pdev, 0);
-	if (IS_ERR(spi->regs)) {
-		ret = PTR_ERR(spi->regs);
-		goto put_host;
-	}
+	if (IS_ERR(spi->regs))
+		return PTR_ERR(spi->regs);
 
 	/* Spin up the bus clock before hitting registers */
 	spi->clk = devm_clk_get_enabled(&pdev->dev, NULL);
 	if (IS_ERR(spi->clk)) {
 		dev_err(&pdev->dev, "Unable to find bus clock\n");
-		ret = PTR_ERR(spi->clk);
-		goto put_host;
+		return PTR_ERR(spi->clk);
 	}
 
 	irq = platform_get_irq(pdev, 0);
-	if (irq < 0) {
-		ret = irq;
-		goto put_host;
-	}
+	if (irq < 0)
+		return irq;
 
 	/* Optional parameters */
 	ret =
@@ -339,8 +334,7 @@ static int sifive_spi_probe(struct platform_device *pdev)
 
 	if (!ret && max_bits_per_word < 8) {
 		dev_err(&pdev->dev, "Only 8bit SPI words supported by the driver\n");
-		ret = -EINVAL;
-		goto put_host;
+		return -EINVAL;
 	}
 
 	/* probe the number of CS lines */
@@ -350,15 +344,13 @@ static int sifive_spi_probe(struct platform_device *pdev)
 	sifive_spi_write(spi, SIFIVE_SPI_REG_CSDEF, spi->cs_inactive);
 	if (!cs_bits) {
 		dev_err(&pdev->dev, "Could not auto probe CS lines\n");
-		ret = -EINVAL;
-		goto put_host;
+		return -EINVAL;
 	}
 
 	num_cs = ilog2(cs_bits) + 1;
 	if (num_cs > SIFIVE_SPI_MAX_CS) {
 		dev_err(&pdev->dev, "Invalid number of spi targets\n");
-		ret = -EINVAL;
-		goto put_host;
+		return -EINVAL;
 	}
 
 	/* Define our host */
@@ -386,7 +378,7 @@ static int sifive_spi_probe(struct platform_device *pdev)
 			       dev_name(&pdev->dev), spi);
 	if (ret) {
 		dev_err(&pdev->dev, "Unable to bind to interrupt\n");
-		goto put_host;
+		return ret;
 	}
 
 	dev_info(&pdev->dev, "mapped; irq=%d, cs=%d\n",
@@ -395,15 +387,10 @@ static int sifive_spi_probe(struct platform_device *pdev)
 	ret = spi_register_controller(host);
 	if (ret < 0) {
 		dev_err(&pdev->dev, "spi_register_host failed\n");
-		goto put_host;
+		return ret;
 	}
 
 	return 0;
-
-put_host:
-	spi_controller_put(host);
-
-	return ret;
 }
 
 static void sifive_spi_remove(struct platform_device *pdev)
@@ -411,14 +398,10 @@ static void sifive_spi_remove(struct platform_device *pdev)
 	struct spi_controller *host = platform_get_drvdata(pdev);
 	struct sifive_spi *spi = spi_controller_get_devdata(host);
 
-	spi_controller_get(host);
-
 	spi_unregister_controller(host);
 
 	/* Disable all the interrupts just in case */
 	sifive_spi_write(spi, SIFIVE_SPI_REG_IE, 0);
-
-	spi_controller_put(host);
 }
 
 static int sifive_spi_suspend(struct device *dev)
-- 
2.53.0


  parent reply	other threads:[~2026-05-05  7:29 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-05  7:28 [PATCH 00/20] spi: switch to managed controller allocation (part 2/3) Johan Hovold
2026-05-05  7:28 ` [PATCH 01/20] spi: pic32: switch to managed controller allocation Johan Hovold
2026-05-05  7:28 ` [PATCH 02/20] spi: pic32-sqi: " Johan Hovold
2026-05-05  7:28 ` [PATCH 03/20] spi: pl022: " Johan Hovold
2026-05-05  9:12   ` Linus Walleij
2026-05-05  7:28 ` [PATCH 04/20] spi: qup: " Johan Hovold
2026-05-05  7:28 ` [PATCH 05/20] spi: rspi: " Johan Hovold
2026-05-05  7:28 ` [PATCH 06/20] spi: sh-hspi: " Johan Hovold
2026-05-05  7:28 ` [PATCH 07/20] spi: sh-msiof: " Johan Hovold
2026-05-05  7:28 ` Johan Hovold [this message]
2026-05-05  7:28 ` [PATCH 09/20] spi: slave-mt27xx: " Johan Hovold
2026-05-05  7:28 ` [PATCH 10/20] spi: sprd: " Johan Hovold
2026-05-05  7:29 ` [PATCH 11/20] spi: st-ssc4: " Johan Hovold
2026-05-05  7:29 ` [PATCH 12/20] spi: sun4i: " Johan Hovold
2026-05-05  7:29 ` [PATCH 13/20] spi: sun6i: " Johan Hovold
2026-05-05  7:29 ` [PATCH 14/20] spi: syncuacer: " Johan Hovold
2026-05-05  7:29 ` [PATCH 15/20] spi: tegra114: " Johan Hovold
2026-05-05  7:29 ` [PATCH 16/20] spi: tegra20-sflash: " Johan Hovold
2026-05-05  7:29 ` [PATCH 17/20] spi: ti-qspi: " Johan Hovold
2026-05-05  7:29 ` [PATCH 18/20] spi: ti-qspi: cleanup registration error path Johan Hovold
2026-05-05  7:29 ` [PATCH 19/20] spi: uniphier: switch to managed controller allocation Johan Hovold
2026-05-05  7:29 ` [PATCH 20/20] spi: zync-qspi: " Johan Hovold
2026-05-11  0:56 ` [PATCH 00/20] spi: switch to managed controller allocation (part 2/3) Mark Brown

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