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From: Jason Gunthorpe <jgg@nvidia.com>
To: fangyu.yu@linux.alibaba.com
Cc: joro@8bytes.org, alex@ghiti.fr, anup@brainfault.org,
	aou@eecs.berkeley.edu, baolu.lu@linux.intel.com,
	guoren@kernel.org, iommu@lists.linux.dev, kevin.tian@intel.com,
	kvm-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, nutty.liu@hotmail.com,
	palmer@dabbelt.com, pjw@kernel.org, robin.murphy@arm.com,
	tjeznach@rivosinc.com, vasant.hegde@amd.com, will@kernel.org,
	kernel test robot <lkp@intel.com>
Subject: Re: Re: [PATCH v3 0/2] iommu/riscv: Support Svpbmt memory types in generic_pt
Date: Tue, 12 May 2026 09:45:20 -0300	[thread overview]
Message-ID: <20260512124520.GH1116784@nvidia.com> (raw)
In-Reply-To: <20260512075339.18339-1-fangyu.yu@linux.alibaba.com>

On Tue, May 12, 2026 at 03:53:39PM +0800, fangyu.yu@linux.alibaba.com wrote:
> >> Fangyu Yu (2):
> >>   iommu/riscv: Advertise Svpbmt support to generic page table
> >>   iommupt: Encode IOMMU_MMIO/IOMMU_CACHE via RISC-V Svpbmt bits
> >>
> >>  drivers/iommu/generic_pt/fmt/riscv.h | 11 ++++++++++-
> >>  drivers/iommu/riscv/iommu.c          |  2 ++
> >>  include/linux/generic_pt/common.h    |  4 ++++
> >>  3 files changed, 16 insertions(+), 1 deletion(-)
> >
> >Applied this one instead of v2.
> 
> Thanks for the review and for applying this version. I’ve sent a v4
> update to fix the 32-bit build warning, so please use the v4 series
> going forward.

Since Joerg already applied it the normal thing is to send a fixup
patch to correct the bot warning

Jason

-- 
kvm-riscv mailing list
kvm-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/kvm-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Jason Gunthorpe <jgg@nvidia.com>
To: fangyu.yu@linux.alibaba.com
Cc: joro@8bytes.org, alex@ghiti.fr, anup@brainfault.org,
	aou@eecs.berkeley.edu, baolu.lu@linux.intel.com,
	guoren@kernel.org, iommu@lists.linux.dev, kevin.tian@intel.com,
	kvm-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, nutty.liu@hotmail.com,
	palmer@dabbelt.com, pjw@kernel.org, robin.murphy@arm.com,
	tjeznach@rivosinc.com, vasant.hegde@amd.com, will@kernel.org,
	kernel test robot <lkp@intel.com>
Subject: Re: Re: [PATCH v3 0/2] iommu/riscv: Support Svpbmt memory types in generic_pt
Date: Tue, 12 May 2026 09:45:20 -0300	[thread overview]
Message-ID: <20260512124520.GH1116784@nvidia.com> (raw)
In-Reply-To: <20260512075339.18339-1-fangyu.yu@linux.alibaba.com>

On Tue, May 12, 2026 at 03:53:39PM +0800, fangyu.yu@linux.alibaba.com wrote:
> >> Fangyu Yu (2):
> >>   iommu/riscv: Advertise Svpbmt support to generic page table
> >>   iommupt: Encode IOMMU_MMIO/IOMMU_CACHE via RISC-V Svpbmt bits
> >>
> >>  drivers/iommu/generic_pt/fmt/riscv.h | 11 ++++++++++-
> >>  drivers/iommu/riscv/iommu.c          |  2 ++
> >>  include/linux/generic_pt/common.h    |  4 ++++
> >>  3 files changed, 16 insertions(+), 1 deletion(-)
> >
> >Applied this one instead of v2.
> 
> Thanks for the review and for applying this version. I’ve sent a v4
> update to fix the 32-bit build warning, so please use the v4 series
> going forward.

Since Joerg already applied it the normal thing is to send a fixup
patch to correct the bot warning

Jason

WARNING: multiple messages have this Message-ID (diff)
From: Jason Gunthorpe <jgg@nvidia.com>
To: fangyu.yu@linux.alibaba.com
Cc: joro@8bytes.org, alex@ghiti.fr, anup@brainfault.org,
	aou@eecs.berkeley.edu, baolu.lu@linux.intel.com,
	guoren@kernel.org, iommu@lists.linux.dev, kevin.tian@intel.com,
	kvm-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, nutty.liu@hotmail.com,
	palmer@dabbelt.com, pjw@kernel.org, robin.murphy@arm.com,
	tjeznach@rivosinc.com, vasant.hegde@amd.com, will@kernel.org,
	kernel test robot <lkp@intel.com>
Subject: Re: Re: [PATCH v3 0/2] iommu/riscv: Support Svpbmt memory types in generic_pt
Date: Tue, 12 May 2026 09:45:20 -0300	[thread overview]
Message-ID: <20260512124520.GH1116784@nvidia.com> (raw)
In-Reply-To: <20260512075339.18339-1-fangyu.yu@linux.alibaba.com>

On Tue, May 12, 2026 at 03:53:39PM +0800, fangyu.yu@linux.alibaba.com wrote:
> >> Fangyu Yu (2):
> >>   iommu/riscv: Advertise Svpbmt support to generic page table
> >>   iommupt: Encode IOMMU_MMIO/IOMMU_CACHE via RISC-V Svpbmt bits
> >>
> >>  drivers/iommu/generic_pt/fmt/riscv.h | 11 ++++++++++-
> >>  drivers/iommu/riscv/iommu.c          |  2 ++
> >>  include/linux/generic_pt/common.h    |  4 ++++
> >>  3 files changed, 16 insertions(+), 1 deletion(-)
> >
> >Applied this one instead of v2.
> 
> Thanks for the review and for applying this version. I’ve sent a v4
> update to fix the 32-bit build warning, so please use the v4 series
> going forward.

Since Joerg already applied it the normal thing is to send a fixup
patch to correct the bot warning

Jason

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2026-05-12 12:45 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-17 14:07 [PATCH v3 0/2] iommu/riscv: Support Svpbmt memory types in generic_pt fangyu.yu
2026-04-17 14:07 ` fangyu.yu
2026-04-17 14:07 ` fangyu.yu
2026-04-17 14:07 ` [PATCH v3 1/2] iommu/riscv: Advertise Svpbmt support to generic page table fangyu.yu
2026-04-17 14:07   ` fangyu.yu
2026-04-17 14:07   ` fangyu.yu
2026-04-17 14:07 ` [PATCH v3 2/2] iommupt: Encode IOMMU_MMIO/IOMMU_CACHE via RISC-V Svpbmt bits fangyu.yu
2026-04-17 14:07   ` fangyu.yu
2026-04-17 14:07   ` fangyu.yu
2026-05-11  8:04 ` [PATCH v3 0/2] iommu/riscv: Support Svpbmt memory types in generic_pt Jörg Rödel
2026-05-11  8:04   ` Jörg Rödel
2026-05-11  8:04   ` Jörg Rödel
2026-05-12  7:53   ` fangyu.yu
2026-05-12  7:53     ` fangyu.yu
2026-05-12  7:53     ` fangyu.yu
2026-05-12 12:45     ` Jason Gunthorpe [this message]
2026-05-12 12:45       ` Jason Gunthorpe
2026-05-12 12:45       ` Jason Gunthorpe

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