Re: [PATCH v2 16/16] arm64: dts: ti: beagley-ai: Enable HDMI display and audio

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [High] DSS1-VP1 is used for HDMI but its clock is incorrectly parented to the DSI PLL instead of the HDMI PLL.
- [Low] The audio data output pin (MCASP1_AXR0) is incorrectly configured as an input pad.
- [Low] The `main_gpio0_ioexp_intr_pins_default` pinctrl node is defined but never referenced.
--

commit 1eb95c0c9f0fb3307ec8c94675cccb93d5f763f4
Author: Andrew Davis <afd@ti.com>

arm64: dts: ti: beagley-ai: Enable HDMI display and audio

This commit enables HDMI support for the BeagleY-AI platform. It configures
the TIDSS display controller and IT66122 HDMI bridge, along with the required
pinmux, clocks, and audio endpoints.

> diff --git a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts
> index 5255e04b9ac76..b7bcc90005d70 100644
> --- a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts

[ ... ]

> @@ -185,6 +213,20 @@ J722S_IOPAD(0x0240, PIN_INPUT, 7) /* (B24) MMC1_SDCD.GPIO1_48 */
>  		bootph-all;
>  	};
>  
> +	main_i2c1_pins_default: main-i2c1-default-pins {
> +		pinctrl-single,pins = <
> +			J722S_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (C24) I2C1_SCL */
> +			J722S_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (A22) I2C1_SDA */
> +		>;
> +		bootph-all;
> +	};
> +
> +	main_gpio0_ioexp_intr_pins_default: main-gpio0-ioexp-intr-default-pins {
> +		pinctrl-single,pins = <
> +			J722S_IOPAD(0x0110, PIN_INPUT, 7) /* (G27) MMC2_DAT1.GPIO0_67 */
> +		>;
> +	};

This pinctrl group is defined but doesn't seem to be referenced by any node's
pinctrl-0 property in this file. Was the corresponding I2C IO expander device
node left out of this patch?

[ ... ]

> @@ -227,6 +269,47 @@ vdd_3v3_sd_pins_default: vdd-3v3-sd-default-pins {
>  			J722S_IOPAD(0x0254, PIN_OUTPUT, 7) /* (E25) USB0_DRVVBUS.GPIO1_50 */
>  		>;
>  	};

[ ... ]

> +	main_mcasp1_pins_default: main-mcasp1-default-pins {
> +		pinctrl-single,pins = <
> +			J722S_IOPAD(0x0090, PIN_INPUT, 2) /* (P27) GPMC0_BE0n_CLE.MCASP1_ACLKX */
> +			J722S_IOPAD(0x0098, PIN_INPUT, 2) /* (V21) GPMC0_WAIT0.MCASP1_AFSX */
> +			J722S_IOPAD(0x008c, PIN_INPUT, 2) /* (N23) GPMC0_WEn.MCASP1_AXR0 */

Should this be configured with PIN_OUTPUT? The serial-dir property in the
mcasp1 node sets the first serializer (AXR0) as a transmitter.

> +		>;
> +	};
>  };

[ ... ]

> @@ -399,4 +546,54 @@ &sdhci1 {
>  	status = "okay";
>  };
>  
> +&dss1 {
> +	status = "okay";
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&dss1_pins_default>;
> +
> +	clocks = <&k3_clks 232 8>,
> +		 <&k3_clks 232 0>,
> +		 <&k3_clks 232 4>;
> +
> +	assigned-clocks = <&k3_clks 241 0>, /* DSS1-VP0 */
> +			  <&k3_clks 240 0>, /* DSS1-VP1 */
> +			  <&k3_clks 245 0>; /* DPI Output */
> +
> +	assigned-clock-parents = <&k3_clks 241 2>, /* PLL 17 HDMI */
> +				 <&k3_clks 240 1>, /* PLL 18 DSI */

Are these clock parent assignments swapped?

The comments here and in the it66122 node indicate HDMI is serviced
by DSS1-VP1. However, this configuration maps DSS1-VP1 to PLL 18 DSI,
and DSS1-VP0 to PLL 17 HDMI.

Driving the HDMI video port with a PLL tuned for DSI displays might
result in incorrect pixel clock frequencies.

> +				 <&k3_clks 245 2>; /* DSS1-DPI0 */

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260513-beagley-ai-display-v2-0-9e9bcefde6bc@ideasonboard.com?part=16