From: sashiko-bot@kernel.org
To: "Bartosz Golaszewski" <bartosz.golaszewski@oss.qualcomm.com>
Cc: Frank.Li@kernel.org, dmaengine@vger.kernel.org, vkoul@kernel.org
Subject: Re: [PATCH v18 02/14] dmaengine: qcom: bam_dma: free interrupt before the clock in error path
Date: Fri, 22 May 2026 14:17:39 +0000 [thread overview]
Message-ID: <20260522141739.9FEB31F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260522-qcom-qce-cmd-descr-v18-2-99103926bafc@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 5 potential issue(s) to consider:
New issues:
- [High] Calling free_irq() before unregistering the DMA controller creates a window where active DMA clients will hang forever.
Pre-existing issues:
- [Critical] Hardware registers are accessed after the device clock is disabled, causing a synchronous external abort.
- [Critical] The IRQ handler accesses hardware registers before verifying the device is active and its clocks are enabled.
- [High] The DMA device state is freed via devres while clients may still hold references to channels, leading to a Use-After-Free.
- [High] Requesting the IRQ before enabling runtime PM can cause an unhandled interrupt storm.
--
commit cdad268a047eb3aecf63c558b2efa1d316fbeb49
Author: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
dmaengine: qcom: bam_dma: free interrupt before the clock in error path
This commit stops using devres for the BAM interrupt and manually frees
it in the error path and in remove() before disabling the clock.
This prevents the interrupt from firing while the clock is disabled.
Closes: https://sashiko.dev/#/patchset/20260427-qcom-qce-cmd-descr-v16-0-945fd1cafbbc%40oss.qualcomm.com?part=2
> diff --git a/drivers/dma/qcom/bam_dma.c b/drivers/dma/qcom/bam_dma.c
> --- a/drivers/dma/qcom/bam_dma.c
> +++ b/drivers/dma/qcom/bam_dma.c
[ ... ]
> @@ -1302,8 +1302,7 @@ static int bam_dma_probe(struct platform_device *pdev)
> for (i = 0; i < bdev->num_channels; i++)
> bam_channel_init(bdev, &bdev->channels[i], i);
>
> - ret = devm_request_irq(bdev->dev, bdev->irq, bam_dma_irq,
> - IRQF_TRIGGER_HIGH, "bam_dma", bdev);
> + ret = request_irq(bdev->irq, bam_dma_irq, IRQF_TRIGGER_HIGH, "bam_dma", bdev);
[Severity: High]
This is a pre-existing issue, but does requesting the IRQ with
IRQF_TRIGGER_HIGH before pm_runtime_enable() is called risk an unhandled
interrupt storm?
If the interrupt line is already asserted at probe time, the handler will run
immediately. Because runtime PM is not yet enabled, pm_runtime_get_sync()
will fail in the handler, potentially causing it to return IRQ_NONE without
clearing the hardware interrupt.
[Severity: Critical]
This is also a pre-existing issue, but does the IRQ handler read hardware
registers (like BAM_IRQ_SRCS_EE) before using Runtime PM APIs to guarantee
the device is awake and its clocks are enabled?
If a spurious interrupt fires while the device is in runtime autosuspend,
could an unclocked hardware read trigger a synchronous external abort and
crash the system?
[ ... ]
> @@ -1371,6 +1372,8 @@ static void bam_dma_remove(struct platform_device *pdev)
> struct bam_device *bdev = platform_get_drvdata(pdev);
> u32 i;
>
> + free_irq(bdev->irq, bdev);
> +
[Severity: High]
Does freeing the IRQ here before calling dma_async_device_unregister() create
a window where active DMA clients will hang forever?
The interrupt handler is unregistered while the DMA controller is still fully
active and channels haven't been terminated. If any active transactions
complete or new ones are issued by a client during this window, wouldn't they
never receive an interrupt completion?
> pm_runtime_force_suspend(&pdev->dev);
>
> of_dma_controller_free(pdev->dev.of_node);
> dma_async_device_unregister(&bdev->common);
[Severity: High]
This isn't a bug introduced by this patch, but does allocating the bam_device
state with devm_kzalloc() lead to a use-after-free when this function
returns?
While dma_async_device_unregister() prevents new channel allocations, clients
may still hold references to existing channels. Because devres frees the
memory immediately upon remove() returning, couldn't clients using DMA APIs
or scheduled tasklets access freed memory?
> /* mask all interrupts for this execution environment */
> writel_relaxed(0, bam_addr(bdev, 0, BAM_IRQ_SRCS_MSK_EE));
[Severity: Critical]
This is a pre-existing issue, but does calling writel_relaxed() here access
hardware registers after pm_runtime_force_suspend() has already disabled the
bamclk?
Accessing peripheral registers when the module clock is disabled causes a
synchronous external abort on these platforms. Shouldn't this register
access occur before the device is suspended?
> - devm_free_irq(bdev->dev, bdev->irq, bdev);
> -
> for (i = 0; i < bdev->num_channels; i++) {
> bam_dma_terminate_all(&bdev->channels[i].vc.chan);
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260522-qcom-qce-cmd-descr-v18-0-99103926bafc@oss.qualcomm.com?part=2
next prev parent reply other threads:[~2026-05-22 14:17 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-22 13:39 [PATCH v18 00/14] crypto/dmaengine: qce: introduce BAM locking and use DMA for register I/O Bartosz Golaszewski
2026-05-22 13:39 ` [PATCH v18 01/14] dmaengine: constify struct dma_descriptor_metadata_ops Bartosz Golaszewski
2026-05-22 13:39 ` [PATCH v18 02/14] dmaengine: qcom: bam_dma: free interrupt before the clock in error path Bartosz Golaszewski
2026-05-22 14:17 ` sashiko-bot [this message]
2026-05-22 13:39 ` [PATCH v18 03/14] dmaengine: qcom: bam_dma: convert tasklet to a BH workqueue Bartosz Golaszewski
2026-05-22 14:37 ` sashiko-bot
2026-05-22 13:39 ` [PATCH v18 04/14] dmaengine: qcom: bam_dma: Extend the driver's device match data Bartosz Golaszewski
2026-05-22 13:39 ` [PATCH v18 05/14] dmaengine: qcom: bam_dma: Add pipe_lock_supported flag support Bartosz Golaszewski
2026-05-22 13:39 ` [PATCH v18 06/14] dmaengine: qcom: bam_dma: add support for BAM locking Bartosz Golaszewski
2026-05-22 15:25 ` sashiko-bot
2026-05-22 13:40 ` [PATCH v18 07/14] crypto: qce - Cancel work on device detach Bartosz Golaszewski
2026-05-22 15:57 ` sashiko-bot
2026-05-22 13:40 ` [PATCH v18 08/14] crypto: qce - Include algapi.h in the core.h header Bartosz Golaszewski
2026-05-22 13:40 ` [PATCH v18 09/14] crypto: qce - Remove unused ignore_buf Bartosz Golaszewski
2026-05-22 16:44 ` sashiko-bot
2026-05-22 13:40 ` [PATCH v18 10/14] crypto: qce - Simplify arguments of devm_qce_dma_request() Bartosz Golaszewski
2026-05-22 13:40 ` [PATCH v18 11/14] crypto: qce - Use existing devres APIs in devm_qce_dma_request() Bartosz Golaszewski
2026-05-22 17:15 ` sashiko-bot
2026-05-22 13:40 ` [PATCH v18 12/14] crypto: qce - Map crypto memory for DMA Bartosz Golaszewski
2026-05-22 17:56 ` sashiko-bot
2026-05-22 13:40 ` [PATCH v18 13/14] crypto: qce - Add BAM DMA support for crypto register I/O Bartosz Golaszewski
2026-05-22 13:40 ` [PATCH v18 14/14] crypto: qce - Communicate the base physical address to the dmaengine Bartosz Golaszewski
2026-05-24 20:49 ` [PATCH v18 00/14] crypto/dmaengine: qce: introduce BAM locking and use DMA for register I/O Eric Biggers
2026-05-25 5:44 ` Manivannan Sadhasivam
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260522141739.9FEB31F000E9@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=Frank.Li@kernel.org \
--cc=bartosz.golaszewski@oss.qualcomm.com \
--cc=dmaengine@vger.kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.