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From: Jamin Lin <jamin_lin@aspeedtech.com>
To: "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Steven Lee" <steven_lee@aspeedtech.com>,
	"Troy Lee" <leetroy@gmail.com>,
	"Kane Chen" <kane_chen@aspeedtech.com>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Joel Stanley" <joel@jms.id.au>,
	"Pierrick Bouvier" <pierrick.bouvier@oss.qualcomm.com>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: Jamin Lin <jamin_lin@aspeedtech.com>, Troy Lee <troy_lee@aspeedtech.com>
Subject: [PATCH v2 1/9] hw/arm/aspeed: Convert SRAM MemoryRegion to array type
Date: Mon, 25 May 2026 05:30:39 +0000	[thread overview]
Message-ID: <20260525053036.3305181-2-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20260525053036.3305181-1-jamin_lin@aspeedtech.com>

Several kinds of RAM are supported across Aspeed SoCs, including
SRAM, SDRAM, HyperRAM, secure SRAM, and generic SRAM. In addition,
different SoCs may expose multiple SRAM regions at different MMIO
addresses.

The current implementation models SRAM with a single MemoryRegion
instance, which makes future expansion cumbersome when additional
SRAM types or regions are introduced.

Prepare for future SoC designs by converting the SRAM MemoryRegion
from a single object into an array-based structure. This change
introduces ASPEED_SRAM_NUM and converts existing SRAM users to
reference sram[0].

No functional change.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
 include/hw/arm/aspeed_soc.h | 3 ++-
 hw/arm/aspeed_ast10x0.c     | 5 +++--
 hw/arm/aspeed_ast2400.c     | 6 +++---
 hw/arm/aspeed_ast2600.c     | 6 +++---
 hw/arm/aspeed_ast27x0.c     | 4 ++--
 5 files changed, 13 insertions(+), 11 deletions(-)

diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index d7b3647ca1..e6942b2936 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -60,6 +60,7 @@
 #define ASPEED_PCIE_NUM  3
 #define ASPEED_INTC_NUM  2
 #define ASPEED_IOEXP_NUM 2
+#define ASPEED_SRAM_NUM 1
 
 struct AspeedSoCState {
     DeviceState parent;
@@ -67,7 +68,7 @@ struct AspeedSoCState {
     MemoryRegion *memory;
     MemoryRegion *dram_mr;
     MemoryRegion dram_container;
-    MemoryRegion sram;
+    MemoryRegion sram[ASPEED_SRAM_NUM];
     MemoryRegion spi_boot_container;
     MemoryRegion spi_boot;
     MemoryRegion vbootrom;
diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c
index 41a4e82c1f..3e478f7520 100644
--- a/hw/arm/aspeed_ast10x0.c
+++ b/hw/arm/aspeed_ast10x0.c
@@ -240,14 +240,15 @@ static bool aspeed_soc_ast10x0_realize(Aspeed10x0SoCState *a, Error **errp)
     /* Internal SRAM */
     sram_name = g_strdup_printf("aspeed.sram.%d",
                                 CPU(a->armv7m.cpu)->cpu_index);
-    memory_region_init_ram(&s->sram, OBJECT(s), sram_name, sc->sram_size, &err);
+    memory_region_init_ram(&s->sram[0], OBJECT(s), sram_name, sc->sram_size,
+                           &err);
     if (err != NULL) {
         error_propagate(errp, err);
         return false;
     }
     memory_region_add_subregion(s->memory,
                                 sc->memmap[ASPEED_DEV_SRAM],
-                                &s->sram);
+                                &s->sram[0]);
     memory_region_init_ram(&s->secsram, OBJECT(s), "sec.sram",
                            sc->secsram_size, &err);
     if (err != NULL) {
diff --git a/hw/arm/aspeed_ast2400.c b/hw/arm/aspeed_ast2400.c
index b1b826b7e0..d79aa832f3 100644
--- a/hw/arm/aspeed_ast2400.c
+++ b/hw/arm/aspeed_ast2400.c
@@ -281,12 +281,12 @@ static void aspeed_ast2400_soc_realize(DeviceState *dev, Error **errp)
 
     /* SRAM */
     sram_name = g_strdup_printf("aspeed.sram.%d", CPU(&a->cpu[0])->cpu_index);
-    if (!memory_region_init_ram(&s->sram, OBJECT(s), sram_name, sc->sram_size,
-                                errp)) {
+    if (!memory_region_init_ram(&s->sram[0], OBJECT(s), sram_name,
+                                sc->sram_size, errp)) {
         return;
     }
     memory_region_add_subregion(s->memory,
-                                sc->memmap[ASPEED_DEV_SRAM], &s->sram);
+                                sc->memmap[ASPEED_DEV_SRAM], &s->sram[0]);
 
     /* SCU */
     if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) {
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index efb1d8c063..a69103de89 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -437,12 +437,12 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
 
     /* SRAM */
     sram_name = g_strdup_printf("aspeed.sram.%d", CPU(&a->cpu[0])->cpu_index);
-    if (!memory_region_init_ram(&s->sram, OBJECT(s), sram_name, sc->sram_size,
-                                errp)) {
+    if (!memory_region_init_ram(&s->sram[0], OBJECT(s), sram_name,
+                                sc->sram_size, errp)) {
         return;
     }
     memory_region_add_subregion(s->memory,
-                                sc->memmap[ASPEED_DEV_SRAM], &s->sram);
+                                sc->memmap[ASPEED_DEV_SRAM], &s->sram[0]);
 
     /* DPMCU */
     aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&s->dpmcu),
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index 87dcb82e1b..0fb5e4b24c 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -778,12 +778,12 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)
 
     /* SRAM */
     name = g_strdup_printf("aspeed.sram.%d", CPU(&a->cpu[0])->cpu_index);
-    if (!memory_region_init_ram(&s->sram, OBJECT(s), name, sc->sram_size,
+    if (!memory_region_init_ram(&s->sram[0], OBJECT(s), name, sc->sram_size,
                                 errp)) {
         return;
     }
     memory_region_add_subregion(s->memory,
-                                sc->memmap[ASPEED_DEV_SRAM], &s->sram);
+                                sc->memmap[ASPEED_DEV_SRAM], &s->sram[0]);
 
     /* VBOOTROM */
     if (!memory_region_init_ram(&s->vbootrom, OBJECT(s), "aspeed.vbootrom",
-- 
2.43.0


  reply	other threads:[~2026-05-25  5:31 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-25  5:30 [PATCH v2 0/9] hw/arm/aspeed: Introduce initial AST1040 support Jamin Lin
2026-05-25  5:30 ` Jamin Lin [this message]
2026-05-25  5:30 ` [PATCH v2 2/9] hw/arm/aspeed: Convert SRAM size definition to array type Jamin Lin
2026-05-25  5:30 ` [PATCH v2 3/9] hw/arm/aspeed: Rename SRAM memmap entry for multi-SRAM support Jamin Lin
2026-05-25  5:30 ` [PATCH v2 4/9] hw/arm/aspeed: Consolidate secure SRAM into SRAM array Jamin Lin
2026-05-25  5:30 ` [PATCH v2 5/9] hw/misc/aspeed_scu: Add AST1040 A0 silicon revision ID Jamin Lin
2026-05-25  5:30 ` [PATCH v2 6/9] hw/arm/aspeed: Introduce AST1040 A0 SoC model Jamin Lin
2026-05-25  5:30 ` [PATCH v2 7/9] hw/arm/aspeed: Add AST1040 EVB machine model Jamin Lin
2026-05-25  5:30 ` [PATCH v2 8/9] tests/function/aspeed: Add AST1040 functional test Jamin Lin
2026-05-25  5:30 ` [PATCH v2 9/9] docs/system/arm/aspeed: Add AST1040 Bridge IC evaluation board Jamin Lin
2026-05-26  4:58 ` [PATCH v2 0/9] hw/arm/aspeed: Introduce initial AST1040 support Cédric Le Goater
2026-05-26  5:02 ` Cédric Le Goater

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