* [PULL 2/6] linux-user/mips64: fix elf_core_copy_regs register layout in core files
2026-05-24 13:19 [PULL 0/6] Linux user next patches Helge Deller
2026-05-24 13:19 ` [PULL 1/6] linux-user/hppa: add coredump support Helge Deller
@ 2026-05-24 13:19 ` Helge Deller
2026-05-24 13:19 ` [PULL 3/6] linux-user/mips64: fix mipsn32 elf_core_copy_regs entry width Helge Deller
` (4 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Helge Deller @ 2026-05-24 13:19 UTC (permalink / raw)
To: qemu-devel
Cc: Matt Turner, Helge Deller, Philippe Mathieu-Daudé,
Laurent Vivier, Pierrick Bouvier
From: Matt Turner <mattst88@gmail.com>
mips64/elfload.c uses #include "../mips/elfload.c" to share code. When
the compiler processes mips/elfload.c the quoted #include "target_elf.h"
resolves relative to the including file's directory, so it picks up
mips/target_elf.h instead of mips64/target_elf.h. mips/target_elf.h
pulls in mips/target_ptrace.h, whose target_pt_regs has a pad0[6] field
before regs[]. As a result elf_core_copy_regs writes:
r->pt.regs[i] -> reserved[6+i] (shifted by 6 from the correct index)
r->pt.cp0_epc -> reserved[40] (correct mips64 N64 index is 34)
The Linux kernel and glibc both use the mips64 N64 layout (no pad0): EPC
at reserved[34]. Debuggers and libunwind reading the core with N64
constants therefore see a completely wrong register set — EPC points to
GP, RA holds the branch target instead of the link address, etc.
Fix by:
- Guarding the mips32 elf_core_copy_regs in mips/elfload.c with #ifndef
TARGET_MIPS64 so it is not compiled for mips64/mipsn32 targets.
- Providing a mips64-specific elf_core_copy_regs in mips64/elfload.c
that writes directly to r->reserved[i] with the correct N64 indices,
bypassing the struct field names that are tainted by the wrong header
include.
The mipsn32 (TARGET_ABI_MIPSN32) and mips64el targets are covered by the
same mips64/elfload.c and benefit from the same fix.
Signed-off-by: Matt Turner <mattst88@gmail.com>
Cc: qemu-stable@nongnu.org
Signed-off-by: Helge Deller <deller@gmx.de>
---
linux-user/mips/elfload.c | 2 ++
linux-user/mips64/elfload.c | 29 +++++++++++++++++++++++++++++
2 files changed, 31 insertions(+)
diff --git a/linux-user/mips/elfload.c b/linux-user/mips/elfload.c
index cc5bbf05ab..1a46e180cf 100644
--- a/linux-user/mips/elfload.c
+++ b/linux-user/mips/elfload.c
@@ -131,6 +131,7 @@ const char *get_elf_base_platform(CPUState *cs)
#undef MATCH_PLATFORM_INSN
/* See linux kernel: arch/mips/kernel/process.c:elf_dump_regs. */
+#ifndef TARGET_MIPS64
void elf_core_copy_regs(target_elf_gregset_t *r, const CPUMIPSState *env)
{
for (int i = 1; i < ARRAY_SIZE(env->active_tc.gpr); i++) {
@@ -146,3 +147,4 @@ void elf_core_copy_regs(target_elf_gregset_t *r, const CPUMIPSState *env)
r->pt.cp0_status = tswapl(env->CP0_Status);
r->pt.cp0_cause = tswapl(env->CP0_Cause);
}
+#endif
diff --git a/linux-user/mips64/elfload.c b/linux-user/mips64/elfload.c
index b719555e65..9081ae8111 100644
--- a/linux-user/mips64/elfload.c
+++ b/linux-user/mips64/elfload.c
@@ -1 +1,30 @@
#include "../mips/elfload.c"
+
+/*
+ * mips/elfload.c defines elf_core_copy_regs guarded by #ifndef TARGET_MIPS64.
+ *
+ * We must provide the mips64 version here. We cannot use r->pt.regs[] because
+ * when mips/elfload.c is #include'd above its "#include "target_elf.h"" resolves
+ * to mips/target_elf.h (compiler searches the including file's directory first),
+ * which pulls in mips/target_ptrace.h. That struct has pad0[6] before regs[],
+ * so r->pt.regs[i] writes to reserved[6+i] — offset by 6 from what the kernel
+ * and glibc expect for the N64 ABI (EPC at reserved[34], not reserved[40]).
+ *
+ * Write directly to reserved[] using the mips64 N64 index layout:
+ * R0-R31 at reserved[0..31], LO at [32], HI at [33], EPC at [34].
+ */
+void elf_core_copy_regs(target_elf_gregset_t *r, const CPUMIPSState *env)
+{
+ /* R0 is always 0; r->reserved is zero-initialised by the caller */
+ for (int i = 1; i < 32; i++) {
+ r->reserved[i] = tswap64(env->active_tc.gpr[i]);
+ }
+ r->reserved[26] = 0; /* k0 */
+ r->reserved[27] = 0; /* k1 */
+ r->reserved[32] = tswap64(env->active_tc.LO[0]);
+ r->reserved[33] = tswap64(env->active_tc.HI[0]);
+ r->reserved[34] = tswap64(env->active_tc.PC);
+ r->reserved[35] = tswap64(env->CP0_BadVAddr);
+ r->reserved[36] = tswap64(env->CP0_Status);
+ r->reserved[37] = tswap64(env->CP0_Cause);
+}
--
2.54.0
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PULL 6/6] linux-user/sh4: add VDSO support for sh4 and sh4eb
2026-05-24 13:19 [PULL 0/6] Linux user next patches Helge Deller
` (4 preceding siblings ...)
2026-05-24 13:19 ` [PULL 5/6] linux-user/riscv: add coredump support Helge Deller
@ 2026-05-24 13:19 ` Helge Deller
2026-05-26 14:59 ` [PULL 0/6] Linux user next patches Stefan Hajnoczi
6 siblings, 0 replies; 8+ messages in thread
From: Helge Deller @ 2026-05-24 13:19 UTC (permalink / raw)
To: qemu-devel
Cc: Matt Turner, Helge Deller, Philippe Mathieu-Daudé,
Laurent Vivier, Pierrick Bouvier
From: Matt Turner <mattst88@gmail.com>
Provides replacement VDSO with sigreturn trampolines
(__kernel_sigreturn, __kernel_rt_sigreturn) and syscall stubs
(clock_gettime, clock_gettime64, clock_getres, gettimeofday).
Both LE and BE blobs are committed and selected at compile time via
TARGET_BIG_ENDIAN. The BE variant requires an sh4eb-unknown-linux-gnu
toolchain; sh4-unknown-linux-gnu does not support -mb.
CFI register numbers follow GCC's SH_DEBUGGER_REGNO:
PR=17, GBR=18, MACH=20, MACL=21, FPUL=23, FPSCR=24, FR0-15=25-40.
Signed-off-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Helge Deller <deller@gmx.de>
---
linux-user/sh4/Makefile.vdso | 18 ++++
linux-user/sh4/elfload.c | 14 ++++
linux-user/sh4/meson.build | 12 +++
linux-user/sh4/target_elf.h | 1 +
linux-user/sh4/vdso-asmoffset.h | 45 ++++++++++
linux-user/sh4/vdso-be.so | Bin 0 -> 2704 bytes
linux-user/sh4/vdso-le.so | Bin 0 -> 2704 bytes
linux-user/sh4/vdso.S | 142 ++++++++++++++++++++++++++++++++
linux-user/sh4/vdso.ld | 67 +++++++++++++++
9 files changed, 299 insertions(+)
create mode 100644 linux-user/sh4/Makefile.vdso
create mode 100644 linux-user/sh4/vdso-asmoffset.h
create mode 100755 linux-user/sh4/vdso-be.so
create mode 100755 linux-user/sh4/vdso-le.so
create mode 100644 linux-user/sh4/vdso.S
create mode 100644 linux-user/sh4/vdso.ld
diff --git a/linux-user/sh4/Makefile.vdso b/linux-user/sh4/Makefile.vdso
new file mode 100644
index 0000000000..272c5d262d
--- /dev/null
+++ b/linux-user/sh4/Makefile.vdso
@@ -0,0 +1,18 @@
+include $(BUILD_DIR)/tests/tcg/sh4-linux-user/config-target.mak
+
+SUBDIR = $(SRC_PATH)/linux-user/sh4
+VPATH += $(SUBDIR)
+
+all: $(SUBDIR)/vdso-le.so $(SUBDIR)/vdso-be.so
+
+LDFLAGS = -nostdlib -shared -Wl,-h,linux-gate.so.1 \
+ -Wl,--build-id=sha1 -Wl,--hash-style=both \
+ -Wl,-T,$(SUBDIR)/vdso.ld
+
+$(SUBDIR)/vdso-le.so: vdso.S vdso.ld vdso-asmoffset.h
+ $(CC) -o $@ $(LDFLAGS) -ml $<
+
+CC_BE = sh4eb-unknown-linux-gnu-gcc
+
+$(SUBDIR)/vdso-be.so: vdso.S vdso.ld vdso-asmoffset.h
+ $(CC_BE) -o $@ $(LDFLAGS) $<
diff --git a/linux-user/sh4/elfload.c b/linux-user/sh4/elfload.c
index ddf2aaaed7..f03ce49e7d 100644
--- a/linux-user/sh4/elfload.c
+++ b/linux-user/sh4/elfload.c
@@ -5,6 +5,20 @@
#include "loader.h"
#include "target_elf.h"
+#if TARGET_BIG_ENDIAN
+# include "vdso-be.c.inc"
+#else
+# include "vdso-le.c.inc"
+#endif
+
+const VdsoImageInfo *get_vdso_image_info(uint32_t elf_flags G_GNUC_UNUSED)
+{
+#if TARGET_BIG_ENDIAN
+ return &vdso_be_image_info;
+#else
+ return &vdso_le_image_info;
+#endif
+}
const char *get_elf_cpu_model(uint32_t eflags)
{
diff --git a/linux-user/sh4/meson.build b/linux-user/sh4/meson.build
index 3bc3a6924a..611bce050b 100644
--- a/linux-user/sh4/meson.build
+++ b/linux-user/sh4/meson.build
@@ -3,3 +3,15 @@ syscall_nr_generators += {
arguments: [ meson.current_source_dir() / 'syscallhdr.sh', '@INPUT@', '@OUTPUT@', '@EXTRA_ARGS@' ],
output: '@BASENAME@_nr.h')
}
+
+vdso_le_inc = gen_vdso.process('vdso-le.so',
+ extra_args: ['-s', '__kernel_sigreturn',
+ '-r', '__kernel_rt_sigreturn',
+ '-p', 'vdso_le'])
+
+vdso_be_inc = gen_vdso.process('vdso-be.so',
+ extra_args: ['-s', '__kernel_sigreturn',
+ '-r', '__kernel_rt_sigreturn',
+ '-p', 'vdso_be'])
+
+linux_user_ss.add(when: 'TARGET_SH4', if_true: [vdso_le_inc, vdso_be_inc])
diff --git a/linux-user/sh4/target_elf.h b/linux-user/sh4/target_elf.h
index d9e253d425..3fcb63d409 100644
--- a/linux-user/sh4/target_elf.h
+++ b/linux-user/sh4/target_elf.h
@@ -15,6 +15,7 @@
#define HAVE_ELF_HWCAP 1
#define HAVE_ELF_CORE_DUMP 1
+#define HAVE_VDSO_IMAGE_INFO 1
/*
* See linux kernel: arch/sh/include/asm/elf.h, where
diff --git a/linux-user/sh4/vdso-asmoffset.h b/linux-user/sh4/vdso-asmoffset.h
new file mode 100644
index 0000000000..8ca96dce16
--- /dev/null
+++ b/linux-user/sh4/vdso-asmoffset.h
@@ -0,0 +1,45 @@
+/*
+ * Offsets into target signal frames for sh4 vdso.
+ *
+ * From linux-user/sh4/signal.c:
+ *
+ * struct target_sigcontext {
+ * target_ulong oldmask; // 0
+ * target_ulong sc_gregs[16]; // 4
+ * target_ulong sc_pc; // 68
+ * target_ulong sc_pr; // 72
+ * target_ulong sc_sr; // 76
+ * target_ulong sc_gbr; // 80
+ * target_ulong sc_mach; // 84
+ * target_ulong sc_macl; // 88
+ * target_ulong sc_fpregs[16]; // 92
+ * target_ulong sc_xfpregs[16]; // 156
+ * unsigned int sc_fpscr; // 220
+ * unsigned int sc_fpul; // 224
+ * unsigned int sc_ownedfp; // 228
+ * }; // sizeof = 232
+ *
+ * struct sigframe { sigcontext sc; ... }
+ * struct rt_sigframe { siginfo info[128]; ucontext uc; }
+ * ucontext = { flags[4], link[4], stack[12], sigcontext mcontext; ... }
+ * => mcontext at rt_sigframe + 128 + 20 = rt_sigframe + 148
+ */
+
+/* Offset of sigcontext within sigframe (CFA base for sigreturn). */
+#define SIGFRAME_SC_OFFSET 0
+
+/* Offset of tuc_mcontext within rt_sigframe (CFA base for rt_sigreturn). */
+#define RT_SIGFRAME_SC_OFFSET 148
+
+/* Offsets within struct sigcontext. */
+#define SC_GREGS 4
+#define SC_PC 68
+#define SC_PR 72
+#define SC_SR 76
+#define SC_GBR 80
+#define SC_MACH 84
+#define SC_MACL 88
+#define SC_FPREGS 92
+#define SC_XFPREGS 156
+#define SC_FPSCR 220
+#define SC_FPUL 224
diff --git a/linux-user/sh4/vdso-be.so b/linux-user/sh4/vdso-be.so
new file mode 100755
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diff --git a/linux-user/sh4/vdso-le.so b/linux-user/sh4/vdso-le.so
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HcmV?d00001
diff --git a/linux-user/sh4/vdso.S b/linux-user/sh4/vdso.S
new file mode 100644
index 0000000000..4fb5ee9d31
--- /dev/null
+++ b/linux-user/sh4/vdso.S
@@ -0,0 +1,142 @@
+/*
+ * sh4 linux replacement vdso.
+ *
+ * Copyright 2023 Linaro, Ltd.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include <asm/unistd.h>
+#include "vdso-asmoffset.h"
+
+ .text
+
+.macro endf name
+ .globl \name
+ .type \name, @function
+ .size \name, . - \name
+.endm
+
+/*
+ * SH4 syscall convention:
+ * Syscall number in r3 (caller-saved, so no save/restore needed)
+ * Arguments in r4-r7
+ * Return value in r0
+ * Syscall instruction: trapa #0x10
+ */
+
+.macro vdso_syscall name, nr
+\name:
+ .cfi_startproc
+ mov.l 1f, r3
+ trapa #0x10
+ rts
+ nop
+ .align 2
+1: .long \nr
+ .cfi_endproc
+endf \name
+.endm
+
+vdso_syscall __vdso_clock_gettime, __NR_clock_gettime
+vdso_syscall __vdso_clock_gettime64, __NR_clock_gettime64
+vdso_syscall __vdso_clock_getres, __NR_clock_getres
+vdso_syscall __vdso_gettimeofday, __NR_gettimeofday
+
+/*
+ * Signal return trampolines.
+ *
+ * For sigreturn: r15 points to struct sigframe; sigcontext is at
+ * offset SIGFRAME_SC_OFFSET (0).
+ * For rt_sigreturn: r15 points to struct rt_sigframe; sigcontext is at
+ * offset RT_SIGFRAME_SC_OFFSET (148).
+ *
+ * A single CFI region covers both trampolines. The CFA is set to the
+ * start of the relevant sigcontext; all register offsets are then
+ * identical for both trampolines. Between the two trampolines we use
+ * .cfi_def_cfa_offset to update the CFA base for the different layout.
+ */
+
+/*
+ * Start the unwind info at least one instruction before the signal
+ * trampoline, because the unwinder will assume we are returning
+ * after a call site.
+ */
+ .cfi_startproc simple
+ .cfi_signal_frame
+ .cfi_return_column 16 /* return column is PC */
+
+ /* CFA = r15 + SIGFRAME_SC_OFFSET = r15 (sigcontext base, sigreturn). */
+ .cfi_def_cfa 15, SIGFRAME_SC_OFFSET
+
+ /* Integer registers r0-r15: sc_gregs[n] at sigcontext + SC_GREGS + n*4. */
+ .cfi_offset 0, SC_GREGS + 0 * 4
+ .cfi_offset 1, SC_GREGS + 1 * 4
+ .cfi_offset 2, SC_GREGS + 2 * 4
+ .cfi_offset 3, SC_GREGS + 3 * 4
+ .cfi_offset 4, SC_GREGS + 4 * 4
+ .cfi_offset 5, SC_GREGS + 5 * 4
+ .cfi_offset 6, SC_GREGS + 6 * 4
+ .cfi_offset 7, SC_GREGS + 7 * 4
+ .cfi_offset 8, SC_GREGS + 8 * 4
+ .cfi_offset 9, SC_GREGS + 9 * 4
+ .cfi_offset 10, SC_GREGS + 10 * 4
+ .cfi_offset 11, SC_GREGS + 11 * 4
+ .cfi_offset 12, SC_GREGS + 12 * 4
+ .cfi_offset 13, SC_GREGS + 13 * 4
+ .cfi_offset 14, SC_GREGS + 14 * 4
+ .cfi_offset 15, SC_GREGS + 15 * 4
+
+ /* PC (return column). */
+ .cfi_offset 16, SC_PC
+
+ /* Control registers. */
+ .cfi_offset 17, SC_PR
+ .cfi_offset 18, SC_GBR
+ .cfi_offset 20, SC_MACH
+ .cfi_offset 21, SC_MACL
+
+ /* FP registers fr0-fr15: sc_fpregs[n] at sigcontext + SC_FPREGS + n*4. */
+ .cfi_offset 25, SC_FPREGS + 0 * 4
+ .cfi_offset 26, SC_FPREGS + 1 * 4
+ .cfi_offset 27, SC_FPREGS + 2 * 4
+ .cfi_offset 28, SC_FPREGS + 3 * 4
+ .cfi_offset 29, SC_FPREGS + 4 * 4
+ .cfi_offset 30, SC_FPREGS + 5 * 4
+ .cfi_offset 31, SC_FPREGS + 6 * 4
+ .cfi_offset 32, SC_FPREGS + 7 * 4
+ .cfi_offset 33, SC_FPREGS + 8 * 4
+ .cfi_offset 34, SC_FPREGS + 9 * 4
+ .cfi_offset 35, SC_FPREGS + 10 * 4
+ .cfi_offset 36, SC_FPREGS + 11 * 4
+ .cfi_offset 37, SC_FPREGS + 12 * 4
+ .cfi_offset 38, SC_FPREGS + 13 * 4
+ .cfi_offset 39, SC_FPREGS + 14 * 4
+ .cfi_offset 40, SC_FPREGS + 15 * 4
+
+ /* FPUL, FPSCR. */
+ .cfi_offset 23, SC_FPUL
+ .cfi_offset 24, SC_FPSCR
+
+ nop
+
+sigreturn_region_start:
+__kernel_sigreturn:
+ mov.l 1f, r3
+ trapa #0x10
+ .align 2
+1: .long __NR_sigreturn
+endf __kernel_sigreturn
+
+ /* Update CFA base for the rt_sigreturn frame layout. */
+ .cfi_def_cfa_offset RT_SIGFRAME_SC_OFFSET
+
+__kernel_rt_sigreturn:
+ mov.l 2f, r3
+ trapa #0x10
+ .align 2
+2: .long __NR_rt_sigreturn
+endf __kernel_rt_sigreturn
+sigreturn_region_end:
+
+ .cfi_endproc
diff --git a/linux-user/sh4/vdso.ld b/linux-user/sh4/vdso.ld
new file mode 100644
index 0000000000..3a6cb65d08
--- /dev/null
+++ b/linux-user/sh4/vdso.ld
@@ -0,0 +1,67 @@
+/*
+ * Linker script for linux sh4 replacement vdso.
+ *
+ * Copyright 2023 Linaro, Ltd.
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+VERSION {
+ LINUX_2.6 {
+ global:
+ __vdso_clock_gettime;
+ __vdso_clock_gettime64;
+ __vdso_clock_getres;
+ __vdso_gettimeofday;
+ __kernel_sigreturn;
+ __kernel_rt_sigreturn;
+ local: *;
+ };
+}
+
+PHDRS {
+ phdr PT_PHDR FLAGS(4) PHDRS;
+ load PT_LOAD FLAGS(7) FILEHDR PHDRS; /* FLAGS=RWX */
+ dynamic PT_DYNAMIC FLAGS(4);
+ eh_frame_hdr PT_GNU_EH_FRAME;
+ note PT_NOTE FLAGS(4);
+}
+
+SECTIONS {
+ . = SIZEOF_HEADERS;
+
+ /*
+ * The following, including the FILEHDRS and PHDRS, are modified
+ * when we relocate the binary. We want them to be initially
+ * writable for the relocation; we'll force them read-only after.
+ */
+ .note : { *(.note*) } :load :note
+ .dynamic : { *(.dynamic) } :load :dynamic
+ .dynsym : { *(.dynsym) } :load
+ .data : {
+ /*
+ * There ought not be any real read-write data.
+ * But since we manipulated the segment layout,
+ * we have to put these sections somewhere.
+ */
+ *(.data*)
+ *(.sdata*)
+ *(.got.plt) *(.got)
+ *(.gnu.linkonce.d.*)
+ *(.bss*)
+ *(.dynbss*)
+ *(.gnu.linkonce.b.*)
+ }
+
+ .rodata : { *(.rodata*) }
+ .hash : { *(.hash) }
+ .gnu.hash : { *(.gnu.hash) }
+ .dynstr : { *(.dynstr) }
+ .gnu.version : { *(.gnu.version) }
+ .gnu.version_d : { *(.gnu.version_d) }
+ .gnu.version_r : { *(.gnu.version_r) }
+ .eh_frame_hdr : { *(.eh_frame_hdr) } :load :eh_frame_hdr
+ .eh_frame : { *(.eh_frame) } :load
+
+ .text : { *(.text*) } :load
+}
--
2.54.0
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