From: Simon Horman <horms@kernel.org>
To: Przemyslaw Korba <przemyslaw.korba@intel.com>
Cc: intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org,
anthony.l.nguyen@intel.com, przemyslaw.kitszel@intel.com,
aleksandr.loktionov@intel.com, arkadiusz.kubalewski@intel.com
Subject: Re: [PATCH iwl-net v3] ice: support SBQ posted writes with non-posted support for CGU
Date: Tue, 26 May 2026 18:06:42 +0100 [thread overview]
Message-ID: <20260526170642.GA2256768@horms.kernel.org> (raw)
In-Reply-To: <20260520105311.5336-1-przemyslaw.korba@intel.com>
On Wed, May 20, 2026 at 12:52:03PM +0200, Przemyslaw Korba wrote:
> From: Karol Kolacinski <karol.kolacinski@intel.com>
>
> Sideband queue (SBQ) is a HW queue with very short completion time. All
> SBQ writes were posted by default, which means that the driver did not
> have to wait for completion from the neighbor device, because there was
> none. This introduced unnecessary delays, where only those delays were
> "ensuring" that the command is "completed" and this was a potential race
> condition.
>
> Add the possibility to perform non-posted writes where it's necessary to
> wait for completion, instead of relying on fake completion from the FW,
> where only the delays are guarding the writes.
>
> Flush the SBQ by reading address 0 from the PHY 0 before issuing SYNC
> command to ensure that writes to all PHYs were completed and skip SBQ
> message completion if it's posted.
>
> E810 only supports opcode 0x01, but its FW always sends completion
> responses for this opcode, so the driver waits for each write to complete.
> This makes E810 writes synchronous and eliminates the need for SBQ flush.
>
> To analyze if delays are gone, look for and compare time spent in
> ice_sq_send_cmd — posted writes should return immediately after the wr32.
> That can be done for example by adjusting phc time with phc_ctl on E830
> device, for less than 2 seconds to use this new mechanism. Without it,
> command below will fail.
>
> Reproduction steps:
> phc_ctl eth13 adj 1
> phc_ctl[4478170.994]: adjusted clock by 1.000000 seconds
>
> Check trace for timing for comparisions:
> echo ice_sbq_send_cmd > /sys/kernel/debug/tracing/set_ftrace_filter
> echo function_graph > /sys/kernel/debug/tracing/current_tracer
> cat /sys/kernel/debug/tracing/trace
>
> Tested on:
> - Intel E830 NIC (FW version 1.00)
> - Kernel 6.19.0+
>
> Fixes: 8f5ee3c477a8 ("ice: add support for sideband messages")
> Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
> Signed-off-by: Przemyslaw Korba <przemyslaw.korba@intel.com>
> Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
> Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
> ---
> v3:
> - include information in comments and commit message about different
> E810 behavior
> v2:
> https://lore.kernel.org/intel-wired-lan/20260508102247.826375-1-przemyslaw.korba@intel.com/
Thanks for the update.
Reviewed-by: Simon Horman <horms@kernel.org>
WARNING: multiple messages have this Message-ID (diff)
From: Simon Horman <horms@kernel.org>
To: Przemyslaw Korba <przemyslaw.korba@intel.com>
Cc: intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org,
anthony.l.nguyen@intel.com, przemyslaw.kitszel@intel.com,
aleksandr.loktionov@intel.com, arkadiusz.kubalewski@intel.com
Subject: Re: [Intel-wired-lan] [PATCH iwl-net v3] ice: support SBQ posted writes with non-posted support for CGU
Date: Tue, 26 May 2026 18:06:42 +0100 [thread overview]
Message-ID: <20260526170642.GA2256768@horms.kernel.org> (raw)
In-Reply-To: <20260520105311.5336-1-przemyslaw.korba@intel.com>
On Wed, May 20, 2026 at 12:52:03PM +0200, Przemyslaw Korba wrote:
> From: Karol Kolacinski <karol.kolacinski@intel.com>
>
> Sideband queue (SBQ) is a HW queue with very short completion time. All
> SBQ writes were posted by default, which means that the driver did not
> have to wait for completion from the neighbor device, because there was
> none. This introduced unnecessary delays, where only those delays were
> "ensuring" that the command is "completed" and this was a potential race
> condition.
>
> Add the possibility to perform non-posted writes where it's necessary to
> wait for completion, instead of relying on fake completion from the FW,
> where only the delays are guarding the writes.
>
> Flush the SBQ by reading address 0 from the PHY 0 before issuing SYNC
> command to ensure that writes to all PHYs were completed and skip SBQ
> message completion if it's posted.
>
> E810 only supports opcode 0x01, but its FW always sends completion
> responses for this opcode, so the driver waits for each write to complete.
> This makes E810 writes synchronous and eliminates the need for SBQ flush.
>
> To analyze if delays are gone, look for and compare time spent in
> ice_sq_send_cmd — posted writes should return immediately after the wr32.
> That can be done for example by adjusting phc time with phc_ctl on E830
> device, for less than 2 seconds to use this new mechanism. Without it,
> command below will fail.
>
> Reproduction steps:
> phc_ctl eth13 adj 1
> phc_ctl[4478170.994]: adjusted clock by 1.000000 seconds
>
> Check trace for timing for comparisions:
> echo ice_sbq_send_cmd > /sys/kernel/debug/tracing/set_ftrace_filter
> echo function_graph > /sys/kernel/debug/tracing/current_tracer
> cat /sys/kernel/debug/tracing/trace
>
> Tested on:
> - Intel E830 NIC (FW version 1.00)
> - Kernel 6.19.0+
>
> Fixes: 8f5ee3c477a8 ("ice: add support for sideband messages")
> Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
> Signed-off-by: Przemyslaw Korba <przemyslaw.korba@intel.com>
> Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>
> Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
> ---
> v3:
> - include information in comments and commit message about different
> E810 behavior
> v2:
> https://lore.kernel.org/intel-wired-lan/20260508102247.826375-1-przemyslaw.korba@intel.com/
Thanks for the update.
Reviewed-by: Simon Horman <horms@kernel.org>
next prev parent reply other threads:[~2026-05-26 17:06 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-20 10:52 [PATCH iwl-net v3] ice: support SBQ posted writes with non-posted support for CGU Przemyslaw Korba
2026-05-20 10:52 ` [Intel-wired-lan] " Przemyslaw Korba
2026-05-26 17:06 ` Simon Horman [this message]
2026-05-26 17:06 ` Simon Horman
2026-06-12 8:08 ` Rinitha, SX
2026-06-12 8:08 ` Rinitha, SX
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