From: Chen Pei <cp0613@linux.alibaba.com>
To: cp0613@linux.alibaba.com
Cc: alistair.francis@wdc.com, chao.liu.zevorn@gmail.com,
daniel.barboza@oss.qualcomm.com, guoren@kernel.org,
jic23@kernel.org, liwei1518@gmail.com, palmer@dabbelt.com,
pbonzini@redhat.com, qemu-devel@nongnu.org,
qemu-riscv@nongnu.org, sunilvl@ventanamicro.com,
zhiwei_liu@linux.alibaba.com
Subject: Re: [PATCH 4/4] hw/cxl: Map committed HDM decoder ranges as RAM for direct DMA
Date: Tue, 2 Jun 2026 16:04:58 +0800 [thread overview]
Message-ID: <20260602080458.71561-1-cp0613@linux.alibaba.com> (raw)
In-Reply-To: <20260602074127.63819-5-cp0613@linux.alibaba.com>
On 2 Jun 2026 15:41:27 +0800, cp0613@linux.alibaba.com wrote:
CC Jonathan.
next prev parent reply other threads:[~2026-06-02 8:06 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-02 7:41 [PATCH 0/4] hw/riscv/virt: Add CXL support and fix virtio DMA into CXL memory Chen Pei
2026-06-02 7:41 ` [PATCH 1/4] hw/riscv/virt: Add CXL support to the RISC-V virt machine Chen Pei
2026-06-09 12:41 ` Jonathan Cameron
2026-06-10 12:46 ` Chen Pei
2026-06-02 7:41 ` [PATCH 2/4] hw/riscv/virt-acpi-build: Add _DEP to ACPI0017 for CXL host bridge dependency Chen Pei
2026-06-09 12:47 ` Jonathan Cameron
2026-06-09 12:56 ` Peter Maydell
2026-06-10 12:49 ` Chen Pei
2026-06-09 15:08 ` Sunil V L
2026-06-02 7:41 ` [PATCH 3/4] hw/riscv/virt, gpex: Provide 32-bit MMIO window for CXL host bridges Chen Pei
2026-06-09 12:56 ` Jonathan Cameron
2026-06-10 12:58 ` Chen Pei
2026-06-02 7:41 ` [PATCH 4/4] hw/cxl: Map committed HDM decoder ranges as RAM for direct DMA Chen Pei
2026-06-02 8:04 ` Chen Pei [this message]
2026-06-09 12:36 ` Jonathan Cameron
2026-06-10 13:03 ` Chen Pei
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