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From: Conor Dooley <conor.dooley@microchip.com>
To: Guodong Xu <docular.xu@gmail.com>
Cc: Jonathan Corbet <corbet@lwn.net>,
	Shuah Khan <skhan@linuxfoundation.org>,
	Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>, Zong Li <zong.li@sifive.com>,
	Deepak Gupta <debug@rivosinc.com>,
	Anup Patel <anup@brainfault.org>,
	Atish Patra <atish.patra@linux.dev>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>, Yixun Lan <dlan@kernel.org>,
	Chen Wang <unicorn_wang@outlook.com>,
	Inochi Amaoto <inochiama@gmail.com>, <linux-doc@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<kvm@vger.kernel.org>, <kvm-riscv@lists.infradead.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Conor Dooley <conor@kernel.org>, <devicetree@vger.kernel.org>,
	<spacemit@lists.linux.dev>, <sophgo@lists.linux.dev>,
	<linux-kselftest@vger.kernel.org>,
	Palmer Dabbelt <palmer@sifive.com>,
	Andrew Jones <andrew.jones@oss.qualcomm.com>
Subject: Re: [PATCH v4 07/16] riscv: Add B to hwcap and hwprobe
Date: Fri, 12 Jun 2026 09:12:30 +0100	[thread overview]
Message-ID: <20260612-unsorted-sequester-6a4ec6b9d583@wendy> (raw)
In-Reply-To: <20260611-rva23u64-hwprobe-v2-v4-7-3f01a2449488@gmail.com>


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On Thu, Jun 11, 2026 at 04:12:44PM -0400, Guodong Xu wrote:
> From: Andrew Jones <andrew.jones@oss.qualcomm.com>
> 
> Add B to hwcap and ensure when B is present that Zba, Zbb, and Zbs
> are all set. Also expose B via hwprobe (RISCV_HWPROBE_EXT_B in
> RISCV_HWPROBE_KEY_IMA_EXT_1) so that userspace can probe B directly,
> mirroring the F/D/C/V pattern where each is reported via both hwcap
> and hwprobe.
> 
> Signed-off-by: Andrew Jones <andrew.jones@oss.qualcomm.com>
> [Add B to hwprobe]
> Signed-off-by: Guodong Xu <docular.xu@gmail.com>

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

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WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor.dooley@microchip.com>
To: Guodong Xu <docular.xu@gmail.com>
Cc: Jonathan Corbet <corbet@lwn.net>,
	Shuah Khan <skhan@linuxfoundation.org>,
	Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>, Zong Li <zong.li@sifive.com>,
	Deepak Gupta <debug@rivosinc.com>,
	Anup Patel <anup@brainfault.org>,
	Atish Patra <atish.patra@linux.dev>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>, Yixun Lan <dlan@kernel.org>,
	Chen Wang <unicorn_wang@outlook.com>,
	Inochi Amaoto <inochiama@gmail.com>, <linux-doc@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<kvm@vger.kernel.org>, <kvm-riscv@lists.infradead.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Conor Dooley <conor@kernel.org>, <devicetree@vger.kernel.org>,
	<spacemit@lists.linux.dev>, <sophgo@lists.linux.dev>,
	<linux-kselftest@vger.kernel.org>,
	Palmer Dabbelt <palmer@sifive.com>,
	Andrew Jones <andrew.jones@oss.qualcomm.com>
Subject: Re: [PATCH v4 07/16] riscv: Add B to hwcap and hwprobe
Date: Fri, 12 Jun 2026 09:12:30 +0100	[thread overview]
Message-ID: <20260612-unsorted-sequester-6a4ec6b9d583@wendy> (raw)
In-Reply-To: <20260611-rva23u64-hwprobe-v2-v4-7-3f01a2449488@gmail.com>

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On Thu, Jun 11, 2026 at 04:12:44PM -0400, Guodong Xu wrote:
> From: Andrew Jones <andrew.jones@oss.qualcomm.com>
> 
> Add B to hwcap and ensure when B is present that Zba, Zbb, and Zbs
> are all set. Also expose B via hwprobe (RISCV_HWPROBE_EXT_B in
> RISCV_HWPROBE_KEY_IMA_EXT_1) so that userspace can probe B directly,
> mirroring the F/D/C/V pattern where each is reported via both hwcap
> and hwprobe.
> 
> Signed-off-by: Andrew Jones <andrew.jones@oss.qualcomm.com>
> [Add B to hwprobe]
> Signed-off-by: Guodong Xu <docular.xu@gmail.com>

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

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WARNING: multiple messages have this Message-ID (diff)
From: Conor Dooley <conor.dooley@microchip.com>
To: Guodong Xu <docular.xu@gmail.com>
Cc: Jonathan Corbet <corbet@lwn.net>,
	Shuah Khan <skhan@linuxfoundation.org>,
	Paul Walmsley <pjw@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Alexandre Ghiti <alex@ghiti.fr>, Zong Li <zong.li@sifive.com>,
	Deepak Gupta <debug@rivosinc.com>,
	Anup Patel <anup@brainfault.org>,
	Atish Patra <atish.patra@linux.dev>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>, Yixun Lan <dlan@kernel.org>,
	Chen Wang <unicorn_wang@outlook.com>,
	Inochi Amaoto <inochiama@gmail.com>, <linux-doc@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<kvm@vger.kernel.org>, <kvm-riscv@lists.infradead.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Conor Dooley <conor@kernel.org>, <devicetree@vger.kernel.org>,
	<spacemit@lists.linux.dev>, <sophgo@lists.linux.dev>,
	<linux-kselftest@vger.kernel.org>,
	Palmer Dabbelt <palmer@sifive.com>,
	Andrew Jones <andrew.jones@oss.qualcomm.com>
Subject: Re: [PATCH v4 07/16] riscv: Add B to hwcap and hwprobe
Date: Fri, 12 Jun 2026 09:12:30 +0100	[thread overview]
Message-ID: <20260612-unsorted-sequester-6a4ec6b9d583@wendy> (raw)
In-Reply-To: <20260611-rva23u64-hwprobe-v2-v4-7-3f01a2449488@gmail.com>


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On Thu, Jun 11, 2026 at 04:12:44PM -0400, Guodong Xu wrote:
> From: Andrew Jones <andrew.jones@oss.qualcomm.com>
> 
> Add B to hwcap and ensure when B is present that Zba, Zbb, and Zbs
> are all set. Also expose B via hwprobe (RISCV_HWPROBE_EXT_B in
> RISCV_HWPROBE_KEY_IMA_EXT_1) so that userspace can probe B directly,
> mirroring the F/D/C/V pattern where each is reported via both hwcap
> and hwprobe.
> 
> Signed-off-by: Andrew Jones <andrew.jones@oss.qualcomm.com>
> [Add B to hwprobe]
> Signed-off-by: Guodong Xu <docular.xu@gmail.com>

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

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_______________________________________________
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linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2026-06-12  8:13 UTC|newest]

Thread overview: 77+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-11 20:12 [PATCH v4 00/16] riscv: hwprobe: Expose RVA23U64 base behavior Guodong Xu
2026-06-11 20:12 ` Guodong Xu
2026-06-11 20:12 ` Guodong Xu
2026-06-11 20:12 ` [PATCH v4 01/16] dt-bindings: riscv: sort multi-letter Z extensions alphanumerically Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-12  8:02   ` Conor Dooley
2026-06-12  8:02     ` Conor Dooley
2026-06-12  8:02     ` Conor Dooley
2026-06-11 20:12 ` [PATCH v4 02/16] riscv: hwprobe.rst: Make indentation consistent Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12 ` [PATCH v4 03/16] riscv: hwprobe.rst: Document EXT_ZICFISS and EXT_ZICFILP Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12 ` [PATCH v4 04/16] riscv: Standardize extension capitalization Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12 ` [PATCH v4 05/16] riscv: Add Zicclsm to cpufeature and hwprobe Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-12 13:51   ` Jesse Taube
2026-06-12 13:51     ` Jesse Taube
2026-06-12 13:51     ` Jesse Taube
2026-06-11 20:12 ` [PATCH v4 06/16] riscv: Add Ziccamoa, Ziccif, Ziccrse, and Za64rs " Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-12  8:10   ` Conor Dooley
2026-06-12  8:10     ` Conor Dooley
2026-06-12  8:10     ` Conor Dooley
2026-06-11 20:12 ` [PATCH v4 07/16] riscv: Add B to hwcap " Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-12  8:12   ` Conor Dooley [this message]
2026-06-12  8:12     ` Conor Dooley
2026-06-12  8:12     ` Conor Dooley
2026-06-11 20:12 ` [PATCH v4 08/16] dt-bindings: riscv: Add Zic64b extension description Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-12  8:23   ` Conor Dooley
2026-06-12  8:23     ` Conor Dooley
2026-06-12  8:23     ` Conor Dooley
2026-06-11 20:12 ` [PATCH v4 09/16] riscv: Add Zic64b to cpufeature and hwprobe Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:50   ` Andrew Jones
2026-06-11 20:50     ` Andrew Jones
2026-06-11 20:50     ` Andrew Jones
2026-06-12  8:41   ` Conor Dooley
2026-06-12  8:41     ` Conor Dooley
2026-06-12  8:41     ` Conor Dooley
2026-06-11 20:12 ` [PATCH v4 10/16] riscv: dts: spacemit: k3: Add Zic64b ISA extension Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-15  1:20   ` Yixun Lan
2026-06-15  1:20     ` Yixun Lan
2026-06-15  1:20     ` Yixun Lan
2026-06-11 20:12 ` [PATCH v4 11/16] riscv: dts: spacemit: k1: " Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12 ` [PATCH v4 12/16] riscv: dts: sophgo: sg2044: " Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12 ` [PATCH v4 13/16] riscv: Add a getter for user PMLEN support Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12 ` [PATCH v4 14/16] riscv: cpufeature: Introduce ISA bases bitmap and rva23u64 detection Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:32   ` sashiko-bot
2026-06-11 20:12 ` [PATCH v4 15/16] riscv: cpu: Output isa bases lines in cpuinfo Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12 ` [PATCH v4 16/16] riscv: hwprobe: Introduce rva23u64 base behavior Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:12   ` Guodong Xu
2026-06-11 20:42   ` sashiko-bot

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