[GIT PULL] Qualcomm clock updates for v7.2

[Bjorn Andersson <andersson@kernel.org>]

The following changes since commit 254f49634ee16a731174d2ae34bc50bd5f45e731:

  Linux 7.1-rc1 (2026-04-26 14:19:00 -0700)

are available in the Git repository at:

  https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git tags/qcom-clk-for-7.2

for you to fetch changes up to e108373c54fbc844b7f541c6fd7ecb31772afd3c:

  clk: qcom: regmap-phy-mux: Rework the implementation (2026-06-08 09:17:24 -0500)

----------------------------------------------------------------
Qualcomm clock updates for v7.2

Introduce global, TCSR, and RPMh clock controllers for the Hawi mobile
SoC.

Introduce GX clock for Milos, and ensure that camera clock controller
votes for interconnect bandwidth in order to ensure the TOP_GDSC can be
turned on.

Introduce camera and video clock controllers for Hamoa and Purwa. Reduce
the max_register of the display clock controller to avoid regmap
attemting to dump protected registers.

Introduce global clock controller for the IPQ9650 SoC and add IPQ5332
support to the cmnpll driver.

Add missing USB2 PHY reset to the Nord NegCC.

Rework the PHY mux clock implementation as necessary for upcoming USB4
support.

----------------------------------------------------------------
Alexander Koskovich (1):
      clk: qcom: clk-rpmh: Make all VRMs optional

Bartosz Golaszewski (2):
      dt-bindings: clock: qcom: add the definition for the USB2 PHY reset
      clk: qcom: nord: negcc: add support for the USB2 PHY reset

Biswapriyo Nath (1):
      dt-bindings: clock: qcom,sm6125-dispcc: reference qcom,gcc.yaml

Bjorn Andersson (2):
      Merge branch '20260507-ipq9650_boot_to_shell-v3-1-62742b49c991@oss.qualcomm.com' into clk-for-7.2
      Merge branch '20260106-qcom_ipq5332_cmnpll-v2-2-f9f7e4efbd79@oss.qualcomm.com' into clk-for-7.2

Jagadeesh Kona (5):
      dt-bindings: clock: qcom: Add X1P42100 video clock controller
      dt-bindings: clock: qcom: Add X1P42100 camera clock controller
      clk: qcom: videocc-x1p42100: Add support for video clock controller
      clk: qcom: camcc-x1e80100: Add support for camera QDSS debug clocks
      clk: qcom: camcc-x1p42100: Add support for camera clock controller

Kathiravan Thirumoorthy (2):
      dt-bindings: clock: add Qualcomm IPQ9650 GCC
      clk: qcom: add Global Clock controller (GCC) driver for IPQ9650 SoC

Konrad Dybcio (1):
      clk: qcom: regmap-phy-mux: Rework the implementation

Krzysztof Kozlowski (3):
      clk: qcom: dispcc-x1e80100: Fix (possibly) dumping regmap
      clk: qcom: Constify qcom_cc_driver_data and list of critical CBCR registers
      dt-bindings: clock: qcom,kaanapali-gxclkctl: Correctly use additionalProperties

Luca Weiss (6):
      dt-bindings: clock: qcom: document the Milos GX clock controller
      clk: qcom: Add support for GXCLK for Milos
      interconnect: Add devm_of_icc_get_by_index() as exported API for users
      dt-bindings: clock: qcom,milos-camcc: Document interconnect path
      clk: qcom: gdsc: Support enabling interconnect path for power domain
      clk: qcom: camcc-milos: Declare icc path dependency for CAMSS_TOP_GDSC

Luo Jie (3):
      dt-bindings: clock: qcom: Add CMN PLL support for IPQ5332 SoC
      clk: qcom: cmnpll: Account for reference clock divider
      clk: qcom: cmnpll: Add IPQ5332 SoC support

Phillip Varney (1):
      clk: qcom: a53: Corrected frequency multiplier for 1152MHz

Vivek Aknurwar (7):
      dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for Hawi
      dt-bindings: clock: qcom: Add Hawi TCSR clock controller
      dt-bindings: clock: qcom: Add Hawi global clock controller
      clk: qcom: rpmh: Add support for Hawi RPMH clocks
      clk: qcom: Add Hawi TCSR clock controller driver
      clk: qcom: clk-alpha-pll: Add support for Taycan EHA_T PLL
      clk: qcom: Add support for global clock controller on Hawi

 .../bindings/clock/qcom,dispcc-sm6125.yaml         |   17 +-
 .../devicetree/bindings/clock/qcom,hawi-gcc.yaml   |   63 +
 .../bindings/clock/qcom,ipq9574-cmn-pll.yaml       |    1 +
 .../bindings/clock/qcom,ipq9650-gcc.yaml           |   68 +
 .../bindings/clock/qcom,kaanapali-gxclkctl.yaml    |    2 +-
 .../bindings/clock/qcom,milos-camcc.yaml           |    8 +
 .../bindings/clock/qcom,milos-gxclkctl.yaml        |   61 +
 .../devicetree/bindings/clock/qcom,rpmhcc.yaml     |    1 +
 .../bindings/clock/qcom,sm8450-videocc.yaml        |    3 +
 .../bindings/clock/qcom,sm8550-tcsr.yaml           |    2 +
 .../bindings/clock/qcom,x1e80100-camcc.yaml        |    1 +
 drivers/clk/qcom/Kconfig                           |   48 +
 drivers/clk/qcom/Makefile                          |    7 +-
 drivers/clk/qcom/a53-pll.c                         |    2 +-
 drivers/clk/qcom/camcc-milos.c                     |    7 +
 drivers/clk/qcom/camcc-x1e80100.c                  |   64 +
 drivers/clk/qcom/camcc-x1p42100.c                  | 2223 ++++++++++++
 drivers/clk/qcom/clk-alpha-pll.h                   |    6 +
 drivers/clk/qcom/clk-regmap-phy-mux.c              |   52 +-
 drivers/clk/qcom/clk-rpmh.c                        |   41 +-
 drivers/clk/qcom/dispcc-x1e80100.c                 |    2 +-
 drivers/clk/qcom/gcc-hawi.c                        | 3657 ++++++++++++++++++++
 drivers/clk/qcom/gcc-ipq9650.c                     | 3445 ++++++++++++++++++
 drivers/clk/qcom/gcc-nord.c                        |    2 +-
 drivers/clk/qcom/gdsc.c                            |   33 +
 drivers/clk/qcom/gdsc.h                            |    5 +
 drivers/clk/qcom/gpucc-sm8750.c                    |    4 +-
 drivers/clk/qcom/gxclkctl-kaanapali.c              |    1 +
 drivers/clk/qcom/ipq-cmn-pll.c                     |   30 +-
 drivers/clk/qcom/negcc-nord.c                      |    3 +-
 drivers/clk/qcom/nwgcc-nord.c                      |    4 +-
 drivers/clk/qcom/segcc-nord.c                      |    2 +-
 drivers/clk/qcom/tcsrcc-hawi.c                     |  158 +
 drivers/clk/qcom/videocc-x1p42100.c                |  585 ++++
 drivers/interconnect/core.c                        |   20 +
 include/dt-bindings/clock/qcom,hawi-gcc.h          |  253 ++
 include/dt-bindings/clock/qcom,hawi-tcsrcc.h       |   16 +
 include/dt-bindings/clock/qcom,ipq5332-cmn-pll.h   |   19 +
 include/dt-bindings/clock/qcom,ipq9650-gcc.h       |  172 +
 include/dt-bindings/clock/qcom,nord-negcc.h        |    1 +
 include/dt-bindings/clock/qcom,rpmh.h              |    2 +
 include/dt-bindings/clock/qcom,x1e80100-camcc.h    |    3 +
 include/dt-bindings/clock/qcom,x1p42100-videocc.h  |   48 +
 include/dt-bindings/reset/qcom,ipq9650-gcc.h       |  215 ++
 include/linux/interconnect.h                       |    6 +
 45 files changed, 11313 insertions(+), 50 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,hawi-gcc.yaml
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,ipq9650-gcc.yaml
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,milos-gxclkctl.yaml
 create mode 100644 drivers/clk/qcom/camcc-x1p42100.c
 create mode 100644 drivers/clk/qcom/gcc-hawi.c
 create mode 100644 drivers/clk/qcom/gcc-ipq9650.c
 create mode 100644 drivers/clk/qcom/tcsrcc-hawi.c
 create mode 100644 drivers/clk/qcom/videocc-x1p42100.c
 create mode 100644 include/dt-bindings/clock/qcom,hawi-gcc.h
 create mode 100644 include/dt-bindings/clock/qcom,hawi-tcsrcc.h
 create mode 100644 include/dt-bindings/clock/qcom,ipq5332-cmn-pll.h
 create mode 100644 include/dt-bindings/clock/qcom,ipq9650-gcc.h
 create mode 100644 include/dt-bindings/clock/qcom,x1p42100-videocc.h
 create mode 100644 include/dt-bindings/reset/qcom,ipq9650-gcc.h