Re: [PATCH 1/5] LoongArch: BPF: Gate unsupported arena instructions via bpf_jit_supports_insn()

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] bpf_jit_supports_insn() fails to reject 1-byte and 2-byte atomic instructions on arena pointers, leaving the verifier/JIT mismatch bug open for these instruction sizes.
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commit 862ea469523044315d6f8a9fd4faf30c77844856
Author: George Guo <guodongtai@kylinos.cn>

LoongArch: BPF: Gate unsupported arena instructions via bpf_jit_supports_insn()

This commit implements bpf_jit_supports_insn() for LoongArch to reject
unsupported BPF arena instructions during verification. This prevents
confusing failures later in the JIT compiler.

> diff --git a/arch/loongarch/net/bpf_jit.c b/arch/loongarch/net/bpf_jit.c
> --- a/arch/loongarch/net/bpf_jit.c
> +++ b/arch/loongarch/net/bpf_jit.c
> @@ -2357,6 +2357,26 @@ bool bpf_jit_supports_arena(void)

[ ... ]

> +bool bpf_jit_supports_insn(struct bpf_insn *insn, bool in_arena)
> +{
> +	if (!in_arena)
> +		return true;
> +
> +	switch (insn->code) {
> +	case BPF_STX | BPF_ATOMIC | BPF_W:
> +	case BPF_STX | BPF_ATOMIC | BPF_DW:

[Severity: Medium]
Are 8-bit and 16-bit atomics supported on arena pointers?

This switch handles the 32-bit and 64-bit atomic instructions, but it omits the
BPF_B and BPF_H sizes. If 1-byte and 2-byte atomics are used on an arena
pointer, will this return true and cause the verifier to accept them, leading
to the same JIT failure this patch is trying to fix?

> +		/* Atomics on arena pointers are not implemented yet. */
> +		return false;

[ ... ]

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260618033809.98253-1-dongtai.guo@linux.dev?part=1