From: "Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>
To: qemu-devel@nongnu.org
Subject: [PULL 06/48] system/memory: Constify various AddressSpace arguments (access)
Date: Thu, 18 Jun 2026 14:27:43 +0200 [thread overview]
Message-ID: <20260618122825.90331-7-philmd@oss.qualcomm.com> (raw)
In-Reply-To: <20260618122825.90331-1-philmd@oss.qualcomm.com>
From: Philippe Mathieu-Daudé <philmd@linaro.org>
Mark the AddressSpace structure const when it is only accessed
read-only.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@oss.qualcomm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20260616020359.18627-6-philmd@oss.qualcomm.com>
---
include/system/memory.h | 13 +++++++------
system/physmem.c | 14 ++++++++------
2 files changed, 15 insertions(+), 12 deletions(-)
diff --git a/include/system/memory.h b/include/system/memory.h
index 7ecad33130c..e143c9c3f39 100644
--- a/include/system/memory.h
+++ b/include/system/memory.h
@@ -2719,7 +2719,7 @@ void address_space_remove_listeners(const AddressSpace *as);
* @len: the number of bytes to read or write
* @is_write: indicates the transfer direction
*/
-MemTxResult address_space_rw(AddressSpace *as, hwaddr addr,
+MemTxResult address_space_rw(const AddressSpace *as, hwaddr addr,
MemTxAttrs attrs, void *buf,
hwaddr len, bool is_write);
@@ -2736,7 +2736,7 @@ MemTxResult address_space_rw(AddressSpace *as, hwaddr addr,
* @buf: buffer with the data transferred
* @len: the number of bytes to write
*/
-MemTxResult address_space_write(AddressSpace *as, hwaddr addr,
+MemTxResult address_space_write(const AddressSpace *as, hwaddr addr,
MemTxAttrs attrs,
const void *buf, hwaddr len);
@@ -2799,7 +2799,8 @@ MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr,
#include "system/memory_ldst_phys.h.inc"
#endif
-void address_space_flush_icache_range(AddressSpace *as, hwaddr addr, hwaddr len);
+void address_space_flush_icache_range(AddressSpace *as,
+ hwaddr addr, hwaddr len);
/* address_space_get_iotlb_entry: translate an address into an IOTLB
* entry. Should be called from an RCU critical section.
@@ -2919,7 +2920,7 @@ void address_space_register_map_client(AddressSpace *as, QEMUBH *bh);
void address_space_unregister_map_client(AddressSpace *as, QEMUBH *bh);
/* Internal functions, part of the implementation of address_space_read. */
-MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr,
+MemTxResult address_space_read_full(const AddressSpace *as, hwaddr addr,
MemTxAttrs attrs, void *buf, hwaddr len);
MemTxResult flatview_read_continue(FlatView *fv, hwaddr addr,
MemTxAttrs attrs, void *buf,
@@ -2974,7 +2975,7 @@ static inline bool memory_access_is_direct(const MemoryRegion *mr,
* @len: length of the data transferred
*/
static inline __attribute__((__always_inline__))
-MemTxResult address_space_read(AddressSpace *as, hwaddr addr,
+MemTxResult address_space_read(const AddressSpace *as, hwaddr addr,
MemTxAttrs attrs, void *buf,
hwaddr len)
{
@@ -3017,7 +3018,7 @@ MemTxResult address_space_read(AddressSpace *as, hwaddr addr,
* @len: the number of bytes to fill with the constant byte
* @attrs: memory transaction attributes
*/
-MemTxResult address_space_set(AddressSpace *as, hwaddr addr,
+MemTxResult address_space_set(const AddressSpace *as, hwaddr addr,
uint8_t c, hwaddr len, MemTxAttrs attrs);
/* Coalesced MMIO regions are areas where write operations can be reordered.
diff --git a/system/physmem.c b/system/physmem.c
index b33aa14ab64..7ea65395863 100644
--- a/system/physmem.c
+++ b/system/physmem.c
@@ -3416,7 +3416,7 @@ static MemTxResult flatview_read(FlatView *fv, hwaddr addr,
mr_addr, l, mr);
}
-MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr,
+MemTxResult address_space_read_full(const AddressSpace *as, hwaddr addr,
MemTxAttrs attrs, void *buf, hwaddr len)
{
MemTxResult result = MEMTX_OK;
@@ -3431,7 +3431,7 @@ MemTxResult address_space_read_full(AddressSpace *as, hwaddr addr,
return result;
}
-MemTxResult address_space_write(AddressSpace *as, hwaddr addr,
+MemTxResult address_space_write(const AddressSpace *as, hwaddr addr,
MemTxAttrs attrs,
const void *buf, hwaddr len)
{
@@ -3447,8 +3447,9 @@ MemTxResult address_space_write(AddressSpace *as, hwaddr addr,
return result;
}
-MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
- void *buf, hwaddr len, bool is_write)
+MemTxResult address_space_rw(const AddressSpace *as, hwaddr addr,
+ MemTxAttrs attrs, void *buf,
+ hwaddr len, bool is_write)
{
if (is_write) {
return address_space_write(as, addr, attrs, buf, len);
@@ -3457,7 +3458,7 @@ MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
}
}
-MemTxResult address_space_set(AddressSpace *as, hwaddr addr,
+MemTxResult address_space_set(const AddressSpace *as, hwaddr addr,
uint8_t c, hwaddr len, MemTxAttrs attrs)
{
#define FILLBUF_SIZE 512
@@ -3514,7 +3515,8 @@ MemTxResult address_space_write_rom(AddressSpace *as, hwaddr addr,
return MEMTX_OK;
}
-void address_space_flush_icache_range(AddressSpace *as, hwaddr addr, hwaddr len)
+void address_space_flush_icache_range(AddressSpace *as,
+ hwaddr addr, hwaddr len)
{
/*
* This function should do the same thing as an icache flush that was
--
2.53.0
next prev parent reply other threads:[~2026-06-18 12:30 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-18 12:27 [PULL 00/48] Accel patches for 2026-06-18 Philippe Mathieu-Daudé
2026-06-18 12:27 ` [PULL 01/48] system/cpu: Reset vCPU %exception_index before resuming it Philippe Mathieu-Daudé
2026-06-18 12:27 ` [PULL 02/48] system/memory: Constify various AddressSpace arguments (checks) Philippe Mathieu-Daudé
2026-06-18 12:27 ` [PULL 03/48] system/memory: Constify various AddressSpace arguments (flat-range) Philippe Mathieu-Daudé
2026-06-18 12:27 ` [PULL 04/48] system/memory: Constify various AddressSpace arguments (notify) Philippe Mathieu-Daudé
2026-06-18 12:27 ` [PULL 05/48] system/memory: Constify various AddressSpace arguments (cache) Philippe Mathieu-Daudé
2026-06-18 12:27 ` Philippe Mathieu-Daudé [this message]
2026-06-18 12:27 ` [PULL 07/48] system/memory: Constify various MemoryRegionCache arguments Philippe Mathieu-Daudé
2026-06-18 12:27 ` [PULL 08/48] system: Document cpu_physical_memory_*() declarations Philippe Mathieu-Daudé
2026-06-18 12:27 ` [PULL 09/48] accel/kvm: Replace legacy cpu_physical_memory_write() call Philippe Mathieu-Daudé
2026-06-18 12:27 ` [PULL 10/48] gdbstub/system: Replace legacy cpu_physical_memory_read/write() calls Philippe Mathieu-Daudé
2026-06-18 12:27 ` [PULL 11/48] target/s390x: Factor common s390_ipl_read/write() helpers Philippe Mathieu-Daudé
2026-06-18 12:27 ` [PULL 12/48] target/s390x: Replace legacy cpu_physical_memory_read/write() calls Philippe Mathieu-Daudé
2026-06-18 12:27 ` [PULL 13/48] system: Move cpu_physical_memory_*() declarations to 'system/physmem.h' Philippe Mathieu-Daudé
2026-06-18 12:27 ` [PULL 14/48] hw/xen/interface: Remove pre-C99 checks Philippe Mathieu-Daudé
2026-06-18 12:27 ` [PULL 15/48] qom/object: Remove pre-C11 check Philippe Mathieu-Daudé
2026-06-18 12:27 ` [PULL 16/48] tcg: Include missing 'qemu/bitops.h' header in tcg-gvec-desc.h Philippe Mathieu-Daudé
2026-06-18 12:27 ` [PULL 17/48] target/i386: Report TPR accesses to HVF Philippe Mathieu-Daudé
2026-06-18 12:27 ` [PULL 18/48] target/arm: Only set CPU_INTERRUPT_EXITTB for TCG Philippe Mathieu-Daudé
2026-06-18 12:27 ` [PULL 19/48] target/arm: Remove vcpu_dirty=true assigments in hvf_handle_exception() Philippe Mathieu-Daudé
2026-06-18 12:27 ` [PULL 20/48] target/arm: Better describe PMU depends on TCG or HVF Philippe Mathieu-Daudé
2026-06-18 12:27 ` [PULL 21/48] target/arm/ptw: Restrict PMSAv8 code to TCG Philippe Mathieu-Daudé
2026-06-18 12:27 ` [PULL 22/48] target/arm: Restrict TCG specific headers Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 23/48] target/ppc: Restrict TCGTBCPUState to TCG Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 24/48] target/loongarch: Remove unused 'accel/accel-cpu-target.h' header Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 25/48] target/sparc: Include missing 'accel/tcg/cpu-ops.h' header in cpu.c Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 26/48] accel/hvf: fix double hv_vcpu_destroy() causing teardown error on ARM Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 27/48] accel/hvf: Reduce hvf_kernel_irqchip_override scope Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 28/48] accel/tcg: remove duplicate include Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 29/48] accel/tcg: Restrict IOMMU declarations Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 30/48] meson: build macOS signed binary as part of the default target Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 31/48] configure: honor --extra-ldflags when forced to use objc_LINKER Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 32/48] util/cutils: drop qemu_strnlen() in favor of strnlen() Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 33/48] ui/cocoa: Use qemu_input_map_osx_to_linux Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 34/48] exec/cpu-common.h: Include missing 'qemu/thread.h' header Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 35/48] exec/cpu-common.h: Avoid including unused 'exec/vaddr.h' header Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 36/48] exec/cpu-common.h: Avoid including unused 'tcg/debug-assert.h' header Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 37/48] exec/cpu-common.h: Avoid including unused exec/page-protection.h header Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 38/48] system/memory: Remove unnecessary CONFIG_USER_ONLY guards Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 39/48] system/memory: Rename cpu_exec_init_all() -> machine_memory_init() Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 40/48] hw/s390x/ipl: Remove TCG dependency in handle_diag_308() Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 41/48] accel/tcg: Remove cpu_loop_exit() stub Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 42/48] accel/tcg: Move cpu_exec() out of 'exec/cpu-common.h' Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 43/48] accel/tcg: Move cpu_exec_step_atomic() " Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 44/48] accel/tcg: Move cpu_unwind_state_data() " Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 45/48] accel/tcg: Move cpu_restore_state() " Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 46/48] accel/tcg: Have cpu_loop_exit_requested() take const @cpu argument Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 47/48] accel/tcg: Move cpu_loop_exit_*() out of 'exec/cpu-common.h' Philippe Mathieu-Daudé
2026-06-18 12:28 ` [PULL 48/48] accel/tcg: Restrict headers being TCG specific Philippe Mathieu-Daudé
2026-06-18 17:54 ` [PULL 00/48] Accel patches for 2026-06-18 Stefan Hajnoczi
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