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From: sashiko-bot@kernel.org
To: "Esteban Urrutia via B4 Relay" <devnull+esteuwu.proton.me@kernel.org>
Cc: neil.armstrong@linaro.org, olteanv@gmail.com,
	linux-phy@lists.infradead.org, robh@kernel.org,
	conor+dt@kernel.org, devicetree@vger.kernel.org,
	vkoul@kernel.org
Subject: Re: [PATCH 4/8] arm64: dts: qcom: sm8450: Add missing PCM_OUT port
Date: Tue, 23 Jun 2026 01:03:47 +0000	[thread overview]
Message-ID: <20260623010348.411431F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260622-sm8450-qol-v1-4-37e2ee8df9da@proton.me>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Silent and likely accidental modification of the sample interval for the second SoundWire port from 0x1f to 0x3f.
--

commit c423fe48b88cf765efc50ccc2d69ba6fafa2266a
Author: Esteban Urrutia <esteuwu@proton.me>

arm64: dts: qcom: sm8450: Add missing PCM_OUT port

This commit updates the sm8450 device tree to add a missing PCM_OUT port
to the soundwire RX controller, incrementing the dout-ports count from 5
to 6. It also expands the corresponding configuration arrays, migrating the
ports-sinterval array to 16 bits to accommodate the new 0x18f value.

> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 5e331a25e22a2..8fc58a02e5c51 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -2914,20 +2914,20 @@ swr1: soundwire@3210000 {

[ ... ]

> -			qcom,ports-sinterval-low =	/bits/ 8 <0x03 0x1f 0x1f 0x07 0x00>;
> -			qcom,ports-offset1 =		/bits/ 8 <0x00 0x00 0x0b 0x01 0x00>;
> -			qcom,ports-offset2 =		/bits/ 8 <0x00 0x00 0x0b 0x00 0x00>;
> -			qcom,ports-hstart =		/bits/ 8 <0xff 0x03 0xff 0xff 0xff>;
> -			qcom,ports-hstop =		/bits/ 8 <0xff 0x06 0xff 0xff 0xff>;
> -			qcom,ports-word-length =	/bits/ 8 <0x01 0x07 0x04 0xff 0xff>;
> -			qcom,ports-block-pack-mode =	/bits/ 8 <0xff 0x00 0x01 0xff 0xff>;
> -			qcom,ports-block-group-count =	/bits/ 8 <0xff 0xff 0xff 0xff 0x00>;
> -			qcom,ports-lane-control =	/bits/ 8 <0x01 0x00 0x00 0x00 0x00>;
> +			qcom,ports-sinterval =		/bits/ 16 <0x03 0x3f 0x1f 0x07 0x00 0x18f>;

[Severity: Medium]
Was it intended to change the sample interval of the second port from 0x1f to
0x3f when migrating to the 16-bit array here in swr1: soundwire@3210000?

Could this regression cause a configuration mismatch between the SoundWire
controller and the expected transport window of the codec?

An incorrect sample interval might break Class-H envelope tracking or cause
SoundWire bus errors on the RX macro when the controller is initialized and
negotiates port parameters.

> +			qcom,ports-offset1 =		/bits/ 8 <0x00 0x00 0x0b 0x01 0x00 0x00>;
> +			qcom,ports-offset2 =		/bits/ 8 <0x00 0x00 0x0b 0x00 0x00 0x00>;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260622-sm8450-qol-v1-0-37e2ee8df9da@proton.me?part=4

WARNING: multiple messages have this Message-ID (diff)
From: sashiko-bot@kernel.org
To: "Esteban Urrutia via B4 Relay" <devnull+esteuwu.proton.me@kernel.org>
Cc: neil.armstrong@linaro.org, olteanv@gmail.com,
	linux-phy@lists.infradead.org, robh@kernel.org,
	conor+dt@kernel.org, devicetree@vger.kernel.org,
	vkoul@kernel.org
Subject: Re: [PATCH 4/8] arm64: dts: qcom: sm8450: Add missing PCM_OUT port
Date: Tue, 23 Jun 2026 01:03:47 +0000	[thread overview]
Message-ID: <20260623010348.411431F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260622-sm8450-qol-v1-4-37e2ee8df9da@proton.me>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Silent and likely accidental modification of the sample interval for the second SoundWire port from 0x1f to 0x3f.
--

commit c423fe48b88cf765efc50ccc2d69ba6fafa2266a
Author: Esteban Urrutia <esteuwu@proton.me>

arm64: dts: qcom: sm8450: Add missing PCM_OUT port

This commit updates the sm8450 device tree to add a missing PCM_OUT port
to the soundwire RX controller, incrementing the dout-ports count from 5
to 6. It also expands the corresponding configuration arrays, migrating the
ports-sinterval array to 16 bits to accommodate the new 0x18f value.

> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 5e331a25e22a2..8fc58a02e5c51 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -2914,20 +2914,20 @@ swr1: soundwire@3210000 {

[ ... ]

> -			qcom,ports-sinterval-low =	/bits/ 8 <0x03 0x1f 0x1f 0x07 0x00>;
> -			qcom,ports-offset1 =		/bits/ 8 <0x00 0x00 0x0b 0x01 0x00>;
> -			qcom,ports-offset2 =		/bits/ 8 <0x00 0x00 0x0b 0x00 0x00>;
> -			qcom,ports-hstart =		/bits/ 8 <0xff 0x03 0xff 0xff 0xff>;
> -			qcom,ports-hstop =		/bits/ 8 <0xff 0x06 0xff 0xff 0xff>;
> -			qcom,ports-word-length =	/bits/ 8 <0x01 0x07 0x04 0xff 0xff>;
> -			qcom,ports-block-pack-mode =	/bits/ 8 <0xff 0x00 0x01 0xff 0xff>;
> -			qcom,ports-block-group-count =	/bits/ 8 <0xff 0xff 0xff 0xff 0x00>;
> -			qcom,ports-lane-control =	/bits/ 8 <0x01 0x00 0x00 0x00 0x00>;
> +			qcom,ports-sinterval =		/bits/ 16 <0x03 0x3f 0x1f 0x07 0x00 0x18f>;

[Severity: Medium]
Was it intended to change the sample interval of the second port from 0x1f to
0x3f when migrating to the 16-bit array here in swr1: soundwire@3210000?

Could this regression cause a configuration mismatch between the SoundWire
controller and the expected transport window of the codec?

An incorrect sample interval might break Class-H envelope tracking or cause
SoundWire bus errors on the RX macro when the controller is initialized and
negotiates port parameters.

> +			qcom,ports-offset1 =		/bits/ 8 <0x00 0x00 0x0b 0x01 0x00 0x00>;
> +			qcom,ports-offset2 =		/bits/ 8 <0x00 0x00 0x0b 0x00 0x00 0x00>;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260622-sm8450-qol-v1-0-37e2ee8df9da@proton.me?part=4

-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

  reply	other threads:[~2026-06-23  1:03 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-23  0:54 [PATCH 0/8] SM8450 QoL changes Esteban Urrutia via B4 Relay
2026-06-23  0:54 ` Esteban Urrutia
2026-06-23  0:54 ` Esteban Urrutia via B4 Relay
2026-06-23  0:54 ` [PATCH 1/8] clk: qcom: dispcc-sm8450: Fix mdss clocks Esteban Urrutia via B4 Relay
2026-06-23  0:54   ` Esteban Urrutia
2026-06-23  0:54   ` Esteban Urrutia via B4 Relay
2026-06-23  0:54 ` [PATCH 2/8] arm64: dts: qcom: sm8450: Remove unneeded reserved memory nodes Esteban Urrutia via B4 Relay
2026-06-23  0:54   ` Esteban Urrutia
2026-06-23  0:54   ` Esteban Urrutia via B4 Relay
2026-06-23 11:02   ` Konrad Dybcio
2026-06-23 11:02     ` Konrad Dybcio
2026-06-23 11:03     ` Konrad Dybcio
2026-06-23 11:03       ` Konrad Dybcio
2026-06-23  0:54 ` [PATCH 3/8] arm64: dts: qcom: sm8450: Modify GPU operating points Esteban Urrutia via B4 Relay
2026-06-23  0:54   ` Esteban Urrutia
2026-06-23  0:54   ` Esteban Urrutia via B4 Relay
2026-06-23  1:10   ` sashiko-bot
2026-06-23  1:10     ` sashiko-bot
2026-06-23 11:23   ` Konrad Dybcio
2026-06-23 11:23     ` Konrad Dybcio
2026-06-23  0:54 ` [PATCH 4/8] arm64: dts: qcom: sm8450: Add missing PCM_OUT port Esteban Urrutia via B4 Relay
2026-06-23  0:54   ` Esteban Urrutia
2026-06-23  0:54   ` Esteban Urrutia via B4 Relay
2026-06-23  1:03   ` sashiko-bot [this message]
2026-06-23  1:03     ` sashiko-bot
2026-06-23  0:54 ` [PATCH 5/8] iommu/arm-smmu-qcom: Add SM8450 MDSS compatible Esteban Urrutia via B4 Relay
2026-06-23  0:54   ` Esteban Urrutia
2026-06-23  0:54   ` Esteban Urrutia via B4 Relay
2026-06-23  1:07   ` sashiko-bot
2026-06-23  1:07     ` sashiko-bot
2026-06-23 11:23   ` Konrad Dybcio
2026-06-23 11:23     ` Konrad Dybcio
2026-06-23  0:54 ` [PATCH 6/8] phy: qcom: qmp-combo: Drop qmp_v4_calibrate_dp_phy Esteban Urrutia via B4 Relay
2026-06-23  0:54   ` Esteban Urrutia
2026-06-23  0:54   ` Esteban Urrutia via B4 Relay
2026-06-23  0:54 ` [PATCH 7/8] phy: qcom: qmp-combo: Correct pre-emphasis table for QMP v4 DP PHYs Esteban Urrutia via B4 Relay
2026-06-23  0:54   ` Esteban Urrutia
2026-06-23  0:54   ` Esteban Urrutia via B4 Relay
2026-06-23  0:54 ` [PATCH 8/8] arm64: defconfig: Add SM8450 camcc Esteban Urrutia via B4 Relay
2026-06-23  0:54   ` Esteban Urrutia
2026-06-23  0:54   ` Esteban Urrutia via B4 Relay
2026-06-23  5:38   ` Krzysztof Kozlowski
2026-06-23  5:38     ` Krzysztof Kozlowski

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