* [PATCH 1/3] dt-bindings: vendor-prefixes: Add graperain @ 2026-06-27 22:57 ` Coia Prant 0 siblings, 0 replies; 14+ messages in thread From: Coia Prant @ 2026-06-27 22:57 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Dragan Simic, Jonas Karlman Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel, Coia Prant Add graperain to the vendor prefixes. Link: https://www.graperain.cn/ (China) Link: https://www.graperain.com/ (Global) Signed-off-by: Coia Prant <coiaprant@gmail.com> --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 396044f36..641a37c0d 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -682,6 +682,8 @@ patternProperties: description: Goramo Gorecki "^gplus,.*": description: GPLUS + "^graperain,.*": + description: Shenzhen Graperain Technology Co., Ltd. "^grinn,.*": description: Grinn "^grmn,.*": -- 2.47.3 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 1/3] dt-bindings: vendor-prefixes: Add graperain @ 2026-06-27 22:57 ` Coia Prant 0 siblings, 0 replies; 14+ messages in thread From: Coia Prant @ 2026-06-27 22:57 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Dragan Simic, Jonas Karlman Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel, Coia Prant Add graperain to the vendor prefixes. Link: https://www.graperain.cn/ (China) Link: https://www.graperain.com/ (Global) Signed-off-by: Coia Prant <coiaprant@gmail.com> --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 396044f36..641a37c0d 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -682,6 +682,8 @@ patternProperties: description: Goramo Gorecki "^gplus,.*": description: GPLUS + "^graperain,.*": + description: Shenzhen Graperain Technology Co., Ltd. "^grinn,.*": description: Grinn "^grmn,.*": -- 2.47.3 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/3] dt-bindings: arm: rockchip: Add Graperain G3568 series 2026-06-27 22:57 ` Coia Prant @ 2026-06-27 22:57 ` Coia Prant -1 siblings, 0 replies; 14+ messages in thread From: Coia Prant @ 2026-06-27 22:57 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Dragan Simic, Jonas Karlman Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel, Coia Prant This documents Graperain G3568 v2 which is a development board based on RK3568 SoC. This series also have an SBC series with the suffix "box". This board is development board series, not SBC series. Link: https://www.graperain.cn/RK3568/RK3568-Development/ (China) Link: https://www.graperain.com/ARM-Embedded-RK3568-Development-Board/ (Global) Link: https://image.chukouplus.com/upload/C_153/product_file/20211022/6daddec9e400458816dd4c57ba807fc3.pdf Signed-off-by: Coia Prant <coiaprant@gmail.com> --- Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 1a9dde186..873d41bff 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -683,6 +683,12 @@ properties: - const: google,veyron-tiger - const: google,veyron - const: rockchip,rk3288 + + - description: Graperain G3568 series board + items: + - enum: + - graperain,g3568-v2 + - const: rockchip,rk3568 - description: H96 Max V58 TV Box items: -- 2.47.3 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/3] dt-bindings: arm: rockchip: Add Graperain G3568 series @ 2026-06-27 22:57 ` Coia Prant 0 siblings, 0 replies; 14+ messages in thread From: Coia Prant @ 2026-06-27 22:57 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Dragan Simic, Jonas Karlman Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel, Coia Prant This documents Graperain G3568 v2 which is a development board based on RK3568 SoC. This series also have an SBC series with the suffix "box". This board is development board series, not SBC series. Link: https://www.graperain.cn/RK3568/RK3568-Development/ (China) Link: https://www.graperain.com/ARM-Embedded-RK3568-Development-Board/ (Global) Link: https://image.chukouplus.com/upload/C_153/product_file/20211022/6daddec9e400458816dd4c57ba807fc3.pdf Signed-off-by: Coia Prant <coiaprant@gmail.com> --- Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index 1a9dde186..873d41bff 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -683,6 +683,12 @@ properties: - const: google,veyron-tiger - const: google,veyron - const: rockchip,rk3288 + + - description: Graperain G3568 series board + items: + - enum: + - graperain,g3568-v2 + - const: rockchip,rk3568 - description: H96 Max V58 TV Box items: -- 2.47.3 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 2/3] dt-bindings: arm: rockchip: Add Graperain G3568 series 2026-06-27 22:57 ` Coia Prant @ 2026-06-29 7:12 ` Krzysztof Kozlowski -1 siblings, 0 replies; 14+ messages in thread From: Krzysztof Kozlowski @ 2026-06-29 7:12 UTC (permalink / raw) To: Coia Prant Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Dragan Simic, Jonas Karlman, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel On Sun, Jun 28, 2026 at 06:57:56AM +0800, Coia Prant wrote: > This documents Graperain G3568 v2 which is a development board based on RK3568 SoC. "Document" Please do not use "This commit/patch/change", but imperative mood. See longer explanation here: https://elixir.bootlin.com/linux/v6.16/source/Documentation/process/submitting-patches.rst#L94 > > This series also have an SBC series with the suffix "box". > > This board is development board series, not SBC series. Remember to also address Sashiko review. > > Link: https://www.graperain.cn/RK3568/RK3568-Development/ (China) > Link: https://www.graperain.com/ARM-Embedded-RK3568-Development-Board/ (Global) > Link: https://image.chukouplus.com/upload/C_153/product_file/20211022/6daddec9e400458816dd4c57ba807fc3.pdf > > Signed-off-by: Coia Prant <coiaprant@gmail.com> > --- > Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml > index 1a9dde186..873d41bff 100644 > --- a/Documentation/devicetree/bindings/arm/rockchip.yaml > +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml > @@ -683,6 +683,12 @@ properties: > - const: google,veyron-tiger > - const: google,veyron > - const: rockchip,rk3288 > + Looks like you just added bunch of format-patch and check-patch warnings... Best regards, Krzysztof _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/3] dt-bindings: arm: rockchip: Add Graperain G3568 series @ 2026-06-29 7:12 ` Krzysztof Kozlowski 0 siblings, 0 replies; 14+ messages in thread From: Krzysztof Kozlowski @ 2026-06-29 7:12 UTC (permalink / raw) To: Coia Prant Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Dragan Simic, Jonas Karlman, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel On Sun, Jun 28, 2026 at 06:57:56AM +0800, Coia Prant wrote: > This documents Graperain G3568 v2 which is a development board based on RK3568 SoC. "Document" Please do not use "This commit/patch/change", but imperative mood. See longer explanation here: https://elixir.bootlin.com/linux/v6.16/source/Documentation/process/submitting-patches.rst#L94 > > This series also have an SBC series with the suffix "box". > > This board is development board series, not SBC series. Remember to also address Sashiko review. > > Link: https://www.graperain.cn/RK3568/RK3568-Development/ (China) > Link: https://www.graperain.com/ARM-Embedded-RK3568-Development-Board/ (Global) > Link: https://image.chukouplus.com/upload/C_153/product_file/20211022/6daddec9e400458816dd4c57ba807fc3.pdf > > Signed-off-by: Coia Prant <coiaprant@gmail.com> > --- > Documentation/devicetree/bindings/arm/rockchip.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml > index 1a9dde186..873d41bff 100644 > --- a/Documentation/devicetree/bindings/arm/rockchip.yaml > +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml > @@ -683,6 +683,12 @@ properties: > - const: google,veyron-tiger > - const: google,veyron > - const: rockchip,rk3288 > + Looks like you just added bunch of format-patch and check-patch warnings... Best regards, Krzysztof ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/3] dt-bindings: arm: rockchip: Add Graperain G3568 series 2026-06-29 7:12 ` Krzysztof Kozlowski @ 2026-06-29 8:29 ` Coia Prant -1 siblings, 0 replies; 14+ messages in thread From: Coia Prant @ 2026-06-29 8:29 UTC (permalink / raw) To: Krzysztof Kozlowski Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Dragan Simic, Jonas Karlman, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel On Mon, Jun 29, 2026 at 03:12:XXPM +0800, Krzysztof Kozlowski wrote: > On Sun, Jun 28, 2026 at 06:57:56AM +0800, Coia Prant wrote: > > This documents Graperain G3568 v2 which is a development board based on RK3568 SoC. > > "Document" > > Please do not use "This commit/patch/change", but imperative mood. See > longer explanation here: > https://elixir.bootlin.com/linux/v6.16/source/Documentation/process/submitting-patches.rst#L94 Thank you for pointing this out. I have revised the commit message to use imperative mood and split the overlong line to stay within 75 characters. > > This series also have an SBC series with the suffix "box". > > > > This board is development board series, not SBC series. > > Remember to also address Sashiko review. Okay. > > Link: ... > > Signed-off-by: ... > > --- > > ... > > + > > Looks like you just added bunch of format-patch and check-patch > warnings... I have re‑run checkpatch on the entire series and fixed all trailing whitespace and other formatting issues. The patch set should now be clean (except for a hardware‑list line in the third patch which I kept intact for readability). Apologies for the oversight – it was late night work. I will send a v2 with all fixes shortly. Best, Coia ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 2/3] dt-bindings: arm: rockchip: Add Graperain G3568 series @ 2026-06-29 8:29 ` Coia Prant 0 siblings, 0 replies; 14+ messages in thread From: Coia Prant @ 2026-06-29 8:29 UTC (permalink / raw) To: Krzysztof Kozlowski Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Dragan Simic, Jonas Karlman, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel On Mon, Jun 29, 2026 at 03:12:XXPM +0800, Krzysztof Kozlowski wrote: > On Sun, Jun 28, 2026 at 06:57:56AM +0800, Coia Prant wrote: > > This documents Graperain G3568 v2 which is a development board based on RK3568 SoC. > > "Document" > > Please do not use "This commit/patch/change", but imperative mood. See > longer explanation here: > https://elixir.bootlin.com/linux/v6.16/source/Documentation/process/submitting-patches.rst#L94 Thank you for pointing this out. I have revised the commit message to use imperative mood and split the overlong line to stay within 75 characters. > > This series also have an SBC series with the suffix "box". > > > > This board is development board series, not SBC series. > > Remember to also address Sashiko review. Okay. > > Link: ... > > Signed-off-by: ... > > --- > > ... > > + > > Looks like you just added bunch of format-patch and check-patch > warnings... I have re‑run checkpatch on the entire series and fixed all trailing whitespace and other formatting issues. The patch set should now be clean (except for a hardware‑list line in the third patch which I kept intact for readability). Apologies for the oversight – it was late night work. I will send a v2 with all fixes shortly. Best, Coia _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 3/3] arm64: dts: rockchip: Add devicetree for the Graperain G3568 v2 2026-06-27 22:57 ` Coia Prant @ 2026-06-27 22:57 ` Coia Prant -1 siblings, 0 replies; 14+ messages in thread From: Coia Prant @ 2026-06-27 22:57 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Dragan Simic, Jonas Karlman Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel, Coia Prant The Graperain G3568 v2 is an RK3568-based development board, just like the RK3568-EVB. It always uses soldered connections between the GR3568CV2 core board and the RK3568BV2/GR3568BV2 I/O board. The G3568 board has multiple hardware revisions, and we currently support v2 (I/O board). Specification: - SoC: RockChip RK3568 ARM64 (4 cores) - eMMC: 16-128 GB - RAM: 2-16 GB - Power: DC 12V 2A - Ethernet: 2x RTL8211F RGMII (10/100/1000 Mbps) - Wireless radio: 802.11b/g/n/ac dual-band - LED: Power: AlwaysOn User: GPIO - Button: ESC: SARADC/0 <1100k µV> MENU: SARADC/0 <1400k µV> VOL-: SARADC/0 <430k µV> VOL+: SARADC/0 <50k µV> Power/Reset: PMIC RK809 - CAN CAN/1: 4-pin (PH 2.0) - PWM PWM/4: Backlight PWM/5: Backlight PWM/7: IR Receiver - UART: UART/2: Debug TTL - 1500000 8N1 (1.25mm) UART/3: TTL (PH 2.0) UART/4: TTL (PH 2.0) UART/8: AP6356S Bluetooth UART/9: TTL (PH 2.0) - I2C: I2C/0: PMIC RK809 I2C/1: Touchscreen I2C/4: Camera I2C/5: RTC@51 PCF8563 - I2S: I2S/0: HDMI Sound I2S/1: RK809 Audio Codec I2S/3: AP6356S Bluetooth Sound - SDMMC: SDMMC/0: microSD (TF) slot SDMMC/2: AP6356S SDIO WiFi card - Camera: 1x CSI - Video: HDMI / DSI0 (MIPI/LVDS) / DSI1 (MIPI/EDP) - Audio: HDMI / MIC / Speaker / SPDIF / 3.5mm Headphones / AP6356S Bluetooth - USB: USB 2.0 HOST x2 USB 2.0 OTG x1 (shared with USB 3.0 OTG/HOST) USB 3.0 HOST x1 USB 3.0 OTG/HOST x1 - SATA: 1x SATA 3.0 with Power/4-pin - PCIe: 1x PCIe 3.0 x2 (x4 connecter) Link: - https://image.chukouplus.com/upload/C_153/product_file/20211022/6daddec9e400458816dd4c57ba807fc3.pdf - https://blog.gov.cooking/archives/research-graperain-g3568-v2-and-flash.html Signed-off-by: Coia Prant <coiaprant@gmail.com> --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../rockchip/rk3568-graperain-g3568-v2.dts | 894 ++++++++++++++++++ 2 files changed, 895 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index 761d82b4f..6e9d049e8 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -144,6 +144,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-easepi-r1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r66s.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r68s.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-graperain-g3568-v2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-hinlink-h66k.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-hinlink-h68k.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-lubancat-2.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts b/arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts new file mode 100644 index 000000000..221992d6c --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts @@ -0,0 +1,894 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/soc/rockchip,vop2.h> +#include "rk3568.dtsi" + +/ { + model = "Graperain G3568 v2"; + compatible = "graperain,g3568-v2", "rockchip,rk3568"; + + aliases { + ethernet0 = &gmac0; + ethernet1 = &gmac1; + mmc0 = &sdhci; + mmc1 = &sdmmc0; + mmc2 = &sdmmc2; + rtc0 = &rtc0; + }; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <100>; + + button-esc { + label = "esc"; + linux,code = <KEY_ESC>; + press-threshold-microvolt = <1250000>; + }; + + button-menu { + label = "menu"; + linux,code = <KEY_MENU>; + press-threshold-microvolt = <1600000>; + }; + + button-vol-down { + label = "volume down"; + linux,code = <KEY_VOLUMEDOWN>; + press-threshold-microvolt = <600000>; + }; + + button-vol-up { + label = "volume up"; + linux,code = <KEY_VOLUMEUP>; + press-threshold-microvolt = <100000>; + }; + }; + + hdmi-con { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_work: led-0 { + gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; + function = LED_FUNCTION_HEARTBEAT; + color = <LED_COLOR_ID_BLUE>; + linux,default-trigger = "heartbeat"; + pinctrl-names = "default"; + pinctrl-0 = <&led_work_en>; + }; + }; + + rk809-sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,name = "Analog RK809"; + simple-audio-card,mclk-fs = <256>; + + simple-audio-card,cpu { + sound-dai = <&i2s1_8ch>; + }; + simple-audio-card,codec { + sound-dai = <&rk809>; + }; + }; + + pdm_codec: pdm-codec { + compatible = "dmic-codec"; + num-channels = <2>; + #sound-dai-cells = <0>; + }; + + pdm_sound: pdm-sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "microphone"; + + simple-audio-card,cpu { + sound-dai = <&pdm>; + }; + + simple-audio-card,codec { + sound-dai = <&pdm_codec>; + }; + }; + + spdif_dit: spdif-dit { + compatible = "linux,spdif-dit"; + #sound-dai-cells = <0>; + }; + + spdif_sound: spdif-sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "SPDIF"; + + simple-audio-card,cpu { + sound-dai = <&spdif>; + }; + simple-audio-card,codec { + sound-dai = <&spdif_dit>; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk809 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable>; + post-power-on-delay-ms = <100>; + power-off-delay-us = <300>; + reset-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; + }; + + dc_12v: regulator-dc-12v { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + pcie30_avdd0v9: regulator-pcie30-avdd0v9 { + compatible = "regulator-fixed"; + regulator-name = "pcie30_avdd0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + vin-supply = <&vcc3v3_sys>; + }; + + pcie30_avdd1v8: regulator-pcie30-avdd1v8 { + compatible = "regulator-fixed"; + regulator-name = "pcie30_avdd1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc3v3_sys>; + }; + + vcc3v3_sys: regulator-vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_12v>; + }; + + vcc3v3_pcie: regulator-vcc3v3-pcie { + compatible = "regulator-fixed"; + enable-active-high; + gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc3v3_pcie_en_pin>; + regulator-name = "vcc3v3_pcie"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <5000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_sys: regulator-vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_usb: regulator-vcc5v0-usb { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_usb_host: regulator-vcc5v0-usb-host { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_usb_host_en>; + regulator-name = "vcc5v0_usb_host"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_usb>; + }; + + vcc5v0_usb_otg: regulator-vcc5v0-usb-otg { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_usb_otg_en>; + regulator-name = "vcc5v0_usb_otg"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_usb>; + }; +}; + +&can1 { + assigned-clocks = <&cru CLK_CAN1>; + assigned-clock-rates = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&can1m1_pins>; + status = "okay"; +}; + +/* used for usb_host0_xhci */ +&combphy0 { + status = "okay"; +}; + +/* used for usb_host1_xhci */ +&combphy1 { + status = "okay"; +}; + +/* connected to sata2 */ +&combphy2 { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply = <&vdd_cpu>; +}; + +&gmac0 { + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>; + assigned-clock-rates = <0>, <125000000>; + clock_in_out = "output"; + pinctrl-names = "default"; + pinctrl-0 = <&gmac0_miim + &gmac0_tx_bus2 + &gmac0_rx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus>; + phy-handle = <&rgmii_phy0>; + phy-mode = "rgmii-id"; + status = "okay"; +}; + +&gmac1 { + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; + assigned-clock-rates = <0>, <125000000>; + clock_in_out = "output"; + pinctrl-names = "default"; + pinctrl-0 = <&gmac1m1_miim + &gmac1m1_tx_bus2 + &gmac1m1_rx_bus2 + &gmac1m1_rgmii_clk + &gmac1m1_rgmii_bus>; + phy-handle = <&rgmii_phy1>; + phy-mode = "rgmii-id"; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&hdmi { + avdd-0v9-supply = <&vdda0v9_image>; + avdd-1v8-supply = <&vcca1v8_image>; + status = "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&hdmi_sound { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + vdd_cpu: regulator@1c { + compatible = "tcs,tcs4525"; + reg = <0x1c>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1150000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; + assigned-clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; + #clock-cells = <1>; + clock-names = "mclk"; + clocks = <&cru I2S1_MCLKOUT_TX>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>; + system-power-controller; + #sound-dai-cells = <0>; + vcc1-supply = <&vcc3v3_sys>; + vcc2-supply = <&vcc3v3_sys>; + vcc3-supply = <&vcc3v3_sys>; + vcc4-supply = <&vcc3v3_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc3v3_sys>; + wakeup-source; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name = "vdd_gpu"; + regulator-always-on; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-name = "vdd_npu"; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-name = "vdda0v9_image"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name = "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name = "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name = "vccio_acodec"; + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name = "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-name = "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-name = "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-name = "vcca1v8_image"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-name = "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-name = "vcc3v3_sd"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + + codec { + rockchip,mic-in-differential; + }; + }; +}; + +&i2c5 { + status = "okay"; + + rtc0: rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + #clock-cells = <0>; + }; +}; + +&i2s0_8ch { + status = "okay"; +}; + +&i2s1_8ch { + pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>; + rockchip,trcm-sync-tx-only; + status = "okay"; +}; + +/* used for AP6356S Bluetooth Sound */ +&i2s3_2ch { + status = "okay"; +}; + +&mdio0 { + rgmii_phy0: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + reset-assert-us = <20000>; + reset-deassert-us = <100000>; + reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@1 { + reg = <1>; + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + + led@2 { + reg = <2>; + color = <LED_COLOR_ID_AMBER>; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; + }; +}; + +&mdio1 { + rgmii_phy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + reset-assert-us = <20000>; + reset-deassert-us = <100000>; + reset-gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@1 { + reg = <1>; + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + + led@2 { + reg = <2>; + color = <LED_COLOR_ID_AMBER>; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; + }; +}; + +&pcie30phy { + status = "okay"; +}; + +&pcie3x2 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_reset_pin>; + reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_pcie>; + status = "okay"; +}; + +&pdm { + status = "okay"; +}; + +&pinctrl { + leds { + led_work_en: led_work_en { + rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int: pmic_int { + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdio-pwrseq { + wifi_enable: wifi-enable { + rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + vcc5v0_usb_host_en: vcc5v0_usb_host_en { + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcie { + pcie_reset_pin: pcie-reset-pin { + rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + vcc3v3_pcie_en_pin: vcc3v3-pcie-en-pin { + rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pmu_io_domains { + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio2-supply = <&vcc_1v8>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc_1v8>; + vccio7-supply = <&vcc_3v3>; + status = "okay"; +}; + +&pwm4 { + status = "okay"; +}; + +&pwm5 { + status = "okay"; +}; + +/* Required remotectl for IR receiver */ +&pwm7 { + status = "disabled"; +}; + +&saradc { + vref-supply = <&vcca_1v8>; + status = "okay"; +}; + +&sata2 { + status = "okay"; +}; + +/* used for eMMC */ +&sdhci { + bus-width = <8>; + max-frequency = <200000000>; + mmc-hs200-1_8v; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; + status = "okay"; +}; + +/* used for microSD (TF) Slot */ +&sdmmc0 { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + disable-wp; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_sd>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +/* used for AP6356S WiFi */ +&sdmmc2 { + bus-width = <4>; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_sys>; + vqmmc-supply = <&vcc_1v8>; + status = "okay"; +}; + +&spdif { + status = "okay"; +}; + +&tsadc { + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <0>; + status = "okay"; +}; + +/* used for Debug */ +&uart2 { + status = "okay"; +}; + +&uart3 { + pinctrl-0 = <&uart3m1_xfer>; + status = "okay"; +}; + +&uart4 { + pinctrl-0 = <&uart4m1_xfer>; + status = "okay"; +}; + +/* used for WiFi/BT AP6356S */ +&uart8 { + pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>; + status = "okay"; +}; + +&uart9 { + pinctrl-0 = <&uart9m1_xfer>; + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host0_xhci { + extcon = <&usb2phy0>; + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usb_host1_xhci { + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&usb2phy0_host { + phy-supply = <&vcc5v0_usb_host>; + status = "okay"; +}; + +&usb2phy0_otg { + phy-supply = <&vcc5v0_usb_otg>; + status = "okay"; +}; + +&usb2phy1 { + status = "okay"; +}; + +&usb2phy1_host { + phy-supply = <&vcc5v0_usb_host>; + status = "okay"; +}; + +&usb2phy1_otg { + phy-supply = <&vcc5v0_usb_host>; + status = "okay"; +}; + +&vop { + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = <ROCKCHIP_VOP2_EP_HDMI0>; + remote-endpoint = <&hdmi_in_vp0>; + }; +}; -- 2.47.3 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 3/3] arm64: dts: rockchip: Add devicetree for the Graperain G3568 v2 @ 2026-06-27 22:57 ` Coia Prant 0 siblings, 0 replies; 14+ messages in thread From: Coia Prant @ 2026-06-27 22:57 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Dragan Simic, Jonas Karlman Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel, Coia Prant The Graperain G3568 v2 is an RK3568-based development board, just like the RK3568-EVB. It always uses soldered connections between the GR3568CV2 core board and the RK3568BV2/GR3568BV2 I/O board. The G3568 board has multiple hardware revisions, and we currently support v2 (I/O board). Specification: - SoC: RockChip RK3568 ARM64 (4 cores) - eMMC: 16-128 GB - RAM: 2-16 GB - Power: DC 12V 2A - Ethernet: 2x RTL8211F RGMII (10/100/1000 Mbps) - Wireless radio: 802.11b/g/n/ac dual-band - LED: Power: AlwaysOn User: GPIO - Button: ESC: SARADC/0 <1100k µV> MENU: SARADC/0 <1400k µV> VOL-: SARADC/0 <430k µV> VOL+: SARADC/0 <50k µV> Power/Reset: PMIC RK809 - CAN CAN/1: 4-pin (PH 2.0) - PWM PWM/4: Backlight PWM/5: Backlight PWM/7: IR Receiver - UART: UART/2: Debug TTL - 1500000 8N1 (1.25mm) UART/3: TTL (PH 2.0) UART/4: TTL (PH 2.0) UART/8: AP6356S Bluetooth UART/9: TTL (PH 2.0) - I2C: I2C/0: PMIC RK809 I2C/1: Touchscreen I2C/4: Camera I2C/5: RTC@51 PCF8563 - I2S: I2S/0: HDMI Sound I2S/1: RK809 Audio Codec I2S/3: AP6356S Bluetooth Sound - SDMMC: SDMMC/0: microSD (TF) slot SDMMC/2: AP6356S SDIO WiFi card - Camera: 1x CSI - Video: HDMI / DSI0 (MIPI/LVDS) / DSI1 (MIPI/EDP) - Audio: HDMI / MIC / Speaker / SPDIF / 3.5mm Headphones / AP6356S Bluetooth - USB: USB 2.0 HOST x2 USB 2.0 OTG x1 (shared with USB 3.0 OTG/HOST) USB 3.0 HOST x1 USB 3.0 OTG/HOST x1 - SATA: 1x SATA 3.0 with Power/4-pin - PCIe: 1x PCIe 3.0 x2 (x4 connecter) Link: - https://image.chukouplus.com/upload/C_153/product_file/20211022/6daddec9e400458816dd4c57ba807fc3.pdf - https://blog.gov.cooking/archives/research-graperain-g3568-v2-and-flash.html Signed-off-by: Coia Prant <coiaprant@gmail.com> --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../rockchip/rk3568-graperain-g3568-v2.dts | 894 ++++++++++++++++++ 2 files changed, 895 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index 761d82b4f..6e9d049e8 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -144,6 +144,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-easepi-r1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r66s.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-fastrhino-r68s.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-graperain-g3568-v2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-hinlink-h66k.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-hinlink-h68k.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-lubancat-2.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts b/arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts new file mode 100644 index 000000000..221992d6c --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts @@ -0,0 +1,894 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/soc/rockchip,vop2.h> +#include "rk3568.dtsi" + +/ { + model = "Graperain G3568 v2"; + compatible = "graperain,g3568-v2", "rockchip,rk3568"; + + aliases { + ethernet0 = &gmac0; + ethernet1 = &gmac1; + mmc0 = &sdhci; + mmc1 = &sdmmc0; + mmc2 = &sdmmc2; + rtc0 = &rtc0; + }; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <100>; + + button-esc { + label = "esc"; + linux,code = <KEY_ESC>; + press-threshold-microvolt = <1250000>; + }; + + button-menu { + label = "menu"; + linux,code = <KEY_MENU>; + press-threshold-microvolt = <1600000>; + }; + + button-vol-down { + label = "volume down"; + linux,code = <KEY_VOLUMEDOWN>; + press-threshold-microvolt = <600000>; + }; + + button-vol-up { + label = "volume up"; + linux,code = <KEY_VOLUMEUP>; + press-threshold-microvolt = <100000>; + }; + }; + + hdmi-con { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_work: led-0 { + gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; + function = LED_FUNCTION_HEARTBEAT; + color = <LED_COLOR_ID_BLUE>; + linux,default-trigger = "heartbeat"; + pinctrl-names = "default"; + pinctrl-0 = <&led_work_en>; + }; + }; + + rk809-sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,name = "Analog RK809"; + simple-audio-card,mclk-fs = <256>; + + simple-audio-card,cpu { + sound-dai = <&i2s1_8ch>; + }; + simple-audio-card,codec { + sound-dai = <&rk809>; + }; + }; + + pdm_codec: pdm-codec { + compatible = "dmic-codec"; + num-channels = <2>; + #sound-dai-cells = <0>; + }; + + pdm_sound: pdm-sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "microphone"; + + simple-audio-card,cpu { + sound-dai = <&pdm>; + }; + + simple-audio-card,codec { + sound-dai = <&pdm_codec>; + }; + }; + + spdif_dit: spdif-dit { + compatible = "linux,spdif-dit"; + #sound-dai-cells = <0>; + }; + + spdif_sound: spdif-sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "SPDIF"; + + simple-audio-card,cpu { + sound-dai = <&spdif>; + }; + simple-audio-card,codec { + sound-dai = <&spdif_dit>; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk809 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable>; + post-power-on-delay-ms = <100>; + power-off-delay-us = <300>; + reset-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; + }; + + dc_12v: regulator-dc-12v { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + pcie30_avdd0v9: regulator-pcie30-avdd0v9 { + compatible = "regulator-fixed"; + regulator-name = "pcie30_avdd0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + vin-supply = <&vcc3v3_sys>; + }; + + pcie30_avdd1v8: regulator-pcie30-avdd1v8 { + compatible = "regulator-fixed"; + regulator-name = "pcie30_avdd1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc3v3_sys>; + }; + + vcc3v3_sys: regulator-vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_12v>; + }; + + vcc3v3_pcie: regulator-vcc3v3-pcie { + compatible = "regulator-fixed"; + enable-active-high; + gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc3v3_pcie_en_pin>; + regulator-name = "vcc3v3_pcie"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <5000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_sys: regulator-vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_usb: regulator-vcc5v0-usb { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_usb_host: regulator-vcc5v0-usb-host { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_usb_host_en>; + regulator-name = "vcc5v0_usb_host"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_usb>; + }; + + vcc5v0_usb_otg: regulator-vcc5v0-usb-otg { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_usb_otg_en>; + regulator-name = "vcc5v0_usb_otg"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_usb>; + }; +}; + +&can1 { + assigned-clocks = <&cru CLK_CAN1>; + assigned-clock-rates = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&can1m1_pins>; + status = "okay"; +}; + +/* used for usb_host0_xhci */ +&combphy0 { + status = "okay"; +}; + +/* used for usb_host1_xhci */ +&combphy1 { + status = "okay"; +}; + +/* connected to sata2 */ +&combphy2 { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply = <&vdd_cpu>; +}; + +&gmac0 { + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>; + assigned-clock-rates = <0>, <125000000>; + clock_in_out = "output"; + pinctrl-names = "default"; + pinctrl-0 = <&gmac0_miim + &gmac0_tx_bus2 + &gmac0_rx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus>; + phy-handle = <&rgmii_phy0>; + phy-mode = "rgmii-id"; + status = "okay"; +}; + +&gmac1 { + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; + assigned-clock-rates = <0>, <125000000>; + clock_in_out = "output"; + pinctrl-names = "default"; + pinctrl-0 = <&gmac1m1_miim + &gmac1m1_tx_bus2 + &gmac1m1_rx_bus2 + &gmac1m1_rgmii_clk + &gmac1m1_rgmii_bus>; + phy-handle = <&rgmii_phy1>; + phy-mode = "rgmii-id"; + status = "okay"; +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&hdmi { + avdd-0v9-supply = <&vdda0v9_image>; + avdd-1v8-supply = <&vcca1v8_image>; + status = "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&hdmi_sound { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + vdd_cpu: regulator@1c { + compatible = "tcs,tcs4525"; + reg = <0x1c>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1150000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; + assigned-clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; + #clock-cells = <1>; + clock-names = "mclk"; + clocks = <&cru I2S1_MCLKOUT_TX>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>, <&i2s1m0_mclk>; + system-power-controller; + #sound-dai-cells = <0>; + vcc1-supply = <&vcc3v3_sys>; + vcc2-supply = <&vcc3v3_sys>; + vcc3-supply = <&vcc3v3_sys>; + vcc4-supply = <&vcc3v3_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc3v3_sys>; + wakeup-source; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name = "vdd_gpu"; + regulator-always-on; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-name = "vdd_npu"; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-name = "vdda0v9_image"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name = "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name = "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name = "vccio_acodec"; + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name = "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-name = "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-name = "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-name = "vcca1v8_image"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-name = "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-name = "vcc3v3_sd"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + + codec { + rockchip,mic-in-differential; + }; + }; +}; + +&i2c5 { + status = "okay"; + + rtc0: rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + #clock-cells = <0>; + }; +}; + +&i2s0_8ch { + status = "okay"; +}; + +&i2s1_8ch { + pinctrl-0 = <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>; + rockchip,trcm-sync-tx-only; + status = "okay"; +}; + +/* used for AP6356S Bluetooth Sound */ +&i2s3_2ch { + status = "okay"; +}; + +&mdio0 { + rgmii_phy0: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + reset-assert-us = <20000>; + reset-deassert-us = <100000>; + reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@1 { + reg = <1>; + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + + led@2 { + reg = <2>; + color = <LED_COLOR_ID_AMBER>; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; + }; +}; + +&mdio1 { + rgmii_phy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + reset-assert-us = <20000>; + reset-deassert-us = <100000>; + reset-gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>; + + leds { + #address-cells = <1>; + #size-cells = <0>; + + led@1 { + reg = <1>; + color = <LED_COLOR_ID_GREEN>; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + + led@2 { + reg = <2>; + color = <LED_COLOR_ID_AMBER>; + function = LED_FUNCTION_LAN; + default-state = "keep"; + }; + }; + }; +}; + +&pcie30phy { + status = "okay"; +}; + +&pcie3x2 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie_reset_pin>; + reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_pcie>; + status = "okay"; +}; + +&pdm { + status = "okay"; +}; + +&pinctrl { + leds { + led_work_en: led_work_en { + rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int: pmic_int { + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdio-pwrseq { + wifi_enable: wifi-enable { + rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + vcc5v0_usb_host_en: vcc5v0_usb_host_en { + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcie { + pcie_reset_pin: pcie-reset-pin { + rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + vcc3v3_pcie_en_pin: vcc3v3-pcie-en-pin { + rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pmu_io_domains { + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio2-supply = <&vcc_1v8>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc_1v8>; + vccio7-supply = <&vcc_3v3>; + status = "okay"; +}; + +&pwm4 { + status = "okay"; +}; + +&pwm5 { + status = "okay"; +}; + +/* Required remotectl for IR receiver */ +&pwm7 { + status = "disabled"; +}; + +&saradc { + vref-supply = <&vcca_1v8>; + status = "okay"; +}; + +&sata2 { + status = "okay"; +}; + +/* used for eMMC */ +&sdhci { + bus-width = <8>; + max-frequency = <200000000>; + mmc-hs200-1_8v; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; + status = "okay"; +}; + +/* used for microSD (TF) Slot */ +&sdmmc0 { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + disable-wp; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_sd>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +/* used for AP6356S WiFi */ +&sdmmc2 { + bus-width = <4>; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_sys>; + vqmmc-supply = <&vcc_1v8>; + status = "okay"; +}; + +&spdif { + status = "okay"; +}; + +&tsadc { + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <0>; + status = "okay"; +}; + +/* used for Debug */ +&uart2 { + status = "okay"; +}; + +&uart3 { + pinctrl-0 = <&uart3m1_xfer>; + status = "okay"; +}; + +&uart4 { + pinctrl-0 = <&uart4m1_xfer>; + status = "okay"; +}; + +/* used for WiFi/BT AP6356S */ +&uart8 { + pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>; + status = "okay"; +}; + +&uart9 { + pinctrl-0 = <&uart9m1_xfer>; + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host0_xhci { + extcon = <&usb2phy0>; + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usb_host1_xhci { + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&usb2phy0_host { + phy-supply = <&vcc5v0_usb_host>; + status = "okay"; +}; + +&usb2phy0_otg { + phy-supply = <&vcc5v0_usb_otg>; + status = "okay"; +}; + +&usb2phy1 { + status = "okay"; +}; + +&usb2phy1_host { + phy-supply = <&vcc5v0_usb_host>; + status = "okay"; +}; + +&usb2phy1_otg { + phy-supply = <&vcc5v0_usb_host>; + status = "okay"; +}; + +&vop { + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = <ROCKCHIP_VOP2_EP_HDMI0>; + remote-endpoint = <&hdmi_in_vp0>; + }; +}; -- 2.47.3 _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 3/3] arm64: dts: rockchip: Add devicetree for the Graperain G3568 v2 2026-06-27 22:57 ` Coia Prant (?) @ 2026-06-27 23:08 ` sashiko-bot 2026-06-29 8:48 ` Coia Prant -1 siblings, 1 reply; 14+ messages in thread From: sashiko-bot @ 2026-06-27 23:08 UTC (permalink / raw) To: Coia Prant; +Cc: robh, conor+dt, devicetree Thank you for your contribution! Sashiko AI review found 4 potential issue(s) to consider: - [Medium] Incorrect `press-threshold-microvolt` values in `adc-keys` use boundary midpoints instead of nominal voltages, causing the MENU button to misregister as ESC. - [Medium] The WiFi SDIO interface specifies `keep-power-in-suspend`, but its I/O voltage supply (`vcc_1v8`) is configured to turn off in suspend, breaking Wake-on-WLAN. - [Medium] The AP6356S Bluetooth UART is missing hardware flow control properties and the required Bluetooth child node. - [Low] The deprecated `gpio` property is used instead of `gpios` in fixed regulator nodes. -- commit 13181564cb78799e1d57eb0995588d8e839f22a5 Author: Coia Prant <coiaprant@gmail.com> arm64: dts: rockchip: Add devicetree for the Graperain G3568 v2 This patch introduces the device tree for the Graperain G3568 v2, an RK3568 based development board. It configures the hardware peripherals including ethernet, storage, wireless, and power regulators. Link: https://image.chukouplus.com/upload/C_153/product_file/20211022/6daddec9e400458816dd4c57ba807fc3.pdf Link: https://blog.gov.cooking/archives/research-graperain-g3568-v2-and-flash.html > diff --git a/arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts b/arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts > new file mode 100644 > index 0000000000000..221992d6c6003 > --- /dev/null > +++ b/arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts > @@ -0,0 +1,894 @@ [ ... ] > + adc-keys { > + compatible = "adc-keys"; > + io-channels = <&saradc 0>; > + io-channel-names = "buttons"; > + keyup-threshold-microvolt = <1800000>; > + poll-interval = <100>; > + > + button-esc { > + label = "esc"; > + linux,code = <KEY_ESC>; > + press-threshold-microvolt = <1250000>; > + }; > + > + button-menu { > + label = "menu"; > + linux,code = <KEY_MENU>; > + press-threshold-microvolt = <1600000>; [Severity: Medium] Will this cause the menu button to misregister as esc? The adc-keys driver uses a nearest-neighbor algorithm to match the ADC reading to the button. Since the commit message indicates the nominal voltages are 1.1V for ESC and 1.4V for MENU, an ADC reading of 1.4V from pressing MENU is closer to the ESC threshold of 1.25V (0.15V difference) than the MENU threshold of 1.6V (0.2V difference). Could we use the exact expected nominal voltages here instead of the boundary midpoints? [ ... ] > + vcc5v0_usb_host: regulator-vcc5v0-usb-host { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; [Severity: Low] Is this using the deprecated gpio property? The standard regulator-fixed binding expects gpios instead of gpio, which can cause device tree schema validation warnings. > + pinctrl-names = "default"; > + pinctrl-0 = <&vcc5v0_usb_host_en>; > + regulator-name = "vcc5v0_usb_host"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <&vcc5v0_usb>; > + }; > + > + vcc5v0_usb_otg: regulator-vcc5v0-usb-otg { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; [Severity: Low] Would it be better to use the gpios property here as well to match the regulator-fixed device tree binding schema? [ ... ] > +/* used for AP6356S WiFi */ > +&sdmmc2 { > + bus-width = <4>; > + cap-sd-highspeed; > + cap-sdio-irq; > + keep-power-in-suspend; > + mmc-pwrseq = <&sdio_pwrseq>; > + non-removable; > + pinctrl-names = "default"; > + pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>; > + sd-uhs-sdr104; > + vmmc-supply = <&vcc3v3_sys>; > + vqmmc-supply = <&vcc_1v8>; [Severity: Medium] Will this configuration break Wake-on-WLAN and SDIO communication on resume? This node specifies keep-power-in-suspend, but the vqmmc-supply is set to vcc_1v8. Looking at the vcc_1v8 regulator definition (DCDC_REG5) earlier in the file, it is configured with regulator-off-in-suspend. Cutting power to the SDIO I/O domain during suspend violates the power sequencing for keep-power-in-suspend and prevents out-of-band wake interrupts from signaling the host. [ ... ] > +/* used for WiFi/BT AP6356S */ > +&uart8 { > + pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>; > + status = "okay"; > +}; [Severity: Medium] Does this Bluetooth UART configuration need hardware flow control and a device child node? High-speed Bluetooth modules like the AP6356S generally rely on RTS/CTS to prevent buffer overflows, but the uart-has-rtscts property and the uart8m0_rtsn pin configuration are missing here. Additionally, without a bluetooth child node (such as compatible = "brcm,bcm4345c5"), the kernel's HCI UART driver might not be able to probe and initialize the module automatically. [ ... ] -- Sashiko AI review · https://sashiko.dev/#/patchset/20260627225755.1710837-2-coiaprant@gmail.com?part=3 ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 3/3] arm64: dts: rockchip: Add devicetree for the Graperain G3568 v2 2026-06-27 23:08 ` sashiko-bot @ 2026-06-29 8:48 ` Coia Prant 0 siblings, 0 replies; 14+ messages in thread From: Coia Prant @ 2026-06-29 8:48 UTC (permalink / raw) To: sashiko-reviews; +Cc: robh, conor+dt, devicetree <sashiko-bot@kernel.org> 于2026年6月28日周日 07:08写道： > > Thank you for your contribution! Sashiko AI review found 4 potential issue(s) to consider: > - [Medium] Incorrect `press-threshold-microvolt` values in `adc-keys` use boundary midpoints instead of nominal voltages, causing the MENU button to misregister as ESC. > - [Medium] The WiFi SDIO interface specifies `keep-power-in-suspend`, but its I/O voltage supply (`vcc_1v8`) is configured to turn off in suspend, breaking Wake-on-WLAN. > - [Medium] The AP6356S Bluetooth UART is missing hardware flow control properties and the required Bluetooth child node. > - [Low] The deprecated `gpio` property is used instead of `gpios` in fixed regulator nodes. > -- > > commit 13181564cb78799e1d57eb0995588d8e839f22a5 > Author: Coia Prant <coiaprant@gmail.com> > arm64: dts: rockchip: Add devicetree for the Graperain G3568 v2 > > This patch introduces the device tree for the Graperain G3568 v2, an RK3568 > based development board. It configures the hardware peripherals including > ethernet, storage, wireless, and power regulators. > > Link: https://image.chukouplus.com/upload/C_153/product_file/20211022/6daddec9e400458816dd4c57ba807fc3.pdf > Link: https://blog.gov.cooking/archives/research-graperain-g3568-v2-and-flash.html > > > diff --git a/arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts b/arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts > > new file mode 100644 > > index 0000000000000..221992d6c6003 > > --- /dev/null > > +++ b/arch/arm64/boot/dts/rockchip/rk3568-graperain-g3568-v2.dts > > @@ -0,0 +1,894 @@ > > [ ... ] > > > + adc-keys { > > + compatible = "adc-keys"; > > + io-channels = <&saradc 0>; > > + io-channel-names = "buttons"; > > + keyup-threshold-microvolt = <1800000>; > > + poll-interval = <100>; > > + > > + button-esc { > > + label = "esc"; > > + linux,code = <KEY_ESC>; > > + press-threshold-microvolt = <1250000>; > > + }; > > + > > + button-menu { > > + label = "menu"; > > + linux,code = <KEY_MENU>; > > + press-threshold-microvolt = <1600000>; > > [Severity: Medium] > Will this cause the menu button to misregister as esc? > > The adc-keys driver uses a nearest-neighbor algorithm to match the ADC > reading to the button. Since the commit message indicates the nominal > voltages are 1.1V for ESC and 1.4V for MENU, an ADC reading of 1.4V from > pressing MENU is closer to the ESC threshold of 1.25V (0.15V difference) > than the MENU threshold of 1.6V (0.2V difference). > > Could we use the exact expected nominal voltages here instead of the > boundary midpoints? > > [ ... ] > > > + vcc5v0_usb_host: regulator-vcc5v0-usb-host { > > + compatible = "regulator-fixed"; > > + enable-active-high; > > + gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; > > [Severity: Low] > Is this using the deprecated gpio property? > > The standard regulator-fixed binding expects gpios instead of gpio, which > can cause device tree schema validation warnings. > > > + pinctrl-names = "default"; > > + pinctrl-0 = <&vcc5v0_usb_host_en>; > > + regulator-name = "vcc5v0_usb_host"; > > + regulator-min-microvolt = <5000000>; > > + regulator-max-microvolt = <5000000>; > > + vin-supply = <&vcc5v0_usb>; > > + }; > > + > > + vcc5v0_usb_otg: regulator-vcc5v0-usb-otg { > > + compatible = "regulator-fixed"; > > + enable-active-high; > > + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; > > [Severity: Low] > Would it be better to use the gpios property here as well to match the > regulator-fixed device tree binding schema? > > [ ... ] > > > +/* used for AP6356S WiFi */ > > +&sdmmc2 { > > + bus-width = <4>; > > + cap-sd-highspeed; > > + cap-sdio-irq; > > + keep-power-in-suspend; > > + mmc-pwrseq = <&sdio_pwrseq>; > > + non-removable; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>; > > + sd-uhs-sdr104; > > + vmmc-supply = <&vcc3v3_sys>; > > + vqmmc-supply = <&vcc_1v8>; > > [Severity: Medium] > Will this configuration break Wake-on-WLAN and SDIO communication on resume? > > This node specifies keep-power-in-suspend, but the vqmmc-supply is set to > vcc_1v8. Looking at the vcc_1v8 regulator definition (DCDC_REG5) earlier in > the file, it is configured with regulator-off-in-suspend. > > Cutting power to the SDIO I/O domain during suspend violates the power > sequencing for keep-power-in-suspend and prevents out-of-band wake interrupts > from signaling the host. > > [ ... ] > > > +/* used for WiFi/BT AP6356S */ > > +&uart8 { > > + pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>; > > + status = "okay"; > > +}; > > [Severity: Medium] > Does this Bluetooth UART configuration need hardware flow control and a > device child node? > > High-speed Bluetooth modules like the AP6356S generally rely on RTS/CTS to > prevent buffer overflows, but the uart-has-rtscts property and the > uart8m0_rtsn pin configuration are missing here. > > Additionally, without a bluetooth child node (such as compatible = > "brcm,bcm4345c5"), the kernel's HCI UART driver might not be able to probe > and initialize the module automatically. > > [ ... ] > > -- > Sashiko AI review · https://sashiko.dev/#/patchset/20260627225755.1710837-2-coiaprant@gmail.com?part=3 Thanks for the thorough review. Here are my responses to the issues raised: 1. ADC Keys threshold (Medium) The current threshold values (1.25V for ESC and 1.6V for MENU) are intentionally set to midpoints, as the adc-keys driver uses a nearest-neighbor algorithm to match ADC readings. These midpoints provide the largest decision margin and minimize the risk of mis‑detection. I have verified the functionality with evtest, and the buttons are correctly recognized. Therefore, I will keep this configuration unchanged. 2. GPIO property in fixed regulators (Low) This is correct that gpios is the preferred property now, and gpio is deprecated. Since this board and the X3568 v4 share almost identical hardware, I plan to address this for both boards in a separate, follow‑up patch series to ensure consistency. 3. SDIO vqmmc-supply and regulator-off-in-suspend (Medium) This is a valid concern. The configuration conflict between keep-power-in-suspend and regulator-off-in-suspend is indeed problematic. However, this same pattern appears in many existing RK3568 board files and appears to be a historical mistake that has been copied across multiple devices. I believe this should be fixed systematically at the platform level rather than on a per‑board basis. Should we submit a separate patch series to clean up this issue for all RK3568? 4. Bluetooth UART flow control and child node (Medium) Agreed that hardware flow control (uart-has-rtscts) and a Bluetooth child node are required for proper operation. Since this is a common requirement for similar board (X3568 v4), I will address this in a separate follow‑up patch series to improve consistency across the platform. If there are no more questions, I will submit PATCH v2. Thanks. Best, Coia ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] dt-bindings: vendor-prefixes: Add graperain 2026-06-27 22:57 ` Coia Prant @ 2026-06-29 7:11 ` Krzysztof Kozlowski -1 siblings, 0 replies; 14+ messages in thread From: Krzysztof Kozlowski @ 2026-06-29 7:11 UTC (permalink / raw) To: Coia Prant Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Dragan Simic, Jonas Karlman, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel On Sun, Jun 28, 2026 at 06:57:54AM +0800, Coia Prant wrote: > Add graperain to the vendor prefixes. > > Link: https://www.graperain.cn/ (China) > Link: https://www.graperain.com/ (Global) > > Signed-off-by: Coia Prant <coiaprant@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Best regards, Krzysztof ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] dt-bindings: vendor-prefixes: Add graperain @ 2026-06-29 7:11 ` Krzysztof Kozlowski 0 siblings, 0 replies; 14+ messages in thread From: Krzysztof Kozlowski @ 2026-06-29 7:11 UTC (permalink / raw) To: Coia Prant Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner, Dragan Simic, Jonas Karlman, devicetree, linux-arm-kernel, linux-rockchip, linux-kernel On Sun, Jun 28, 2026 at 06:57:54AM +0800, Coia Prant wrote: > Add graperain to the vendor prefixes. > > Link: https://www.graperain.cn/ (China) > Link: https://www.graperain.com/ (Global) > > Signed-off-by: Coia Prant <coiaprant@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Best regards, Krzysztof _______________________________________________ Linux-rockchip mailing list Linux-rockchip@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-rockchip ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2026-06-29 8:48 UTC | newest] Thread overview: 14+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2026-06-27 22:57 [PATCH 1/3] dt-bindings: vendor-prefixes: Add graperain Coia Prant 2026-06-27 22:57 ` Coia Prant 2026-06-27 22:57 ` [PATCH 2/3] dt-bindings: arm: rockchip: Add Graperain G3568 series Coia Prant 2026-06-27 22:57 ` Coia Prant 2026-06-29 7:12 ` Krzysztof Kozlowski 2026-06-29 7:12 ` Krzysztof Kozlowski 2026-06-29 8:29 ` Coia Prant 2026-06-29 8:29 ` Coia Prant 2026-06-27 22:57 ` [PATCH 3/3] arm64: dts: rockchip: Add devicetree for the Graperain G3568 v2 Coia Prant 2026-06-27 22:57 ` Coia Prant 2026-06-27 23:08 ` sashiko-bot 2026-06-29 8:48 ` Coia Prant 2026-06-29 7:11 ` [PATCH 1/3] dt-bindings: vendor-prefixes: Add graperain Krzysztof Kozlowski 2026-06-29 7:11 ` Krzysztof Kozlowski
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