Re: [PATCH v2 1/3] perf/dwc_pcie: Add support for Picoheart vendor devices

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The new Picoheart entry in `dwc_pcie_rasdes_vsec_ids` breaks alphabetical sorting.
--

commit 86c4e43dc00cd979fb3b5c10fa079d5650a94f54
Author: Yicong Yang <yang.yicong@picoheart.com>

perf/dwc_pcie: Add support for Picoheart vendor devices

This commit adds PCI_VENDOR_ID_PICOHEART to pci_ids.h and updates the
DWC PCIe vendor table to enable PCIe PMU support for Picoheart devices.

> diff --git a/include/linux/pcie-dwc.h b/include/linux/pcie-dwc.h
> index 8ff778e7aec0e..b0ccb2ad74db7 100644
> --- a/include/linux/pcie-dwc.h
> +++ b/include/linux/pcie-dwc.h

[ ... ]

> @@ -32,6 +32,8 @@ static const struct dwc_pcie_vsec_id dwc_pcie_rasdes_vsec_ids[] = {
>  	  .vsec_id = 0x02, .vsec_rev = 0x4 },
>  	{ .vendor_id = PCI_VENDOR_ID_SAMSUNG,
>  	  .vsec_id = 0x02, .vsec_rev = 0x4 },
> +	{ .vendor_id = PCI_VENDOR_ID_PICOHEART,
> +	  .vsec_id = 0x02, .vsec_rev = 0x4 },

[Severity: Low]
This isn't a bug, but should PCI_VENDOR_ID_PICOHEART be placed between
PCI_VENDOR_ID_AMPERE and PCI_VENDOR_ID_QCOM to maintain the alphabetical
sorting of the existing entries in dwc_pcie_rasdes_vsec_ids[]?

>  	{}
>  };
>

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260629092717.74946-1-yang.yicong@picoheart.com?part=1