From: Niklas Cassel <cassel@kernel.org>
To: Yicong Yang <yang.yicong@picoheart.com>
Cc: xueshuai@linux.alibaba.com, renyu.zj@linux.alibaba.com,
will@kernel.org, mark.rutland@arm.com, jic23@kernel.org,
bhelgaas@google.com, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, jingoohan1@gmail.com,
mani@kernel.org, juwenlong@picoheart.com,
geshijian@picoheart.com, douyufan@picoheart.com
Subject: Re: [PATCH v2 1/3] perf/dwc_pcie: Add support for Picoheart vendor devices
Date: Tue, 30 Jun 2026 13:31:29 +0200 [thread overview]
Message-ID: <akOpEaCM0TiZB2zD@ryzen> (raw)
In-Reply-To: <20260629092717.74946-2-yang.yicong@picoheart.com>
On Mon, Jun 29, 2026 at 05:27:15PM +0800, Yicong Yang wrote:
> Add PCI_VENDOR_ID_PICOHEART in pci_ids.h. Update the DWC PCIe
> vendor table with Picoheart PCIe vendorid to enable the PCIe
> PMU support.
>
> Signed-off-by: Yicong Yang <yang.yicong@picoheart.com>
> ---
> include/linux/pci_ids.h | 2 ++
> include/linux/pcie-dwc.h | 2 ++
> 2 files changed, 4 insertions(+)
>
> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
> index 1c9d40e09107..2c17239aacea 100644
> --- a/include/linux/pci_ids.h
> +++ b/include/linux/pci_ids.h
> @@ -2640,6 +2640,8 @@
> #define PCI_VENDOR_ID_SUNIX 0x1fd4
> #define PCI_DEVICE_ID_SUNIX_1999 0x1999
>
> +#define PCI_VENDOR_ID_PICOHEART 0x20fa
> +
> #define PCI_VENDOR_ID_HINT 0x3388
> #define PCI_DEVICE_ID_HINT_VXPROII_IDE 0x8013
>
> diff --git a/include/linux/pcie-dwc.h b/include/linux/pcie-dwc.h
> index 8ff778e7aec0..b0ccb2ad74db 100644
> --- a/include/linux/pcie-dwc.h
> +++ b/include/linux/pcie-dwc.h
> @@ -32,6 +32,8 @@ static const struct dwc_pcie_vsec_id dwc_pcie_rasdes_vsec_ids[] = {
> .vsec_id = 0x02, .vsec_rev = 0x4 },
> { .vendor_id = PCI_VENDOR_ID_SAMSUNG,
> .vsec_id = 0x02, .vsec_rev = 0x4 },
> + { .vendor_id = PCI_VENDOR_ID_PICOHEART,
> + .vsec_id = 0x02, .vsec_rev = 0x4 },
Could you please point to the in-tree device driver for this
DWC based "picoheart" PCIe controller?
$ git grep -i picoheart drivers/pci/controller/dwc/
<nothing>
It feels wrong to add PMU support for a PCIe controller,
if that PCIe controller does not have support in mainline.
Kind regards,
Niklas
next prev parent reply other threads:[~2026-06-30 11:31 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-29 9:27 [PATCH v2 0/3] New vendor support and optimizations for DWC PCIe PMU Yicong Yang
2026-06-29 9:27 ` [PATCH v2 1/3] perf/dwc_pcie: Add support for Picoheart vendor devices Yicong Yang
2026-06-29 9:40 ` sashiko-bot
2026-06-29 17:43 ` Bjorn Helgaas
2026-06-30 3:35 ` Shuai Xue
2026-06-30 17:04 ` Yicong Yang
2026-06-30 11:31 ` Niklas Cassel [this message]
2026-06-30 17:01 ` Yicong Yang
2026-06-30 20:03 ` Niklas Cassel
2026-06-29 9:27 ` [PATCH v2 2/3] perf/dwc_pcie: Support narrowed time-based counter for long time monitoring Yicong Yang
2026-06-29 9:42 ` sashiko-bot
2026-06-30 8:50 ` Shuai Xue
2026-06-30 17:18 ` Yicong Yang
2026-06-29 9:27 ` [PATCH v2 3/3] perf/dwc_pcie: Convert to faux device interface Yicong Yang
2026-06-29 9:40 ` sashiko-bot
2026-06-30 9:19 ` Shuai Xue
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