From: sashiko-bot@kernel.org
To: "Varshini Rajendran" <varshini.rajendran@microchip.com>
Cc: conor+dt@kernel.org, robh@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v3 06/13] nvmem: microchip-otpc: add tag-based packet lookup
Date: Tue, 30 Jun 2026 10:00:40 +0000 [thread overview]
Message-ID: <20260630100041.22FB81F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260630093603.38663-7-varshini.rajendran@microchip.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
New issues:
- [High] Use of `readl_relaxed()` for sequential FIFO stream reads and ASCII tag matching causes data corruption and tag lookup failures on big-endian systems.
Pre-existing issues:
- [High] Concurrent NVMEM reads lack serialization, leading to race conditions on shared OTPC hardware control registers.
--
commit 3ff90071d02f74b840b6a4d51b5716387dc75e88
Author: Varshini Rajendran <varshini.rajendran@microchip.com>
nvmem: microchip-otpc: add tag-based packet lookup
This commit adds support for accessing OTP packets by their 4-byte ASCII
tag while preserving backward compatibility with the existing ID-based
lookup. It caches packet metadata including the tag during probe and
changes the NVMEM memory stride to 1 to support tag-based offsets.
> diff --git a/drivers/nvmem/microchip-otpc.c b/drivers/nvmem/microchip-otpc.c
> index df979e8549fdb..bf8589048e17c 100644
> --- a/drivers/nvmem/microchip-otpc.c
> +++ b/drivers/nvmem/microchip-otpc.c
[ ... ]
> @@ -154,12 +233,11 @@ static int mchp_otpc_read(void *priv, unsigned int off, void *val,
> int ret, payload_size;
>
> /*
[Severity: High]
This is a pre-existing issue, but does mchp_otpc_read() need serialization
to protect against concurrent access?
The NVMEM core does not serialize reg_read callbacks. If two threads
concurrently access the NVMEM device (e.g., via sysfs and a kernel
consumer), they will interleave calls to mchp_otpc_prepare_read().
Because mchp_otpc_prepare_read() mutates the shared MCHP_OTPC_MR and
MCHP_OTPC_CR registers without holding any locks, could this lead to
hardware register corruption and invalid payload data being returned?
> - * We reach this point with off being multiple of stride = 4 to
> - * be able to cross the subsystem. Inside the driver we use continuous
> - * unsigned integer numbers for packet id, thus divide off by 4
> - * before passing it to mchp_otpc_id_to_packet().
> + * From this point the offset has to be translated into the actual
> + * packet. For this we traverse the table of contents stored in a list
> + * "packet" based on the access type - packet id or tag.
> */
> - packet = mchp_otpc_id_to_packet(otpc, off / 4);
> + packet = mchp_otpc_resolve_packet(otpc, off);
[ ... ]
> @@ -190,6 +268,29 @@ static int mchp_otpc_read(void *priv, unsigned int off, void *val,
> return 0;
> }
>
> +/**
> + * mchp_otpc_read_packet_tag() - read tag from packet payload
> + * @otpc: OTPC private data
> + * @offset: packet offset in OTP memory
> + * @val: pointer to store the tag value
> + *
> + * Return: 0 on success, negative errno on failure
> + */
> +static int mchp_otpc_read_packet_tag(struct mchp_otpc *otpc, unsigned int offset,
> + unsigned int *val)
> +{
> + int ret;
> +
> + ret = mchp_otpc_prepare_read(otpc, offset);
> + if (ret)
> + return ret;
> +
> + writel_relaxed(0, otpc->base + MCHP_OTPC_AR);
> + *val = readl_relaxed(otpc->base + MCHP_OTPC_DR);
[Severity: High]
Since readl_relaxed() performs a CPU-dependent byteswap, will this corrupt
the 4-byte ASCII tag on big-endian architectures?
If the tag bytes are swapped, the tag lookup will fail against the
constants provided by the device tree.
This is also a pre-existing issue in the payload stream read loop inside
mchp_otpc_read(). In that loop, readl_relaxed() is used to pull sequential
FIFO stream data, which corrupts payload byte ordering on big-endian
systems.
Should these accessors be changed to use stream accessors to prevent
unwanted byteswapping?
> +
> + return 0;
> +}
> +
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260630093603.38663-1-varshini.rajendran@microchip.com?part=6
next prev parent reply other threads:[~2026-06-30 10:00 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-30 9:35 [PATCH v3 00/13] Add thermal management support for sama7d65 Varshini Rajendran
2026-06-30 9:35 ` [PATCH v3 01/13] dt-bindings: iio: adc: at91-sama5d2: document sama7d65 Varshini Rajendran
2026-06-30 9:35 ` [PATCH v3 02/13] iio: adc: at91-sama5d2_adc: use cleanup.h for NVMEM buffer Varshini Rajendran
2026-06-30 12:12 ` Andy Shevchenko
2026-06-30 23:36 ` Jonathan Cameron
2026-06-30 9:35 ` [PATCH v3 03/13] iio: adc: at91-sama5d2_adc: rework temp calibration layout handling Varshini Rajendran
2026-06-30 12:16 ` Andy Shevchenko
2026-06-30 23:38 ` Jonathan Cameron
2026-06-30 9:35 ` [PATCH v3 04/13] iio: adc: at91-sama5d2_adc: adapt the driver for sama7d65 Varshini Rajendran
2026-06-30 12:18 ` Andy Shevchenko
2026-06-30 23:43 ` Jonathan Cameron
2026-06-30 9:35 ` [PATCH v3 05/13] dt-bindings: nvmem: microchip,sama7g5-otpc: add sama7d65 and dt node example Varshini Rajendran
2026-06-30 9:35 ` [PATCH v3 06/13] nvmem: microchip-otpc: add tag-based packet lookup Varshini Rajendran
2026-06-30 10:00 ` sashiko-bot [this message]
2026-06-30 12:23 ` Andy Shevchenko
2026-06-30 12:26 ` Andy Shevchenko
2026-06-30 23:49 ` Jonathan Cameron
2026-06-30 9:35 ` [PATCH v3 07/13] ARM: dts: microchip: sama7d65: add cpu opps Varshini Rajendran
2026-06-30 9:35 ` [PATCH v3 08/13] ARM: dts: microchip: sama7d65: Add ADC node Varshini Rajendran
2026-06-30 9:35 ` [PATCH v3 09/13] ARM: dts: microchip: sama7d65_curiosity: Enable ADC, DVFS Varshini Rajendran
2026-06-30 9:36 ` [PATCH v3 10/13] ARM: dts: microchip: sama7d65: add otpc node Varshini Rajendran
2026-06-30 9:36 ` [PATCH v3 11/13] ARM: dts: microchip: sama7d65: add cells for temperature calibration Varshini Rajendran
2026-06-30 10:12 ` sashiko-bot
2026-06-30 9:36 ` [PATCH v3 12/13] ARM: dts: microchip: sama7d65: add temperature sensor Varshini Rajendran
2026-06-30 9:36 ` [PATCH v3 13/13] ARM: dts: microchip: sama7d65: add thermal zones node Varshini Rajendran
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260630100041.22FB81F000E9@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=robh@kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
--cc=varshini.rajendran@microchip.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.