[PATCH] drm/amd/display:Check dp_128b_132b_supported_link_rates.raw before link_rate setting

[PATCH] drm/amd/display:Check dp_128b_132b_supported_link_rates.raw before link_rate setting

[Jackie Dong]

[WHY]
In the evolution of displays from DP 1.4 to DP 2.0, due to considerations 
some factors,such as cost, some displays support 128b/132b encoding but 
do not support UHBR rate transmission. The values can be read from DPCD 
register address as below.

0x00006 is 03
0x02215 is 00

For such displays, the current kernel reports the following error message.

[drm:dp_retrieve_lttpr_cap [amdgpu]] *ERROR* retrieve_link_cap: Invalid RX 
128b_132b_supported_link_rates

[HOW]
Add new judgment: if all bits in dp_128b_132b_supported_link_rates.raw 
are non-zero, then further determine the specific UHBR type; otherwise, 
determine that the display does not support UHBR.

Signed-off-by: Jackie Dong <xy-jackie@139.com>
---
 .../gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
index 47abb4066709..58cbb7ac8f9e 100644
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
@@ -2079,7 +2079,8 @@ static bool retrieve_link_cap(struct dc_link *link)
 	if (!dpcd_read_sink_ext_caps(link))
 		link->dpcd_sink_ext_caps.raw = 0;
 
-	if (link->dpcd_caps.channel_coding_cap.bits.DP_128b_132b_SUPPORTED) {
+	if (link->dpcd_caps.channel_coding_cap.bits.DP_128b_132b_SUPPORTED &&
+			link->dpcd_caps.dp_128b_132b_supported_link_rates.raw) {
 		DC_LOG_DP2("128b/132b encoding is supported at link %d", link->link_index);
 
 		/* Read 128b/132b suppoerted link rates */
-- 
2.43.0

Re: [PATCH] drm/amd/display:Check dp_128b_132b_supported_link_rates.raw before link_rate setting

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Checking `dp_128b_132b_supported_link_rates.raw` before it is read from the DPCD register completely disables DP 2.0 UHBR support.
--

commit 11d06153280ec5dae6682a402606818b4f84b79d
Author: Jackie Dong <xy-jackie@139.com>

drm/amd/display:Check dp_128b_132b_supported_link_rates.raw before link_rate setting

This patch modifies the DP 128b/132b capability check to also verify that
dp_128b_132b_supported_link_rates.raw is non-zero before attempting to read
and parse the specific UHBR link rates.

> diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
> --- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
> +++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
> @@ -2079,7 +2079,8 @@ static bool retrieve_link_cap(struct dc_link *link)
>  	if (!dpcd_read_sink_ext_caps(link))
>  		link->dpcd_sink_ext_caps.raw = 0;
>  
> -	if (link->dpcd_caps.channel_coding_cap.bits.DP_128b_132b_SUPPORTED) {
> +	if (link->dpcd_caps.channel_coding_cap.bits.DP_128b_132b_SUPPORTED &&
> +			link->dpcd_caps.dp_128b_132b_supported_link_rates.raw) {

[Severity: High]
Will this change completely disable DP 2.0 UHBR support? 

In retrieve_link_cap() in drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c,
dp_128b_132b_supported_link_rates.raw is now checked before it is actually 
read from the DPCD register. Since the dc_link struct is zero-initialized and
the read hasn't occurred yet, won't this raw value always evaluate to 0 upon
connection of any DP 2.0 monitor? 

This would cause the if condition to always fail, bypassing the actual read
block below and permanently preventing UHBR feature detection.

>  		DC_LOG_DP2("128b/132b encoding is supported at link %d", link->link_index);
>  
>  		/* Read 128b/132b suppoerted link rates */
>  		core_link_read_dpcd(link,
>  				DP_128B132B_SUPPORTED_LINK_RATES,
>  				&link->dpcd_caps.dp_128b_132b_supported_link_rates.raw,

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260630145955.13994-1-xy-jackie@139.com?part=1

Re: [PATCH] drm/amd/display:Check dp_128b_132b_supported_link_rates.raw before link_rate setting

[Jackie Dong]

On Tue, 2026-06-30 at 15:11 +0000, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential
> issue(s) to consider:
> - [High] Checking `dp_128b_132b_supported_link_rates.raw` before it
> is read from the DPCD register completely disables DP 2.0 UHBR
> support.
> --
> 
> commit 11d06153280ec5dae6682a402606818b4f84b79d
> Author: Jackie Dong <xy-jackie@139.com>
> 
> drm/amd/display:Check dp_128b_132b_supported_link_rates.raw before
> link_rate setting
> 
> This patch modifies the DP 128b/132b capability check to also verify
> that
> dp_128b_132b_supported_link_rates.raw is non-zero before attempting
> to read
> and parse the specific UHBR link rates.
> 
> > diff --git
> > a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.
> > c
> > b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.
> > c
> > ---
> > a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.
> > c
> > +++
> > b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.
> > c
> > @@ -2079,7 +2079,8 @@ static bool retrieve_link_cap(struct dc_link
> > *link)
> >  	if (!dpcd_read_sink_ext_caps(link))
> >  		link->dpcd_sink_ext_caps.raw = 0;
> >  
> > -	if (link-
> > >dpcd_caps.channel_coding_cap.bits.DP_128b_132b_SUPPORTED) {
> > +	if (link-
> > >dpcd_caps.channel_coding_cap.bits.DP_128b_132b_SUPPORTED &&
> > +			link-
> > >dpcd_caps.dp_128b_132b_supported_link_rates.raw) {
> 
> [Severity: High]
> Will this change completely disable DP 2.0 UHBR support? 
> 
> In retrieve_link_cap() in
> drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c,
> dp_128b_132b_supported_link_rates.raw is now checked before it is
> actually 
> read from the DPCD register. Since the dc_link struct is zero-
> initialized and
> the read hasn't occurred yet, won't this raw value always evaluate to
> 0 upon
> connection of any DP 2.0 monitor? 
> 
> This would cause the if condition to always fail, bypassing the
> actual read
> block below and permanently preventing UHBR feature detection.
> 
Hi Sashiko,
 I have verified it as below. To add
dp_128b_132b_supported_link_rates.raw  as a new judgment doesn's impact
the value of dp_128b_132b_supported_link_rates.raw. If the monitor can
support UHBR and it can be into feature detection and assigned the
right UHBR rate.

root@yoga-Yoga-Pro-7-15ASH11:/media/yoga/Data/git/linux-502d801f0ab03-
20260622# grep -B23 "Invalid RX 128b_132b_supported_link_rates"
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
 
	//if (link-
>dpcd_caps.channel_coding_cap.bits.DP_128b_132b_SUPPORTED) {
	link->dpcd_caps.dp_128b_132b_supported_link_rates.raw = 0x10;
	pr_info("Jackie %x is SUPPORTED, %x: RX
128b_132b_supported_link_rates.raw\n", link-
>dpcd_caps.channel_coding_cap.bits.DP_128b_132b_SUPPORTED, link-
>dpcd_caps.dp_128b_132b_supported_link_rates.raw) ;
	//pr_info("Jackie  %x: RX
128b_132b_supported_link_rates.raw\n", link-
>dpcd_caps.dp_128b_132b_supported_link_rates.raw) ;
	//pr_info("Jackie RX 128b_132b_supported_link_rates.raw\n") ;
	if ( (link-
>dpcd_caps.channel_coding_cap.bits.DP_128b_132b_SUPPORTED) && (link-
>dpcd_caps.dp_128b_132b_supported_link_rates.raw) ) {
		DC_LOG_DP2("128b/132b encoding is supported at link
%d", link->link_index);
 
		/* Read 128b/132b suppoerted link rates */
		core_link_read_dpcd(link,
				DP_128B132B_SUPPORTED_LINK_RATES,
&link->dpcd_caps.dp_128b_132b_supported_link_rates.raw,
				sizeof(link-
>dpcd_caps.dp_128b_132b_supported_link_rates.raw));
		if (link-
>dpcd_caps.dp_128b_132b_supported_link_rates.bits.UHBR20) {
			pr_info("Jackie RX
128b_132b_supported_link_rates is UHBR20\n") ;
			link->reported_link_cap.link_rate =
LINK_RATE_UHBR20;
		} else if (link-
>dpcd_caps.dp_128b_132b_supported_link_rates.bits.UHBR13_5)
			link->reported_link_cap.link_rate =
LINK_RATE_UHBR13_5;
		else if (link-
>dpcd_caps.dp_128b_132b_supported_link_rates.bits.UHBR10)
			link->reported_link_cap.link_rate =
LINK_RATE_UHBR10;
		else
			//link->reported_link_cap.link_rate =
LINK_RATE_UHBR10;//Jackie Add
			dm_error("%s: Invalid RX
128b_132b_supported_link_rates\n", __func__);
root@yoga-Yoga-Pro-7-15ASH11:/media/yoga/Data/git/linux-502d801f0ab03-
20260622# dmesg |grep -i "fail\|error\|Jackie"
[    0.025954] KHO: Failed to reserve lowmem scratch buffer
[    0.025956] KHO: Failed to reserve scratch area, disabling kexec
handover
[    1.731523] RAS: Correctable Errors collector initialized.
[    7.629667] Jackie 1 is SUPPORTED, 10: RX
128b_132b_supported_link_rates.raw
[    7.630067] [drm:retrieve_link_cap [amdgpu]] *ERROR*
retrieve_link_cap: Invalid RX 128b_132b_supported_link_rates

Above is my verified source code and test result, FYR.

Thanks for your comments.

> >  		DC_LOG_DP2("128b/132b encoding is supported at
> > link %d", link->link_index);
> >  
> >  		/* Read 128b/132b suppoerted link rates */
> >  		core_link_read_dpcd(link,
> >  				DP_128B132B_SUPPORTED_LINK_RATES,
> >  				&link-
> > >dpcd_caps.dp_128b_132b_supported_link_rates.raw,
>