[PATCH v2 0/8] drm/xe: add page size allocation mode control

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* [PATCH v2 0/8] drm/xe: add page size allocation mode control
@ 2026-07-01 16:33 Nareshkumar Gollakoti
  2026-07-01 16:33 ` [PATCH v2 1/8] drm/xe: add page size allocation control state to xe_device Nareshkumar Gollakoti
                   ` (8 more replies)
  0 siblings, 9 replies; 10+ messages in thread
From: Nareshkumar Gollakoti @ 2026-07-01 16:33 UTC (permalink / raw)
  To: intel-xe; +Cc: himal.prasad.ghimiray, Nareshkumar Gollakoti

Some platforms support multiple page sizes for user BO allocations,
including 4K, 64K, 2M, and 1G.

For validation and debug, it is useful to control the page size
selection policy for user BOs so that specific allocation paths can be
exercised deterministically. In particular, this makes it possible to
force allocations into 2M-only, 1G-only, or mixed modes.

In mixed mode, allocations are distributed across the supported page
sizes in a round-robin manner. For example, for eight user BOs, the
selected page sizes would be:
  - BO1, BO5: 4K
  - BO2, BO6: 64K
  - BO3, BO7: 2M
  - BO4, BO8: 1G

This series adds:
 - debug control state in xe_device
 - a platform helper for multi-page-size support
 - a debugfs knob to select allocation mode
 - 1G BO alignment flag handling
 - debug policy application at user BO create time
 - propagation into VMA map flags
 - bind-time alignment validation for large-page user BOs
 - PT bind support for selecting leaf level (4K/64K, 2M, 1G paths)

The intent is to improve debugability of page-size-specific
behavior without impacting normal/default paths
when debug mode is not enabled.

Nareshkumar Gollakoti (8):
  drm/xe: add page size allocation control state to xe_device
  drm/xe: add helper for multi page-size support
  drm/xe/debugfs: add page size allocation mode knob
  drm/xe: add 1G BO page-size alignment flag
  drm/xe: apply debug page-size policy to user BO creation
  drm/xe/vm: apply debug page-size policy to VMA map flags
  drm/xe/vm: validate large-page user BO bind alignment
  drm/xe/pt: allow selecting the bind leaf PTE level

 drivers/gpu/drm/xe/xe_bo.c           | 68 +++++++++++++++++++++++++++-
 drivers/gpu/drm/xe/xe_bo.h           |  1 +
 drivers/gpu/drm/xe/xe_debugfs.c      | 52 +++++++++++++++++++++
 drivers/gpu/drm/xe/xe_device.h       |  5 ++
 drivers/gpu/drm/xe/xe_device_types.h | 20 ++++++++
 drivers/gpu/drm/xe/xe_pt.c           | 16 ++++++-
 drivers/gpu/drm/xe/xe_vm.c           | 57 ++++++++++++++++++++++-
 7 files changed, 215 insertions(+), 4 deletions(-)

-- 
2.43.0


^ permalink raw reply	[flat|nested] 10+ messages in thread

* [PATCH v2 1/8] drm/xe: add page size allocation control state to xe_device
  2026-07-01 16:33 [PATCH v2 0/8] drm/xe: add page size allocation mode control Nareshkumar Gollakoti
@ 2026-07-01 16:33 ` Nareshkumar Gollakoti
  2026-07-01 16:33 ` [PATCH v2 2/8] drm/xe: add helper for multi page-size support Nareshkumar Gollakoti
                   ` (7 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: Nareshkumar Gollakoti @ 2026-07-01 16:33 UTC (permalink / raw)
  To: intel-xe; +Cc: himal.prasad.ghimiray, Nareshkumar Gollakoti

Introduce xe_page_size_alloc_ctrl_mode and add page_size_alloc_ctrl
state to struct xe_device.

The new control supports forcing user BO allocations to 2M pages,
forcing them to 1G pages, or using a mixed round-robin mode across
4K, 64K, 2M, and 1G page sizes. Track the current mixed-mode index
in xe_device so allocation policy can be applied consistently.

v2
- make cur_index to atomic as update need in later patch to
  avoid race/concurency (sashiko)

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
 drivers/gpu/drm/xe/xe_device_types.h | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 32dd2ffbc796..eb60bce89e2d 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -61,6 +61,18 @@ enum xe_wedged_mode {
 	XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET = 2,
 };
 
+/**
+ * enum xe_page_size_alloc_ctrl_mode - Page size allocation control modes
+ * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M: Force all User BO allocations to 2MB pages
+ * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G: Force all User BO allocations to 1GB pages
+ * @XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED  : Round-robin, 4k,64K,2M and 1G per BO index
+ */
+enum xe_page_size_alloc_ctrl_mode {
+	XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M = 1,
+	XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G,
+	XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED
+};
+
 #define XE_BO_INVALID_OFFSET	LONG_MAX
 
 #define GRAPHICS_VER(xe) ((xe)->info.graphics_verx100 / 100)
@@ -474,6 +486,14 @@ struct xe_device {
 	/** @late_bind: xe mei late bind interface */
 	struct xe_late_bind late_bind;
 
+	/** @page_size_alloc_ctrl: Struct to control page size allocation mode */
+	struct {
+		/** @mode: xe page size allocation control mode */
+		enum xe_page_size_alloc_ctrl_mode mode;
+		/** @cur_index: Current index in case of mixed mode */
+		atomic_t cur_index;
+	} page_size_alloc_ctrl;
+
 	/** @oa: oa observation subsystem */
 	struct xe_oa oa;
 
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v2 2/8] drm/xe: add helper for multi page-size support
  2026-07-01 16:33 [PATCH v2 0/8] drm/xe: add page size allocation mode control Nareshkumar Gollakoti
  2026-07-01 16:33 ` [PATCH v2 1/8] drm/xe: add page size allocation control state to xe_device Nareshkumar Gollakoti
@ 2026-07-01 16:33 ` Nareshkumar Gollakoti
  2026-07-01 16:33 ` [PATCH v2 3/8] drm/xe/debugfs: add page size allocation mode knob Nareshkumar Gollakoti
                   ` (6 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: Nareshkumar Gollakoti @ 2026-07-01 16:33 UTC (permalink / raw)
  To: intel-xe; +Cc: himal.prasad.ghimiray, Nareshkumar Gollakoti

Introduce xe_device_supports_multi_pagesize() in xe_device.h
to centralize the platform check for debug page-size
allocation capability.

The helper returns true for dGFX platforms with
GRAPHICS_VERx100(xe) >= 3511, making feature gate easier
to reuse and keeping the capability test consistent across callers.

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
 drivers/gpu/drm/xe/xe_device.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 975768a6a9c8..a6ccc9043a83 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -197,6 +197,11 @@ static inline bool xe_device_wedged(struct xe_device *xe)
 	return atomic_read(&xe->wedged.flag);
 }
 
+static inline bool xe_device_supports_multi_pagesize(struct xe_device *xe)
+{
+	return IS_DGFX(xe) && GRAPHICS_VERx100(xe) >= 3511;
+}
+
 void xe_device_set_wedged_method(struct xe_device *xe, unsigned long method);
 void xe_device_declare_wedged(struct xe_device *xe);
 int xe_device_validate_wedged_mode(struct xe_device *xe, unsigned int mode);
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v2 3/8] drm/xe/debugfs: add page size allocation mode knob
  2026-07-01 16:33 [PATCH v2 0/8] drm/xe: add page size allocation mode control Nareshkumar Gollakoti
  2026-07-01 16:33 ` [PATCH v2 1/8] drm/xe: add page size allocation control state to xe_device Nareshkumar Gollakoti
  2026-07-01 16:33 ` [PATCH v2 2/8] drm/xe: add helper for multi page-size support Nareshkumar Gollakoti
@ 2026-07-01 16:33 ` Nareshkumar Gollakoti
  2026-07-01 16:33 ` [PATCH v2 4/8] drm/xe: add 1G BO page-size alignment flag Nareshkumar Gollakoti
                   ` (5 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: Nareshkumar Gollakoti @ 2026-07-01 16:33 UTC (permalink / raw)
  To: intel-xe; +Cc: himal.prasad.ghimiray, Nareshkumar Gollakoti

Expose a debugfs control to override the page-size allocation mode used
for user BOs.

The interface allows switching between forced 2M, forced 1G, and mixed
allocation modes at runtime on platforms that support page-size
allocation control. This provides a simple way to validate behavior and
debug page-size-dependent allocation flows.

v2
- set cur_index using atomic_set as cur_index updated as atomic value
(sashiko)

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
 drivers/gpu/drm/xe/xe_debugfs.c | 52 +++++++++++++++++++++++++++++++++
 1 file changed, 52 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
index 22b471303984..2fa9ce04f9cd 100644
--- a/drivers/gpu/drm/xe/xe_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_debugfs.c
@@ -544,6 +544,55 @@ static const struct file_operations disable_late_binding_fops = {
 	.write = disable_late_binding_set,
 };
 
+static ssize_t page_size_alloc_mode_show(struct file *f, char __user *ubuf,
+					 size_t size, loff_t *pos)
+{
+	struct xe_device *xe = file_inode(f)->i_private;
+	char buf[32];
+	int len;
+
+	if (!xe_device_supports_multi_pagesize(xe))
+		return -EOPNOTSUPP;
+
+	enum xe_page_size_alloc_ctrl_mode mode =
+		READ_ONCE(xe->page_size_alloc_ctrl.mode);
+	len = scnprintf(buf, sizeof(buf), "%d\n", mode);
+
+	return simple_read_from_buffer(ubuf, size, pos, buf, len);
+}
+
+static ssize_t page_size_alloc_mode_set(struct file *f, const char __user *ubuf,
+					size_t size, loff_t *pos)
+{
+	struct xe_device *xe = file_inode(f)->i_private;
+	unsigned int val;
+	int ret;
+
+	if (!xe_device_supports_multi_pagesize(xe))
+		return -EOPNOTSUPP;
+
+	ret = kstrtouint_from_user(ubuf, size, 0, &val);
+	if (ret)
+		return ret;
+
+	if (val > XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED)
+		return -EINVAL;
+
+	WRITE_ONCE(xe->page_size_alloc_ctrl.mode,
+		   (enum xe_page_size_alloc_ctrl_mode)val);
+
+	if (val == XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED)
+		atomic_set(&xe->page_size_alloc_ctrl.cur_index, 0);
+
+	return size;
+}
+
+static const struct file_operations page_size_alloc_mode_fops = {
+	.owner = THIS_MODULE,
+	.read = page_size_alloc_mode_show,
+	.write = page_size_alloc_mode_set,
+};
+
 void xe_debugfs_register(struct xe_device *xe)
 {
 	struct ttm_device *bdev = &xe->ttm;
@@ -585,6 +634,9 @@ void xe_debugfs_register(struct xe_device *xe)
 	debugfs_create_file("disable_late_binding", 0600, root, xe,
 			    &disable_late_binding_fops);
 
+	debugfs_create_file("page_size_alloc_mode", 0600, root, xe,
+			    &page_size_alloc_mode_fops);
+
 	/*
 	 * Don't expose page reclaim configuration file if not supported by the
 	 * hardware initially.
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v2 4/8] drm/xe: add 1G BO page-size alignment flag
  2026-07-01 16:33 [PATCH v2 0/8] drm/xe: add page size allocation mode control Nareshkumar Gollakoti
                   ` (2 preceding siblings ...)
  2026-07-01 16:33 ` [PATCH v2 3/8] drm/xe/debugfs: add page size allocation mode knob Nareshkumar Gollakoti
@ 2026-07-01 16:33 ` Nareshkumar Gollakoti
  2026-07-01 16:33 ` [PATCH v2 5/8] drm/xe: apply debug page-size policy to user BO creation Nareshkumar Gollakoti
                   ` (4 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: Nareshkumar Gollakoti @ 2026-07-01 16:33 UTC (permalink / raw)
  To: intel-xe; +Cc: himal.prasad.ghimiray, Nareshkumar Gollakoti

Add XE_BO_FLAG_NEEDS_1G and use it to request 1G alignment for BOs that
require a 1G minimum page size.

Update xe_bo_init_locked() so VRAM and stolen-memory BO sizing honors
the new flag alongside the existing 64K and 2M page-size requirements.
When XE_BO_FLAG_NEEDS_1G is set, the BO size is rounded up to 1G;
otherwise the existing 2M and 64K alignment behavior is preserved.

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
 drivers/gpu/drm/xe/xe_bo.c | 12 ++++++++++--
 drivers/gpu/drm/xe/xe_bo.h |  1 +
 2 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 4c80bac67622..45ff01df68e1 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -2323,8 +2323,16 @@ struct xe_bo *xe_bo_init_locked(struct xe_device *xe, struct xe_bo *bo,
 	if (flags & (XE_BO_FLAG_VRAM_MASK | XE_BO_FLAG_STOLEN) &&
 	    !(flags & XE_BO_FLAG_IGNORE_MIN_PAGE_SIZE) &&
 	    ((xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K) ||
-	     (flags & (XE_BO_FLAG_NEEDS_64K | XE_BO_FLAG_NEEDS_2M)))) {
-		size_t align = flags & XE_BO_FLAG_NEEDS_2M ? SZ_2M : SZ_64K;
+	     (flags & (XE_BO_FLAG_NEEDS_64K | XE_BO_FLAG_NEEDS_2M
+		       | XE_BO_FLAG_NEEDS_1G)))) {
+		size_t align;
+
+		if (flags & XE_BO_FLAG_NEEDS_1G)
+			align = SZ_1G;
+		else if (flags & XE_BO_FLAG_NEEDS_2M)
+			align = SZ_2M;
+		else
+			align = SZ_64K;
 
 		aligned_size = ALIGN(size, align);
 		if (type != ttm_bo_type_device)
diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
index 6340317f7d2e..d5d023cac367 100644
--- a/drivers/gpu/drm/xe/xe_bo.h
+++ b/drivers/gpu/drm/xe/xe_bo.h
@@ -52,6 +52,7 @@
 #define XE_BO_FLAG_CPU_ADDR_MIRROR	BIT(24)
 #define XE_BO_FLAG_FORCE_USER_VRAM	BIT(25)
 #define XE_BO_FLAG_NO_COMPRESSION	BIT(26)
+#define XE_BO_FLAG_NEEDS_1G		BIT(27)
 
 /* this one is trigger internally only */
 #define XE_BO_FLAG_INTERNAL_TEST	BIT(30)
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v2 5/8] drm/xe: apply debug page-size policy to user BO creation
  2026-07-01 16:33 [PATCH v2 0/8] drm/xe: add page size allocation mode control Nareshkumar Gollakoti
                   ` (3 preceding siblings ...)
  2026-07-01 16:33 ` [PATCH v2 4/8] drm/xe: add 1G BO page-size alignment flag Nareshkumar Gollakoti
@ 2026-07-01 16:33 ` Nareshkumar Gollakoti
  2026-07-01 16:33 ` [PATCH v2 6/8] drm/xe/vm: apply debug page-size policy to VMA map flags Nareshkumar Gollakoti
                   ` (3 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: Nareshkumar Gollakoti @ 2026-07-01 16:33 UTC (permalink / raw)
  To: intel-xe; +Cc: himal.prasad.ghimiray, Nareshkumar Gollakoti

Apply the debug page-size allocation policy in xe_bo_create_user().

In 2M-only and 1G-only modes, set the matching BO flag when the
requested size is aligned. In mixed mode, rotate across 4K, 64K, 2M,
and 1G, and set the selected flag only when the size is aligned for
it.

Otherwise, leave the flags unchanged and use the default allocation
behavior.

This makes user BO creation follow the same debug page-size policy as
other BO allocation paths.

v2
- make sure debug page-size allocation do not
  break default/usual path(sashiko)
- add atomic accesses to avoid race for concurrent access(sashiko)
- refactored commit messages for readability

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
 drivers/gpu/drm/xe/xe_bo.c | 56 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 45ff01df68e1..e1da9701c898 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -2612,6 +2612,60 @@ static struct xe_bo *xe_bo_create_novm(struct xe_device *xe, struct xe_tile *til
 	return ret ? ERR_PTR(ret) : bo;
 }
 
+static u32 get_flag_from_cur_index_in_mixed_mode(struct xe_device *xe, size_t size)
+{
+	static const u32 map[4] = {
+		0, //default mode 4K
+		XE_BO_FLAG_NEEDS_64K,
+		XE_BO_FLAG_NEEDS_2M,
+		XE_BO_FLAG_NEEDS_1G,
+	};
+	u32 idx;
+
+	idx = (atomic_inc_return(&xe->page_size_alloc_ctrl.cur_index) - 1) % 4;
+
+	if (!map[idx] && IS_ALIGNED(size, SZ_4K))
+		return 0;
+
+	if (map[idx] == XE_BO_FLAG_NEEDS_64K && IS_ALIGNED(size, SZ_64K))
+		return map[idx];
+
+	if (map[idx] == XE_BO_FLAG_NEEDS_2M && IS_ALIGNED(size, SZ_2M))
+		return map[idx];
+
+	if (map[idx] == XE_BO_FLAG_NEEDS_1G && IS_ALIGNED(size, SZ_1G))
+		return map[idx];
+
+	return 0;
+}
+
+static void xe_bo_apply_debug_page_size_policy(struct xe_device *xe,
+					       u32 *bo_flags,
+					       size_t size)
+{
+	int mode = READ_ONCE(xe->page_size_alloc_ctrl.mode);
+	u32 want = 0;
+
+	if (!xe_device_supports_multi_pagesize(xe))
+		return;
+
+	/* No action if default mode */
+	if (!mode)
+		return;
+
+	if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_2M && IS_ALIGNED(size, SZ_2M))
+		want = XE_BO_FLAG_NEEDS_2M;
+	else if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_ONLY_1G &&
+		 IS_ALIGNED(size, SZ_1G))
+		want = XE_BO_FLAG_NEEDS_1G;
+	else if (mode == XE_PAGE_SIZE_ALLOC_CTRL_MODE_MIXED)
+		want = get_flag_from_cur_index_in_mixed_mode(xe, size);
+	else
+		return;
+
+	*bo_flags |= want;
+}
+
 /**
  * xe_bo_create_user() - Create a user BO
  * @xe: The xe device.
@@ -2635,6 +2689,8 @@ struct xe_bo *xe_bo_create_user(struct xe_device *xe,
 
 	flags |= XE_BO_FLAG_USER;
 
+	xe_bo_apply_debug_page_size_policy(xe, &flags, size);
+
 	if (vm || exec) {
 		xe_assert(xe, exec);
 		bo = __xe_bo_create_locked(xe, NULL, vm, size, 0, ~0ULL,
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v2 6/8] drm/xe/vm: apply debug page-size policy to VMA map flags
  2026-07-01 16:33 [PATCH v2 0/8] drm/xe: add page size allocation mode control Nareshkumar Gollakoti
                   ` (4 preceding siblings ...)
  2026-07-01 16:33 ` [PATCH v2 5/8] drm/xe: apply debug page-size policy to user BO creation Nareshkumar Gollakoti
@ 2026-07-01 16:33 ` Nareshkumar Gollakoti
  2026-07-01 16:33 ` [PATCH v2 7/8] drm/xe/vm: validate large-page user BO bind alignment Nareshkumar Gollakoti
                   ` (2 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: Nareshkumar Gollakoti @ 2026-07-01 16:33 UTC (permalink / raw)
  To: intel-xe; +Cc: himal.prasad.ghimiray, Nareshkumar Gollakoti

Propagate the debug user BO page-size selection into VM bind map
operations.

When page-size allocation control is supported and the BO is a user BO,
set the corresponding VMA PTE flag during bind-op construction based on
the BO page-size requirement flags. This covers 64K, 2M, and 1G modes
and allows the debug page-size allocation policy to influence page-table
mapping behavior for user allocations.

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
 drivers/gpu/drm/xe/xe_vm.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 080c2fff0e95..50ca29a79533 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -2390,6 +2390,27 @@ static void xe_svm_prefetch_gpuva_ops_fini(struct drm_gpuva_ops *ops)
 	}
 }
 
+static void xe_vma_apply_debug_page_size_flag(struct xe_vm *vm,
+					      struct xe_vma_op *op,
+					      struct xe_bo *bo)
+{
+	if (!xe_device_supports_multi_pagesize(vm->xe))
+		return;
+
+	if (!bo)
+		return;
+
+	if (!(bo->flags & XE_BO_FLAG_USER))
+		return;
+
+	if (bo->flags & XE_BO_FLAG_NEEDS_64K)
+		op->map.vma_flags |= XE_VMA_PTE_64K;
+	else if (bo->flags & XE_BO_FLAG_NEEDS_2M)
+		op->map.vma_flags |= XE_VMA_PTE_2M;
+	else if (bo->flags & XE_BO_FLAG_NEEDS_1G)
+		op->map.vma_flags |= XE_VMA_PTE_1G;
+}
+
 /*
  * Create operations list from IOCTL arguments, setup operations fields so parse
  * and commit steps are decoupled from IOCTL arguments. This step can fail.
@@ -2485,6 +2506,7 @@ vm_bind_ioctl_ops_create(struct xe_vm *vm, struct xe_vma_ops *vops,
 			op->map.pat_index = pat_index;
 			op->map.invalidate_on_bind =
 				__xe_vm_needs_clear_scratch_pages(vm, flags);
+			xe_vma_apply_debug_page_size_flag(vm, op, bo);
 		} else if (__op->op == DRM_GPUVA_OP_PREFETCH) {
 			struct xe_vma *vma = gpuva_to_vma(op->base.prefetch.va);
 			struct xe_tile *tile;
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v2 7/8] drm/xe/vm: validate large-page user BO bind alignment
  2026-07-01 16:33 [PATCH v2 0/8] drm/xe: add page size allocation mode control Nareshkumar Gollakoti
                   ` (5 preceding siblings ...)
  2026-07-01 16:33 ` [PATCH v2 6/8] drm/xe/vm: apply debug page-size policy to VMA map flags Nareshkumar Gollakoti
@ 2026-07-01 16:33 ` Nareshkumar Gollakoti
  2026-07-01 16:33 ` [PATCH v2 8/8] drm/xe/pt: allow selecting the bind leaf PTE level Nareshkumar Gollakoti
  2026-07-01 17:19 ` ✓ CI.KUnit: success for drm/xe: add page size allocation mode control Patchwork
  8 siblings, 0 replies; 10+ messages in thread
From: Nareshkumar Gollakoti @ 2026-07-01 16:33 UTC (permalink / raw)
  To: intel-xe; +Cc: himal.prasad.ghimiray, Nareshkumar Gollakoti

Add VM bind validation for BOs that request 64K, 2M, or 1G pages.

When a BO is created with XE_BO_FLAG_NEEDS_64K, XE_BO_FLAG_NEEDS_2M,
or XE_BO_FLAG_NEEDS_1G, require the bind offset, virtual address, and
range to be aligned to the requested page size for map operations.
Skip these checks for unmap and unmap-all.

Also allow the corresponding VMA page table flags in the user-visible
VMA flag mask.

This prevents invalid bind requests for large-page BOs from reaching
later VM setup paths.

v2:(sashiko)
- add 64K alignment validation alongside 2M and 1G
  for user bindpaths
- keep large-page alignment checks skipped for
  UNMAP and UNMAP_ALL
- refine commit message wordings

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
 drivers/gpu/drm/xe/xe_vm.c | 35 ++++++++++++++++++++++++++++++++++-
 1 file changed, 34 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 50ca29a79533..3fc5f1db93d0 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -721,7 +721,10 @@ static void xe_vma_ops_incr_pt_update_ops(struct xe_vma_ops *vops, u8 tile_mask,
 	XE_VMA_DUMPABLE |		    \
 	XE_VMA_SYSTEM_ALLOCATOR |           \
 	DRM_GPUVA_SPARSE |		    \
-	XE_VMA_MADV_AUTORESET)
+	XE_VMA_MADV_AUTORESET |		    \
+	XE_VMA_PTE_64K |		    \
+	XE_VMA_PTE_2M  |		    \
+	XE_VMA_PTE_1G)
 
 static void xe_vm_populate_rebind(struct xe_vma_op *op, struct xe_vma *vma,
 				  u8 tile_mask)
@@ -3835,6 +3838,36 @@ static int xe_vm_bind_ioctl_validate_bo(struct xe_device *xe, struct xe_bo *bo,
 		}
 	}
 
+	if (bo->flags & XE_BO_FLAG_NEEDS_64K &&
+	    (op != DRM_XE_VM_BIND_OP_UNMAP &&
+	     op != DRM_XE_VM_BIND_OP_UNMAP_ALL)) {
+		if (XE_IOCTL_DBG(xe, obj_offset & (SZ_64K - 1)) ||
+		    XE_IOCTL_DBG(xe, addr & (SZ_64K - 1)) ||
+		    XE_IOCTL_DBG(xe, range & (SZ_64K - 1))) {
+			return -EINVAL;
+		}
+	}
+
+	if (bo->flags & XE_BO_FLAG_NEEDS_2M &&
+	    (op != DRM_XE_VM_BIND_OP_UNMAP &&
+	     op != DRM_XE_VM_BIND_OP_UNMAP_ALL)) {
+		if (XE_IOCTL_DBG(xe, obj_offset & (SZ_2M - 1)) ||
+		    XE_IOCTL_DBG(xe, addr & (SZ_2M - 1)) ||
+		    XE_IOCTL_DBG(xe, range & (SZ_2M - 1))) {
+			return -EINVAL;
+		}
+	}
+
+	if (bo->flags & XE_BO_FLAG_NEEDS_1G &&
+	    (op != DRM_XE_VM_BIND_OP_UNMAP &&
+	     op != DRM_XE_VM_BIND_OP_UNMAP_ALL)) {
+		if (XE_IOCTL_DBG(xe, obj_offset & (SZ_1G - 1)) ||
+		    XE_IOCTL_DBG(xe, addr & (SZ_1G - 1)) ||
+		    XE_IOCTL_DBG(xe, range & (SZ_1G - 1))) {
+			return -EINVAL;
+		}
+	}
+
 	coh_mode = xe_pat_index_get_coh_mode(xe, pat_index);
 	if (bo->cpu_caching) {
 		if (XE_IOCTL_DBG(xe, coh_mode == XE_COH_NONE &&
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* [PATCH v2 8/8] drm/xe/pt: allow selecting the bind leaf PTE level
  2026-07-01 16:33 [PATCH v2 0/8] drm/xe: add page size allocation mode control Nareshkumar Gollakoti
                   ` (6 preceding siblings ...)
  2026-07-01 16:33 ` [PATCH v2 7/8] drm/xe/vm: validate large-page user BO bind alignment Nareshkumar Gollakoti
@ 2026-07-01 16:33 ` Nareshkumar Gollakoti
  2026-07-01 17:19 ` ✓ CI.KUnit: success for drm/xe: add page size allocation mode control Patchwork
  8 siblings, 0 replies; 10+ messages in thread
From: Nareshkumar Gollakoti @ 2026-07-01 16:33 UTC (permalink / raw)
  To: intel-xe; +Cc: himal.prasad.ghimiray, Nareshkumar Gollakoti

Add a target_leaf_level field to the page-table bind walk and use it
to control the level where leaf entries are emitted.

The default bind walk emits leaf PTEs at level 0, while huge mappings
are otherwise chosen through xe_pt_hugepte_possible(). Add an explicit
target leaf level so the walk can stop earlier when the VMA requests a
larger mapping size.

Use level 1 for 2M PDE mappings and level 2 for 1G PDP mappings, while
keeping level 0 for normal 4K/64K mappings. Keep the existing huge-page
selection logic for the default level-0 case.

This allows the bind path to emit 2M and 1G leaf entries when
requested by the VMA.

v2:
-Avoid using max_level field to control walk depth
-use target_leaf_level field to preserve normal walk
 environment
-keep default huge-page heuristic only for the level0
 default path
-refine commit meessage

Signed-off-by: Nareshkumar Gollakoti <naresh.kumar.g@intel.com>
---
 drivers/gpu/drm/xe/xe_pt.c | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
index 0959e0e88a14..245dadc7ab9d 100644
--- a/drivers/gpu/drm/xe/xe_pt.c
+++ b/drivers/gpu/drm/xe/xe_pt.c
@@ -302,6 +302,13 @@ struct xe_pt_stage_bind_walk {
 	bool needs_64K;
 	/** @clear_pt: clear page table entries during the bind walk */
 	bool clear_pt;
+	/** @target_leaf_level: The page-table level at which to emit leaf PTEs.
+	 * 0 for normal 4K/64K mappings, whereas 1 for 2M huge pages and 2 for
+	 * 1G huge pages. The walk still traverses from the root down; this field
+	 * instructs xe_pt_stage_bind_entry() to treat the given level as leaf
+	 * instead going further down.
+	 */
+	u32 target_leaf_level;
 	/**
 	 * @vma: VMA being mapped
 	 */
@@ -530,7 +537,9 @@ xe_pt_stage_bind_entry(struct xe_ptw *parent, pgoff_t offset,
 	u64 pte;
 
 	/* Is this a leaf entry ?*/
-	if (level == 0 || xe_pt_hugepte_possible(addr, next, level, xe_walk)) {
+	if (level == xe_walk->target_leaf_level || level == 0 ||
+	    (xe_walk->target_leaf_level == 0 &&
+	     xe_pt_hugepte_possible(addr, next, level, xe_walk))) {
 		struct xe_res_cursor *curs = xe_walk->curs;
 		struct xe_bo *bo = xe_vma_bo(xe_walk->vma);
 		bool is_null_or_purged = xe_vma_is_null(xe_walk->vma) ||
@@ -773,6 +782,11 @@ xe_pt_stage_bind(struct xe_tile *tile, struct xe_vma *vma,
 	}
 
 	xe_walk.needs_64K = (vm->flags & XE_VM_FLAG_64K);
+	if (vma->gpuva.flags & XE_VMA_PTE_2M)
+		xe_walk.target_leaf_level = 1;
+	else if (vma->gpuva.flags & XE_VMA_PTE_1G)
+		xe_walk.target_leaf_level = 2;
+
 	if (clear_pt)
 		goto walk_pt;
 
-- 
2.43.0


^ permalink raw reply related	[flat|nested] 10+ messages in thread

* ✓ CI.KUnit: success for drm/xe: add page size allocation mode control
  2026-07-01 16:33 [PATCH v2 0/8] drm/xe: add page size allocation mode control Nareshkumar Gollakoti
                   ` (7 preceding siblings ...)
  2026-07-01 16:33 ` [PATCH v2 8/8] drm/xe/pt: allow selecting the bind leaf PTE level Nareshkumar Gollakoti
@ 2026-07-01 17:19 ` Patchwork
  8 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2026-07-01 17:19 UTC (permalink / raw)
  To: Nareshkumar Gollakoti; +Cc: intel-xe

== Series Details ==

Series: drm/xe: add page size allocation mode control
URL   : https://patchwork.freedesktop.org/series/169640/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[17:18:13] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[17:18:17] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
../drivers/gpu/drm/xe/xe_pt.c:1434:13: warning: ‘xe_pt_svm_userptr_notifier_lock’ defined but not used [-Wunused-function]
 1434 | static void xe_pt_svm_userptr_notifier_lock(struct xe_vm *vm)
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

[17:18:49] Starting KUnit Kernel (1/1)...
[17:18:49] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[17:18:50] ================== guc_buf (11 subtests) ===================
[17:18:50] [PASSED] test_smallest
[17:18:50] [PASSED] test_largest
[17:18:50] [PASSED] test_granular
[17:18:50] [PASSED] test_unique
[17:18:50] [PASSED] test_overlap
[17:18:50] [PASSED] test_reusable
[17:18:50] [PASSED] test_too_big
[17:18:50] [PASSED] test_flush
[17:18:50] [PASSED] test_lookup
[17:18:50] [PASSED] test_data
[17:18:50] [PASSED] test_class
[17:18:50] ===================== [PASSED] guc_buf =====================
[17:18:50] =================== guc_dbm (7 subtests) ===================
[17:18:50] [PASSED] test_empty
[17:18:50] [PASSED] test_default
[17:18:50] ======================== test_size  ========================
[17:18:50] [PASSED] 4
[17:18:50] [PASSED] 8
[17:18:50] [PASSED] 32
[17:18:50] [PASSED] 256
[17:18:50] ==================== [PASSED] test_size ====================
[17:18:50] ======================= test_reuse  ========================
[17:18:50] [PASSED] 4
[17:18:50] [PASSED] 8
[17:18:50] [PASSED] 32
[17:18:50] [PASSED] 256
[17:18:50] =================== [PASSED] test_reuse ====================
[17:18:50] =================== test_range_overlap  ====================
[17:18:50] [PASSED] 4
[17:18:50] [PASSED] 8
[17:18:50] [PASSED] 32
[17:18:50] [PASSED] 256
[17:18:50] =============== [PASSED] test_range_overlap ================
[17:18:50] =================== test_range_compact  ====================
[17:18:50] [PASSED] 4
[17:18:50] [PASSED] 8
[17:18:50] [PASSED] 32
[17:18:50] [PASSED] 256
[17:18:50] =============== [PASSED] test_range_compact ================
[17:18:50] ==================== test_range_spare  =====================
[17:18:50] [PASSED] 4
[17:18:50] [PASSED] 8
[17:18:50] [PASSED] 32
[17:18:50] [PASSED] 256
[17:18:50] ================ [PASSED] test_range_spare =================
[17:18:50] ===================== [PASSED] guc_dbm =====================
[17:18:50] =================== guc_idm (6 subtests) ===================
[17:18:50] [PASSED] bad_init
[17:18:50] [PASSED] no_init
[17:18:50] [PASSED] init_fini
[17:18:50] [PASSED] check_used
[17:18:50] [PASSED] check_quota
[17:18:50] [PASSED] check_all
[17:18:50] ===================== [PASSED] guc_idm =====================
[17:18:50] ================== no_relay (3 subtests) ===================
[17:18:50] [PASSED] xe_drops_guc2pf_if_not_ready
[17:18:50] [PASSED] xe_drops_guc2vf_if_not_ready
[17:18:50] [PASSED] xe_rejects_send_if_not_ready
[17:18:50] ==================== [PASSED] no_relay =====================
[17:18:50] ================== pf_relay (14 subtests) ==================
[17:18:50] [PASSED] pf_rejects_guc2pf_too_short
[17:18:50] [PASSED] pf_rejects_guc2pf_too_long
[17:18:50] [PASSED] pf_rejects_guc2pf_no_payload
[17:18:50] [PASSED] pf_fails_no_payload
[17:18:50] [PASSED] pf_fails_bad_origin
[17:18:50] [PASSED] pf_fails_bad_type
[17:18:50] [PASSED] pf_txn_reports_error
[17:18:50] [PASSED] pf_txn_sends_pf2guc
[17:18:50] [PASSED] pf_sends_pf2guc
[17:18:50] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[17:18:50] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[17:18:50] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[17:18:50] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[17:18:50] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[17:18:50] ==================== [PASSED] pf_relay =====================
[17:18:50] ================== vf_relay (3 subtests) ===================
[17:18:50] [PASSED] vf_rejects_guc2vf_too_short
[17:18:50] [PASSED] vf_rejects_guc2vf_too_long
[17:18:50] [PASSED] vf_rejects_guc2vf_no_payload
[17:18:50] ==================== [PASSED] vf_relay =====================
[17:18:50] ================ pf_gt_config (9 subtests) =================
[17:18:50] [PASSED] fair_contexts_1vf
[17:18:50] [PASSED] fair_doorbells_1vf
[17:18:50] [PASSED] fair_ggtt_1vf
[17:18:50] ====================== fair_vram_1vf  ======================
[17:18:50] [PASSED] 3.50 GiB
[17:18:50] [PASSED] 11.5 GiB
[17:18:50] [PASSED] 15.5 GiB
[17:18:50] [PASSED] 31.5 GiB
[17:18:50] [PASSED] 63.5 GiB
[17:18:50] [PASSED] 1.91 GiB
[17:18:50] ================== [PASSED] fair_vram_1vf ==================
[17:18:50] ================ fair_vram_1vf_admin_only  =================
[17:18:50] [PASSED] 3.50 GiB
[17:18:50] [PASSED] 11.5 GiB
[17:18:50] [PASSED] 15.5 GiB
[17:18:50] [PASSED] 31.5 GiB
[17:18:50] [PASSED] 63.5 GiB
[17:18:50] [PASSED] 1.91 GiB
[17:18:50] ============ [PASSED] fair_vram_1vf_admin_only =============
[17:18:50] ====================== fair_contexts  ======================
[17:18:50] [PASSED] 1 VF
[17:18:50] [PASSED] 2 VFs
[17:18:50] [PASSED] 3 VFs
[17:18:50] [PASSED] 4 VFs
[17:18:50] [PASSED] 5 VFs
[17:18:50] [PASSED] 6 VFs
[17:18:50] [PASSED] 7 VFs
[17:18:50] [PASSED] 8 VFs
[17:18:50] [PASSED] 9 VFs
[17:18:50] [PASSED] 10 VFs
[17:18:50] [PASSED] 11 VFs
[17:18:50] [PASSED] 12 VFs
[17:18:50] [PASSED] 13 VFs
[17:18:50] [PASSED] 14 VFs
[17:18:50] [PASSED] 15 VFs
[17:18:50] [PASSED] 16 VFs
[17:18:50] [PASSED] 17 VFs
[17:18:50] [PASSED] 18 VFs
[17:18:50] [PASSED] 19 VFs
[17:18:50] [PASSED] 20 VFs
[17:18:50] [PASSED] 21 VFs
[17:18:50] [PASSED] 22 VFs
[17:18:50] [PASSED] 23 VFs
[17:18:50] [PASSED] 24 VFs
[17:18:50] [PASSED] 25 VFs
[17:18:50] [PASSED] 26 VFs
[17:18:50] [PASSED] 27 VFs
[17:18:50] [PASSED] 28 VFs
[17:18:50] [PASSED] 29 VFs
[17:18:50] [PASSED] 30 VFs
[17:18:50] [PASSED] 31 VFs
[17:18:50] [PASSED] 32 VFs
[17:18:50] [PASSED] 33 VFs
[17:18:50] [PASSED] 34 VFs
[17:18:50] [PASSED] 35 VFs
[17:18:50] [PASSED] 36 VFs
[17:18:50] [PASSED] 37 VFs
[17:18:50] [PASSED] 38 VFs
[17:18:50] [PASSED] 39 VFs
[17:18:50] [PASSED] 40 VFs
[17:18:50] [PASSED] 41 VFs
[17:18:50] [PASSED] 42 VFs
[17:18:50] [PASSED] 43 VFs
[17:18:50] [PASSED] 44 VFs
[17:18:50] [PASSED] 45 VFs
[17:18:50] [PASSED] 46 VFs
[17:18:50] [PASSED] 47 VFs
[17:18:50] [PASSED] 48 VFs
[17:18:50] [PASSED] 49 VFs
[17:18:50] [PASSED] 50 VFs
[17:18:50] [PASSED] 51 VFs
[17:18:50] [PASSED] 52 VFs
[17:18:50] [PASSED] 53 VFs
[17:18:50] [PASSED] 54 VFs
[17:18:50] [PASSED] 55 VFs
[17:18:50] [PASSED] 56 VFs
[17:18:50] [PASSED] 57 VFs
[17:18:50] [PASSED] 58 VFs
[17:18:50] [PASSED] 59 VFs
[17:18:50] [PASSED] 60 VFs
[17:18:50] [PASSED] 61 VFs
[17:18:50] [PASSED] 62 VFs
[17:18:50] [PASSED] 63 VFs
[17:18:50] ================== [PASSED] fair_contexts ==================
[17:18:50] ===================== fair_doorbells  ======================
[17:18:50] [PASSED] 1 VF
[17:18:50] [PASSED] 2 VFs
[17:18:50] [PASSED] 3 VFs
[17:18:50] [PASSED] 4 VFs
[17:18:50] [PASSED] 5 VFs
[17:18:50] [PASSED] 6 VFs
[17:18:50] [PASSED] 7 VFs
[17:18:50] [PASSED] 8 VFs
[17:18:50] [PASSED] 9 VFs
[17:18:50] [PASSED] 10 VFs
[17:18:50] [PASSED] 11 VFs
[17:18:50] [PASSED] 12 VFs
[17:18:50] [PASSED] 13 VFs
[17:18:50] [PASSED] 14 VFs
[17:18:50] [PASSED] 15 VFs
[17:18:50] [PASSED] 16 VFs
[17:18:50] [PASSED] 17 VFs
[17:18:50] [PASSED] 18 VFs
[17:18:50] [PASSED] 19 VFs
[17:18:50] [PASSED] 20 VFs
[17:18:50] [PASSED] 21 VFs
[17:18:50] [PASSED] 22 VFs
[17:18:50] [PASSED] 23 VFs
[17:18:50] [PASSED] 24 VFs
[17:18:50] [PASSED] 25 VFs
[17:18:50] [PASSED] 26 VFs
[17:18:50] [PASSED] 27 VFs
[17:18:50] [PASSED] 28 VFs
[17:18:50] [PASSED] 29 VFs
[17:18:50] [PASSED] 30 VFs
[17:18:50] [PASSED] 31 VFs
[17:18:50] [PASSED] 32 VFs
[17:18:50] [PASSED] 33 VFs
[17:18:50] [PASSED] 34 VFs
[17:18:50] [PASSED] 35 VFs
[17:18:50] [PASSED] 36 VFs
[17:18:50] [PASSED] 37 VFs
[17:18:50] [PASSED] 38 VFs
[17:18:50] [PASSED] 39 VFs
[17:18:50] [PASSED] 40 VFs
[17:18:50] [PASSED] 41 VFs
[17:18:50] [PASSED] 42 VFs
[17:18:50] [PASSED] 43 VFs
[17:18:50] [PASSED] 44 VFs
[17:18:50] [PASSED] 45 VFs
[17:18:50] [PASSED] 46 VFs
[17:18:50] [PASSED] 47 VFs
[17:18:50] [PASSED] 48 VFs
[17:18:50] [PASSED] 49 VFs
[17:18:50] [PASSED] 50 VFs
[17:18:50] [PASSED] 51 VFs
[17:18:50] [PASSED] 52 VFs
[17:18:50] [PASSED] 53 VFs
[17:18:50] [PASSED] 54 VFs
[17:18:50] [PASSED] 55 VFs
[17:18:50] [PASSED] 56 VFs
[17:18:50] [PASSED] 57 VFs
[17:18:50] [PASSED] 58 VFs
[17:18:50] [PASSED] 59 VFs
[17:18:50] [PASSED] 60 VFs
[17:18:50] [PASSED] 61 VFs
[17:18:50] [PASSED] 62 VFs
[17:18:50] [PASSED] 63 VFs
[17:18:50] ================= [PASSED] fair_doorbells ==================
[17:18:50] ======================== fair_ggtt  ========================
[17:18:50] [PASSED] 1 VF
[17:18:50] [PASSED] 2 VFs
[17:18:50] [PASSED] 3 VFs
[17:18:50] [PASSED] 4 VFs
[17:18:50] [PASSED] 5 VFs
[17:18:50] [PASSED] 6 VFs
[17:18:50] [PASSED] 7 VFs
[17:18:50] [PASSED] 8 VFs
[17:18:50] [PASSED] 9 VFs
[17:18:50] [PASSED] 10 VFs
[17:18:50] [PASSED] 11 VFs
[17:18:50] [PASSED] 12 VFs
[17:18:50] [PASSED] 13 VFs
[17:18:50] [PASSED] 14 VFs
[17:18:50] [PASSED] 15 VFs
[17:18:50] [PASSED] 16 VFs
[17:18:50] [PASSED] 17 VFs
[17:18:50] [PASSED] 18 VFs
[17:18:50] [PASSED] 19 VFs
[17:18:50] [PASSED] 20 VFs
[17:18:50] [PASSED] 21 VFs
[17:18:50] [PASSED] 22 VFs
[17:18:50] [PASSED] 23 VFs
[17:18:50] [PASSED] 24 VFs
[17:18:50] [PASSED] 25 VFs
[17:18:50] [PASSED] 26 VFs
[17:18:50] [PASSED] 27 VFs
[17:18:50] [PASSED] 28 VFs
[17:18:50] [PASSED] 29 VFs
[17:18:50] [PASSED] 30 VFs
[17:18:50] [PASSED] 31 VFs
[17:18:50] [PASSED] 32 VFs
[17:18:50] [PASSED] 33 VFs
[17:18:50] [PASSED] 34 VFs
[17:18:50] [PASSED] 35 VFs
[17:18:50] [PASSED] 36 VFs
[17:18:50] [PASSED] 37 VFs
[17:18:50] [PASSED] 38 VFs
[17:18:50] [PASSED] 39 VFs
[17:18:50] [PASSED] 40 VFs
[17:18:50] [PASSED] 41 VFs
[17:18:50] [PASSED] 42 VFs
[17:18:50] [PASSED] 43 VFs
[17:18:50] [PASSED] 44 VFs
[17:18:50] [PASSED] 45 VFs
[17:18:50] [PASSED] 46 VFs
[17:18:50] [PASSED] 47 VFs
[17:18:50] [PASSED] 48 VFs
[17:18:50] [PASSED] 49 VFs
[17:18:50] [PASSED] 50 VFs
[17:18:50] [PASSED] 51 VFs
[17:18:50] [PASSED] 52 VFs
[17:18:50] [PASSED] 53 VFs
[17:18:50] [PASSED] 54 VFs
[17:18:50] [PASSED] 55 VFs
[17:18:50] [PASSED] 56 VFs
[17:18:50] [PASSED] 57 VFs
[17:18:50] [PASSED] 58 VFs
[17:18:50] [PASSED] 59 VFs
[17:18:50] [PASSED] 60 VFs
[17:18:50] [PASSED] 61 VFs
[17:18:50] [PASSED] 62 VFs
[17:18:50] [PASSED] 63 VFs
[17:18:50] ==================== [PASSED] fair_ggtt ====================
[17:18:50] ======================== fair_vram  ========================
[17:18:50] [PASSED] 1 VF
[17:18:50] [PASSED] 2 VFs
[17:18:50] [PASSED] 3 VFs
[17:18:50] [PASSED] 4 VFs
[17:18:50] [PASSED] 5 VFs
[17:18:50] [PASSED] 6 VFs
[17:18:50] [PASSED] 7 VFs
[17:18:50] [PASSED] 8 VFs
[17:18:50] [PASSED] 9 VFs
[17:18:50] [PASSED] 10 VFs
[17:18:50] [PASSED] 11 VFs
[17:18:50] [PASSED] 12 VFs
[17:18:50] [PASSED] 13 VFs
[17:18:50] [PASSED] 14 VFs
[17:18:50] [PASSED] 15 VFs
[17:18:50] [PASSED] 16 VFs
[17:18:50] [PASSED] 17 VFs
[17:18:50] [PASSED] 18 VFs
[17:18:50] [PASSED] 19 VFs
[17:18:50] [PASSED] 20 VFs
[17:18:50] [PASSED] 21 VFs
[17:18:50] [PASSED] 22 VFs
[17:18:50] [PASSED] 23 VFs
[17:18:50] [PASSED] 24 VFs
[17:18:50] [PASSED] 25 VFs
[17:18:50] [PASSED] 26 VFs
[17:18:50] [PASSED] 27 VFs
[17:18:50] [PASSED] 28 VFs
[17:18:50] [PASSED] 29 VFs
[17:18:50] [PASSED] 30 VFs
[17:18:50] [PASSED] 31 VFs
[17:18:50] [PASSED] 32 VFs
[17:18:50] [PASSED] 33 VFs
[17:18:50] [PASSED] 34 VFs
[17:18:50] [PASSED] 35 VFs
[17:18:50] [PASSED] 36 VFs
[17:18:50] [PASSED] 37 VFs
[17:18:50] [PASSED] 38 VFs
[17:18:50] [PASSED] 39 VFs
[17:18:50] [PASSED] 40 VFs
[17:18:50] [PASSED] 41 VFs
[17:18:50] [PASSED] 42 VFs
[17:18:50] [PASSED] 43 VFs
[17:18:50] [PASSED] 44 VFs
[17:18:50] [PASSED] 45 VFs
[17:18:50] [PASSED] 46 VFs
[17:18:50] [PASSED] 47 VFs
[17:18:50] [PASSED] 48 VFs
[17:18:50] [PASSED] 49 VFs
[17:18:50] [PASSED] 50 VFs
[17:18:50] [PASSED] 51 VFs
[17:18:50] [PASSED] 52 VFs
[17:18:50] [PASSED] 53 VFs
[17:18:50] [PASSED] 54 VFs
[17:18:50] [PASSED] 55 VFs
[17:18:50] [PASSED] 56 VFs
[17:18:50] [PASSED] 57 VFs
[17:18:50] [PASSED] 58 VFs
[17:18:50] [PASSED] 59 VFs
[17:18:50] [PASSED] 60 VFs
[17:18:50] [PASSED] 61 VFs
[17:18:50] [PASSED] 62 VFs
[17:18:50] [PASSED] 63 VFs
[17:18:50] ==================== [PASSED] fair_vram ====================
[17:18:50] ================== [PASSED] pf_gt_config ===================
[17:18:50] ===================== lmtt (1 subtest) =====================
[17:18:50] ======================== test_ops  =========================
[17:18:50] [PASSED] 2-level
[17:18:50] [PASSED] multi-level
[17:18:50] ==================== [PASSED] test_ops =====================
[17:18:50] ====================== [PASSED] lmtt =======================
[17:18:50] ================= pf_service (11 subtests) =================
[17:18:50] [PASSED] pf_negotiate_any
[17:18:50] [PASSED] pf_negotiate_base_match
[17:18:50] [PASSED] pf_negotiate_base_newer
[17:18:50] [PASSED] pf_negotiate_base_next
[17:18:50] [SKIPPED] pf_negotiate_base_older (no older minor)
[17:18:50] [PASSED] pf_negotiate_base_prev
[17:18:50] [PASSED] pf_negotiate_latest_match
[17:18:50] [PASSED] pf_negotiate_latest_newer
[17:18:50] [PASSED] pf_negotiate_latest_next
[17:18:50] [SKIPPED] pf_negotiate_latest_older (no older minor)
[17:18:50] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[17:18:50] =================== [PASSED] pf_service ====================
[17:18:50] ================= xe_guc_g2g (2 subtests) ==================
[17:18:50] ============== xe_live_guc_g2g_kunit_default  ==============
[17:18:50] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[17:18:50] ============== xe_live_guc_g2g_kunit_allmem  ===============
[17:18:50] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[17:18:50] =================== [SKIPPED] xe_guc_g2g ===================
[17:18:50] =================== xe_mocs (2 subtests) ===================
[17:18:50] ================ xe_live_mocs_kernel_kunit  ================
[17:18:50] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[17:18:50] ================ xe_live_mocs_reset_kunit  =================
[17:18:50] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[17:18:50] ==================== [SKIPPED] xe_mocs =====================
[17:18:50] ================= xe_migrate (2 subtests) ==================
[17:18:50] ================= xe_migrate_sanity_kunit  =================
[17:18:50] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[17:18:50] ================== xe_validate_ccs_kunit  ==================
[17:18:50] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[17:18:50] =================== [SKIPPED] xe_migrate ===================
[17:18:50] ================== xe_dma_buf (1 subtest) ==================
[17:18:50] ==================== xe_dma_buf_kunit  =====================
[17:18:50] ================ [SKIPPED] xe_dma_buf_kunit ================
[17:18:50] =================== [SKIPPED] xe_dma_buf ===================
[17:18:50] ================= xe_bo_shrink (1 subtest) =================
[17:18:50] =================== xe_bo_shrink_kunit  ====================
[17:18:50] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[17:18:50] ================== [SKIPPED] xe_bo_shrink ==================
[17:18:50] ==================== xe_bo (2 subtests) ====================
[17:18:50] ================== xe_ccs_migrate_kunit  ===================
[17:18:50] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[17:18:50] ==================== xe_bo_evict_kunit  ====================
[17:18:50] =============== [SKIPPED] xe_bo_evict_kunit ================
[17:18:50] ===================== [SKIPPED] xe_bo ======================
[17:18:50] ==================== args (13 subtests) ====================
[17:18:50] [PASSED] count_args_test
[17:18:50] [PASSED] call_args_example
[17:18:50] [PASSED] call_args_test
[17:18:50] [PASSED] drop_first_arg_example
[17:18:50] [PASSED] drop_first_arg_test
[17:18:50] [PASSED] first_arg_example
[17:18:50] [PASSED] first_arg_test
[17:18:50] [PASSED] last_arg_example
[17:18:50] [PASSED] last_arg_test
[17:18:50] [PASSED] pick_arg_example
[17:18:50] [PASSED] if_args_example
[17:18:50] [PASSED] if_args_test
[17:18:50] [PASSED] sep_comma_example
[17:18:50] ====================== [PASSED] args =======================
[17:18:50] =================== xe_pci (3 subtests) ====================
[17:18:50] ==================== check_graphics_ip  ====================
[17:18:50] [PASSED] 12.00 Xe_LP
[17:18:50] [PASSED] 12.10 Xe_LP+
[17:18:50] [PASSED] 12.55 Xe_HPG
[17:18:50] [PASSED] 12.60 Xe_HPC
[17:18:50] [PASSED] 12.70 Xe_LPG
[17:18:50] [PASSED] 12.71 Xe_LPG
[17:18:50] [PASSED] 12.74 Xe_LPG+
[17:18:50] [PASSED] 20.01 Xe2_HPG
[17:18:50] [PASSED] 20.02 Xe2_HPG
[17:18:50] [PASSED] 20.04 Xe2_LPG
[17:18:50] [PASSED] 30.00 Xe3_LPG
[17:18:50] [PASSED] 30.01 Xe3_LPG
[17:18:50] [PASSED] 30.03 Xe3_LPG
[17:18:50] [PASSED] 30.04 Xe3_LPG
[17:18:50] [PASSED] 30.05 Xe3_LPG
[17:18:50] [PASSED] 35.10 Xe3p_LPG
[17:18:50] [PASSED] 35.11 Xe3p_XPC
[17:18:50] ================ [PASSED] check_graphics_ip ================
[17:18:50] ===================== check_media_ip  ======================
[17:18:50] [PASSED] 12.00 Xe_M
[17:18:50] [PASSED] 12.55 Xe_HPM
[17:18:50] [PASSED] 13.00 Xe_LPM+
[17:18:50] [PASSED] 13.01 Xe2_HPM
[17:18:50] [PASSED] 20.00 Xe2_LPM
[17:18:50] [PASSED] 30.00 Xe3_LPM
[17:18:50] [PASSED] 30.02 Xe3_LPM
[17:18:50] [PASSED] 35.00 Xe3p_LPM
[17:18:50] [PASSED] 35.03 Xe3p_HPM
[17:18:50] ================= [PASSED] check_media_ip ==================
[17:18:50] =================== check_platform_desc  ===================
[17:18:50] [PASSED] 0x9A60 (TIGERLAKE)
[17:18:50] [PASSED] 0x9A68 (TIGERLAKE)
[17:18:50] [PASSED] 0x9A70 (TIGERLAKE)
[17:18:50] [PASSED] 0x9A40 (TIGERLAKE)
[17:18:50] [PASSED] 0x9A49 (TIGERLAKE)
[17:18:50] [PASSED] 0x9A59 (TIGERLAKE)
[17:18:50] [PASSED] 0x9A78 (TIGERLAKE)
[17:18:50] [PASSED] 0x9AC0 (TIGERLAKE)
[17:18:50] [PASSED] 0x9AC9 (TIGERLAKE)
[17:18:50] [PASSED] 0x9AD9 (TIGERLAKE)
[17:18:50] [PASSED] 0x9AF8 (TIGERLAKE)
[17:18:50] [PASSED] 0x4C80 (ROCKETLAKE)
[17:18:50] [PASSED] 0x4C8A (ROCKETLAKE)
[17:18:50] [PASSED] 0x4C8B (ROCKETLAKE)
[17:18:50] [PASSED] 0x4C8C (ROCKETLAKE)
[17:18:50] [PASSED] 0x4C90 (ROCKETLAKE)
[17:18:50] [PASSED] 0x4C9A (ROCKETLAKE)
[17:18:50] [PASSED] 0x4680 (ALDERLAKE_S)
[17:18:50] [PASSED] 0x4682 (ALDERLAKE_S)
[17:18:50] [PASSED] 0x4688 (ALDERLAKE_S)
[17:18:50] [PASSED] 0x468A (ALDERLAKE_S)
[17:18:50] [PASSED] 0x468B (ALDERLAKE_S)
[17:18:50] [PASSED] 0x4690 (ALDERLAKE_S)
[17:18:50] [PASSED] 0x4692 (ALDERLAKE_S)
[17:18:50] [PASSED] 0x4693 (ALDERLAKE_S)
[17:18:50] [PASSED] 0x46A0 (ALDERLAKE_P)
[17:18:50] [PASSED] 0x46A1 (ALDERLAKE_P)
[17:18:50] [PASSED] 0x46A2 (ALDERLAKE_P)
[17:18:50] [PASSED] 0x46A3 (ALDERLAKE_P)
[17:18:50] [PASSED] 0x46A6 (ALDERLAKE_P)
[17:18:50] [PASSED] 0x46A8 (ALDERLAKE_P)
[17:18:50] [PASSED] 0x46AA (ALDERLAKE_P)
[17:18:50] [PASSED] 0x462A (ALDERLAKE_P)
[17:18:50] [PASSED] 0x4626 (ALDERLAKE_P)
[17:18:50] [PASSED] 0x4628 (ALDERLAKE_P)
[17:18:50] [PASSED] 0x46B0 (ALDERLAKE_P)
[17:18:50] [PASSED] 0x46B1 (ALDERLAKE_P)
[17:18:50] [PASSED] 0x46B2 (ALDERLAKE_P)
[17:18:50] [PASSED] 0x46B3 (ALDERLAKE_P)
[17:18:50] [PASSED] 0x46C0 (ALDERLAKE_P)
[17:18:50] [PASSED] 0x46C1 (ALDERLAKE_P)
[17:18:50] [PASSED] 0x46C2 (ALDERLAKE_P)
[17:18:50] [PASSED] 0x46C3 (ALDERLAKE_P)
[17:18:50] [PASSED] 0x46D0 (ALDERLAKE_N)
[17:18:50] [PASSED] 0x46D1 (ALDERLAKE_N)
[17:18:50] [PASSED] 0x46D2 (ALDERLAKE_N)
[17:18:50] [PASSED] 0x46D3 (ALDERLAKE_N)
[17:18:50] [PASSED] 0x46D4 (ALDERLAKE_N)
[17:18:50] [PASSED] 0xA721 (ALDERLAKE_P)
[17:18:50] [PASSED] 0xA7A1 (ALDERLAKE_P)
[17:18:50] [PASSED] 0xA7A9 (ALDERLAKE_P)
[17:18:50] [PASSED] 0xA7AC (ALDERLAKE_P)
[17:18:50] [PASSED] 0xA7AD (ALDERLAKE_P)
[17:18:50] [PASSED] 0xA720 (ALDERLAKE_P)
[17:18:50] [PASSED] 0xA7A0 (ALDERLAKE_P)
[17:18:50] [PASSED] 0xA7A8 (ALDERLAKE_P)
[17:18:50] [PASSED] 0xA7AA (ALDERLAKE_P)
[17:18:50] [PASSED] 0xA7AB (ALDERLAKE_P)
[17:18:50] [PASSED] 0xA780 (ALDERLAKE_S)
[17:18:50] [PASSED] 0xA781 (ALDERLAKE_S)
[17:18:50] [PASSED] 0xA782 (ALDERLAKE_S)
[17:18:50] [PASSED] 0xA783 (ALDERLAKE_S)
[17:18:50] [PASSED] 0xA788 (ALDERLAKE_S)
[17:18:50] [PASSED] 0xA789 (ALDERLAKE_S)
[17:18:50] [PASSED] 0xA78A (ALDERLAKE_S)
[17:18:50] [PASSED] 0xA78B (ALDERLAKE_S)
[17:18:50] [PASSED] 0x4905 (DG1)
[17:18:50] [PASSED] 0x4906 (DG1)
[17:18:50] [PASSED] 0x4907 (DG1)
[17:18:50] [PASSED] 0x4908 (DG1)
[17:18:50] [PASSED] 0x4909 (DG1)
[17:18:50] [PASSED] 0x56C0 (DG2)
[17:18:50] [PASSED] 0x56C2 (DG2)
[17:18:50] [PASSED] 0x56C1 (DG2)
[17:18:50] [PASSED] 0x7D51 (METEORLAKE)
[17:18:50] [PASSED] 0x7DD1 (METEORLAKE)
[17:18:50] [PASSED] 0x7D41 (METEORLAKE)
[17:18:50] [PASSED] 0x7D67 (METEORLAKE)
[17:18:50] [PASSED] 0xB640 (METEORLAKE)
[17:18:50] [PASSED] 0x56A0 (DG2)
[17:18:50] [PASSED] 0x56A1 (DG2)
[17:18:50] [PASSED] 0x56A2 (DG2)
[17:18:50] [PASSED] 0x56BE (DG2)
[17:18:50] [PASSED] 0x56BF (DG2)
[17:18:50] [PASSED] 0x5690 (DG2)
[17:18:50] [PASSED] 0x5691 (DG2)
[17:18:50] [PASSED] 0x5692 (DG2)
[17:18:50] [PASSED] 0x56A5 (DG2)
[17:18:50] [PASSED] 0x56A6 (DG2)
[17:18:50] [PASSED] 0x56B0 (DG2)
[17:18:50] [PASSED] 0x56B1 (DG2)
[17:18:50] [PASSED] 0x56BA (DG2)
[17:18:50] [PASSED] 0x56BB (DG2)
[17:18:50] [PASSED] 0x56BC (DG2)
[17:18:50] [PASSED] 0x56BD (DG2)
[17:18:50] [PASSED] 0x5693 (DG2)
[17:18:50] [PASSED] 0x5694 (DG2)
[17:18:50] [PASSED] 0x5695 (DG2)
[17:18:50] [PASSED] 0x56A3 (DG2)
[17:18:50] [PASSED] 0x56A4 (DG2)
[17:18:50] [PASSED] 0x56B2 (DG2)
[17:18:50] [PASSED] 0x56B3 (DG2)
[17:18:50] [PASSED] 0x5696 (DG2)
[17:18:50] [PASSED] 0x5697 (DG2)
[17:18:50] [PASSED] 0xB69 (PVC)
[17:18:50] [PASSED] 0xB6E (PVC)
[17:18:50] [PASSED] 0xBD4 (PVC)
[17:18:50] [PASSED] 0xBD5 (PVC)
[17:18:50] [PASSED] 0xBD6 (PVC)
[17:18:50] [PASSED] 0xBD7 (PVC)
[17:18:50] [PASSED] 0xBD8 (PVC)
[17:18:50] [PASSED] 0xBD9 (PVC)
[17:18:50] [PASSED] 0xBDA (PVC)
[17:18:50] [PASSED] 0xBDB (PVC)
[17:18:50] [PASSED] 0xBE0 (PVC)
[17:18:50] [PASSED] 0xBE1 (PVC)
[17:18:50] [PASSED] 0xBE5 (PVC)
[17:18:50] [PASSED] 0x7D40 (METEORLAKE)
[17:18:50] [PASSED] 0x7D45 (METEORLAKE)
[17:18:50] [PASSED] 0x7D55 (METEORLAKE)
[17:18:50] [PASSED] 0x7D60 (METEORLAKE)
[17:18:50] [PASSED] 0x7DD5 (METEORLAKE)
[17:18:50] [PASSED] 0x6420 (LUNARLAKE)
[17:18:50] [PASSED] 0x64A0 (LUNARLAKE)
[17:18:50] [PASSED] 0x64B0 (LUNARLAKE)
[17:18:50] [PASSED] 0xE202 (BATTLEMAGE)
[17:18:50] [PASSED] 0xE209 (BATTLEMAGE)
[17:18:50] [PASSED] 0xE20B (BATTLEMAGE)
[17:18:50] [PASSED] 0xE20C (BATTLEMAGE)
[17:18:50] [PASSED] 0xE20D (BATTLEMAGE)
[17:18:50] [PASSED] 0xE210 (BATTLEMAGE)
[17:18:50] [PASSED] 0xE211 (BATTLEMAGE)
[17:18:50] [PASSED] 0xE212 (BATTLEMAGE)
[17:18:50] [PASSED] 0xE216 (BATTLEMAGE)
[17:18:50] [PASSED] 0xE220 (BATTLEMAGE)
[17:18:50] [PASSED] 0xE221 (BATTLEMAGE)
[17:18:50] [PASSED] 0xE222 (BATTLEMAGE)
[17:18:50] [PASSED] 0xE223 (BATTLEMAGE)
[17:18:50] [PASSED] 0xB080 (PANTHERLAKE)
[17:18:50] [PASSED] 0xB081 (PANTHERLAKE)
[17:18:50] [PASSED] 0xB082 (PANTHERLAKE)
[17:18:50] [PASSED] 0xB083 (PANTHERLAKE)
[17:18:50] [PASSED] 0xB084 (PANTHERLAKE)
[17:18:50] [PASSED] 0xB085 (PANTHERLAKE)
[17:18:50] [PASSED] 0xB086 (PANTHERLAKE)
[17:18:50] [PASSED] 0xB087 (PANTHERLAKE)
[17:18:50] [PASSED] 0xB08F (PANTHERLAKE)
[17:18:50] [PASSED] 0xB090 (PANTHERLAKE)
[17:18:50] [PASSED] 0xB0A0 (PANTHERLAKE)
[17:18:50] [PASSED] 0xB0B0 (PANTHERLAKE)
[17:18:50] [PASSED] 0xFD80 (PANTHERLAKE)
[17:18:50] [PASSED] 0xFD81 (PANTHERLAKE)
[17:18:50] [PASSED] 0xD740 (NOVALAKE_S)
[17:18:50] [PASSED] 0xD741 (NOVALAKE_S)
[17:18:50] [PASSED] 0xD742 (NOVALAKE_S)
[17:18:50] [PASSED] 0xD743 (NOVALAKE_S)
[17:18:50] [PASSED] 0xD745 (NOVALAKE_S)
[17:18:50] [PASSED] 0xD74A (NOVALAKE_S)
[17:18:50] [PASSED] 0xD74B (NOVALAKE_S)
[17:18:50] [PASSED] 0x674C (CRESCENTISLAND)
[17:18:50] [PASSED] 0x674D (CRESCENTISLAND)
[17:18:50] [PASSED] 0x674E (CRESCENTISLAND)
[17:18:50] [PASSED] 0x674F (CRESCENTISLAND)
[17:18:50] [PASSED] 0x6750 (CRESCENTISLAND)
[17:18:50] [PASSED] 0xD750 (NOVALAKE_P)
[17:18:50] [PASSED] 0xD751 (NOVALAKE_P)
[17:18:50] [PASSED] 0xD752 (NOVALAKE_P)
[17:18:50] [PASSED] 0xD753 (NOVALAKE_P)
[17:18:50] [PASSED] 0xD754 (NOVALAKE_P)
[17:18:50] [PASSED] 0xD755 (NOVALAKE_P)
[17:18:50] [PASSED] 0xD756 (NOVALAKE_P)
[17:18:50] [PASSED] 0xD757 (NOVALAKE_P)
[17:18:50] [PASSED] 0xD75F (NOVALAKE_P)
[17:18:50] =============== [PASSED] check_platform_desc ===============
[17:18:50] ===================== [PASSED] xe_pci ======================
[17:18:50] ============= xe_rtp_tables_test (5 subtests) ==============
[17:18:50] ================== xe_rtp_table_gt_test  ===================
[17:18:50] [PASSED] gt_was/14011060649
[17:18:50] [PASSED] gt_was/14011059788
[17:18:50] [PASSED] gt_was/14015795083
[17:18:50] [PASSED] gt_was/16021867713
[17:18:50] [PASSED] gt_was/14019449301
[17:18:50] [PASSED] gt_was/16028005424
[17:18:50] [PASSED] gt_was/14026578760
[17:18:50] [PASSED] gt_was/1409420604
[17:18:50] [PASSED] gt_was/1408615072
[17:18:50] [PASSED] gt_was/22010523718
[17:18:50] [PASSED] gt_was/14011006942
[17:18:50] [PASSED] gt_was/14014830051
[17:18:50] [PASSED] gt_was/18018781329
[17:18:50] [PASSED] gt_was/1509235366
[17:18:50] [PASSED] gt_was/18018781329
[17:18:50] [PASSED] gt_was/16016694945
[17:18:50] [PASSED] gt_was/14018575942
[17:18:50] [PASSED] gt_was/22016670082
[17:18:50] [PASSED] gt_was/22016670082
[17:18:50] [PASSED] gt_was/14017421178
[17:18:50] [PASSED] gt_was/16025250150
[17:18:50] [PASSED] gt_was/14021871409
[17:18:50] [PASSED] gt_was/16021865536
[17:18:50] [PASSED] gt_was/14021486841
[17:18:50] [PASSED] gt_was/14025160223
[17:18:50] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[17:18:50] [PASSED] gt_was/14025635424
[17:18:50] [PASSED] gt_was/16028005424
[17:18:50] ============== [PASSED] xe_rtp_table_gt_test ===============
[17:18:50] ================== xe_rtp_table_gt_test  ===================
[17:18:50] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[17:18:50] [PASSED] gt_tunings/Tuning: 32B Access Enable
[17:18:50] [PASSED] gt_tunings/Tuning: L3 cache
[17:18:50] [PASSED] gt_tunings/Tuning: L3 cache - media
[17:18:50] [PASSED] gt_tunings/Tuning: Compression Overfetch
[17:18:50] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[17:18:50] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[17:18:50] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[17:18:50] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[17:18:50] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[17:18:50] [PASSED] gt_tunings/Tuning: Stateless compression control
[17:18:50] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[17:18:50] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[17:18:50] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[17:18:50] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[17:18:50] ============== [PASSED] xe_rtp_table_gt_test ===============
[17:18:50] ================== xe_rtp_table_oob_test  ==================
[17:18:50] [PASSED] oob_was/1607983814
[17:18:50] [PASSED] oob_was/16010904313
[17:18:50] [PASSED] oob_was/18022495364
[17:18:50] [PASSED] oob_was/22012773006
[17:18:50] [PASSED] oob_was/14014475959
[17:18:50] [PASSED] oob_was/22011391025
[17:18:50] [PASSED] oob_was/22012727170
[17:18:50] [PASSED] oob_was/22012727685
[17:18:50] [PASSED] oob_was/22016596838
[17:18:50] [PASSED] oob_was/18020744125
[17:18:50] [PASSED] oob_was/1409600907
[17:18:50] [PASSED] oob_was/22014953428
[17:18:50] [PASSED] oob_was/16017236439
[17:18:50] [PASSED] oob_was/14019821291
[17:18:50] [PASSED] oob_was/14015076503
[17:18:50] [PASSED] oob_was/14018913170
[17:18:50] [PASSED] oob_was/14018094691
[17:18:50] [PASSED] oob_was/18024947630
[17:18:50] [PASSED] oob_was/16022287689
[17:18:50] [PASSED] oob_was/13011645652
[17:18:50] [PASSED] oob_was/14022293748
[17:18:50] [PASSED] oob_was/22019794406
[17:18:50] [PASSED] oob_was/22019338487
[17:18:50] [PASSED] oob_was/16023588340
[17:18:50] [PASSED] oob_was/14019789679
[17:18:50] [PASSED] oob_was/14022866841
[17:18:50] [PASSED] oob_was/16021333562
[17:18:50] [PASSED] oob_was/14016712196
[17:18:50] [PASSED] oob_was/14015568240
[17:18:50] [PASSED] oob_was/18013179988
[17:18:50] [PASSED] oob_was/1508761755
[17:18:50] [PASSED] oob_was/16023105232
[17:18:50] [PASSED] oob_was/16026508708
[17:18:50] [PASSED] oob_was/14020001231
[17:18:50] [PASSED] oob_was/16023683509
[17:18:50] [PASSED] oob_was/14025515070
[17:18:50] [PASSED] oob_was/15015404425_disable
[17:18:50] [PASSED] oob_was/16026007364
[17:18:50] [PASSED] oob_was/14020316580
[17:18:50] [PASSED] oob_was/14025883347
[17:18:50] [PASSED] oob_was/16029380221
[17:18:50] ============== [PASSED] xe_rtp_table_oob_test ==============
[17:18:50] ================ xe_rtp_table_dev_oob_test  ================
[17:18:50] [PASSED] device_oob_was/22010954014
[17:18:50] [PASSED] device_oob_was/15015404425
[17:18:50] [PASSED] device_oob_was/22019338487_display
[17:18:50] [PASSED] device_oob_was/14022085890
[17:18:50] [PASSED] device_oob_was/14026539277
[17:18:50] [PASSED] device_oob_was/14026633728
[17:18:50] [PASSED] device_oob_was/14026746987
[17:18:50] [PASSED] device_oob_was/14026779378
[17:18:50] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[17:18:50] ========== xe_rtp_table_missing_upper_bound_test  ==========
[17:18:50] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[17:18:50] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[17:18:50] [PASSED] register_whitelist/1806527549
[17:18:50] [PASSED] register_whitelist/allow_read_ctx_timestamp
[17:18:50] [PASSED] register_whitelist/allow_read_queue_timestamp
[17:18:50] [PASSED] register_whitelist/16014440446
[17:18:50] [PASSED] register_whitelist/16017236439
[17:18:50] [PASSED] register_whitelist/16020183090
[17:18:50] [PASSED] register_whitelist/14024997852
[17:18:50] [PASSED] register_whitelist/14024997852
[17:18:50] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[17:18:50] =============== [PASSED] xe_rtp_tables_test ================
[17:18:50] =================== xe_rtp (3 subtests) ====================
[17:18:50] =================== xe_rtp_rules_tests  ====================
[17:18:50] [PASSED] no
[17:18:50] [PASSED] yes
[17:18:50] [PASSED] no-and-no
[17:18:50] [PASSED] no-and-yes
[17:18:50] [PASSED] yes-and-no
[17:18:50] [PASSED] yes-and-yes
[17:18:50] [PASSED] no-or-no
[17:18:50] [PASSED] no-or-yes
[17:18:50] [PASSED] yes-or-no
[17:18:50] [PASSED] yes-or-yes
[17:18:50] [PASSED] no-yes-or-yes-no
[17:18:50] [PASSED] no-yes-or-yes-yes
[17:18:50] [PASSED] yes-yes-or-no-yes
[17:18:50] [PASSED] yes-yes-or-yes-yes
[17:18:50] [PASSED] no-no-or-yes-or-no
[17:18:50] [PASSED] or
[17:18:50] [PASSED] or-yes
[17:18:50] [PASSED] or-no
[17:18:50] [PASSED] yes-or
[17:18:50] [PASSED] no-or
[17:18:50] [PASSED] no-or-or-yes
[17:18:50] [PASSED] yes-or-or-no
[17:18:50] [PASSED] no-or-or-no
[17:18:50] [PASSED] missing-context-engine-class
[17:18:50] [PASSED] missing-context-engine-class-or-yes
[17:18:50] [PASSED] missing-context-engine-class-or-or-yes
[17:18:50] =============== [PASSED] xe_rtp_rules_tests ================
[17:18:50] =============== xe_rtp_process_to_sr_tests  ================
[17:18:50] [PASSED] coalesce-same-reg
[17:18:50] [PASSED] coalesce-same-reg-literal-and-func
[17:18:50] [PASSED] no-match-no-add
[17:18:50] [PASSED] two-regs-two-entries
[17:18:50] [PASSED] clr-one-set-other
[17:18:50] [PASSED] set-field
[17:18:50] [PASSED] conflict-duplicate
[17:18:50] [PASSED] conflict-not-disjoint
[17:18:50] [PASSED] conflict-not-disjoint-literal-and-func
[17:18:50] [PASSED] conflict-reg-type
[17:18:50] [PASSED] bad-mcr-reg-forced-to-regular
[17:18:50] [PASSED] bad-regular-reg-forced-to-mcr
[17:18:50] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[17:18:50] ================== xe_rtp_process_tests  ===================
[17:18:50] [PASSED] active1
[17:18:50] [PASSED] active2
[17:18:50] [PASSED] active-inactive
[17:18:50] [PASSED] inactive-active
[17:18:50] [PASSED] inactive-active-inactive
[17:18:50] [PASSED] inactive-inactive-inactive
[17:18:50] ============== [PASSED] xe_rtp_process_tests ===============
[17:18:50] ===================== [PASSED] xe_rtp ======================
[17:18:50] ==================== xe_wa (1 subtest) =====================
[17:18:50] ======================== xe_wa_gt  =========================
[17:18:50] [PASSED] TIGERLAKE B0
[17:18:50] [PASSED] DG1 A0
[17:18:50] [PASSED] DG1 B0
[17:18:50] [PASSED] ALDERLAKE_S A0
[17:18:50] [PASSED] ALDERLAKE_S B0
[17:18:50] [PASSED] ALDERLAKE_S C0
[17:18:50] [PASSED] ALDERLAKE_S D0
[17:18:50] [PASSED] ALDERLAKE_P A0
[17:18:50] [PASSED] ALDERLAKE_P B0
[17:18:50] [PASSED] ALDERLAKE_P C0
[17:18:50] [PASSED] ALDERLAKE_S RPLS D0
[17:18:50] [PASSED] ALDERLAKE_P RPLU E0
[17:18:50] [PASSED] DG2 G10 C0
[17:18:50] [PASSED] DG2 G11 B1
[17:18:50] [PASSED] DG2 G12 A1
[17:18:50] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[17:18:50] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[17:18:50] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[17:18:50] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[17:18:50] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[17:18:50] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[17:18:50] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[17:18:50] ==================== [PASSED] xe_wa_gt =====================
[17:18:50] ====================== [PASSED] xe_wa ======================
[17:18:50] ============================================================
[17:18:50] Testing complete. Ran 729 tests: passed: 711, skipped: 18
[17:18:50] Elapsed time: 37.065s total, 4.338s configuring, 32.059s building, 0.649s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[17:18:50] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[17:18:52] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[17:19:17] Starting KUnit Kernel (1/1)...
[17:19:17] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[17:19:17] ============ drm_test_pick_cmdline (2 subtests) ============
[17:19:17] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[17:19:17] =============== drm_test_pick_cmdline_named  ===============
[17:19:17] [PASSED] NTSC
[17:19:17] [PASSED] NTSC-J
[17:19:17] [PASSED] PAL
[17:19:17] [PASSED] PAL-M
[17:19:17] =========== [PASSED] drm_test_pick_cmdline_named ===========
[17:19:17] ============== [PASSED] drm_test_pick_cmdline ==============
[17:19:17] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[17:19:17] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[17:19:17] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[17:19:17] =========== drm_validate_clone_mode (2 subtests) ===========
[17:19:17] ============== drm_test_check_in_clone_mode  ===============
[17:19:17] [PASSED] in_clone_mode
[17:19:17] [PASSED] not_in_clone_mode
[17:19:17] ========== [PASSED] drm_test_check_in_clone_mode ===========
[17:19:17] =============== drm_test_check_valid_clones  ===============
[17:19:17] [PASSED] not_in_clone_mode
[17:19:17] [PASSED] valid_clone
[17:19:17] [PASSED] invalid_clone
[17:19:17] =========== [PASSED] drm_test_check_valid_clones ===========
[17:19:17] ============= [PASSED] drm_validate_clone_mode =============
[17:19:17] ============= drm_validate_modeset (1 subtest) =============
[17:19:17] [PASSED] drm_test_check_connector_changed_modeset
[17:19:17] ============== [PASSED] drm_validate_modeset ===============
[17:19:17] ====== drm_test_bridge_get_current_state (2 subtests) ======
[17:19:17] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[17:19:17] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[17:19:17] ======== [PASSED] drm_test_bridge_get_current_state ========
[17:19:17] ====== drm_test_bridge_helper_reset_crtc (4 subtests) ======
[17:19:17] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[17:19:17] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[17:19:17] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[17:19:17] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[17:19:17] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[17:19:17] ============== drm_bridge_alloc (2 subtests) ===============
[17:19:17] [PASSED] drm_test_drm_bridge_alloc_basic
[17:19:17] [PASSED] drm_test_drm_bridge_alloc_get_put
[17:19:17] ================ [PASSED] drm_bridge_alloc =================
[17:19:17] ============= drm_bridge_bus_fmt (5 subtests) ==============
[17:19:17] [PASSED] drm_test_bridge_rgb_yuv_rgb
[17:19:17] [PASSED] drm_test_bridge_must_convert_to_yuv444
[17:19:17] [PASSED] drm_test_bridge_hdmi_auto_rgb
[17:19:17] [PASSED] drm_test_bridge_auto_first
[17:19:17] [PASSED] drm_test_bridge_rgb_yuv_no_path
[17:19:17] =============== [PASSED] drm_bridge_bus_fmt ================
[17:19:17] ============= drm_cmdline_parser (40 subtests) =============
[17:19:17] [PASSED] drm_test_cmdline_force_d_only
[17:19:17] [PASSED] drm_test_cmdline_force_D_only_dvi
[17:19:17] [PASSED] drm_test_cmdline_force_D_only_hdmi
[17:19:17] [PASSED] drm_test_cmdline_force_D_only_not_digital
[17:19:17] [PASSED] drm_test_cmdline_force_e_only
[17:19:17] [PASSED] drm_test_cmdline_res
[17:19:17] [PASSED] drm_test_cmdline_res_vesa
[17:19:17] [PASSED] drm_test_cmdline_res_vesa_rblank
[17:19:17] [PASSED] drm_test_cmdline_res_rblank
[17:19:17] [PASSED] drm_test_cmdline_res_bpp
[17:19:17] [PASSED] drm_test_cmdline_res_refresh
[17:19:17] [PASSED] drm_test_cmdline_res_bpp_refresh
[17:19:17] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[17:19:17] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[17:19:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[17:19:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[17:19:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[17:19:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[17:19:17] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[17:19:17] [PASSED] drm_test_cmdline_res_margins_force_on
[17:19:17] [PASSED] drm_test_cmdline_res_vesa_margins
[17:19:17] [PASSED] drm_test_cmdline_name
[17:19:17] [PASSED] drm_test_cmdline_name_bpp
[17:19:17] [PASSED] drm_test_cmdline_name_option
[17:19:17] [PASSED] drm_test_cmdline_name_bpp_option
[17:19:17] [PASSED] drm_test_cmdline_rotate_0
[17:19:17] [PASSED] drm_test_cmdline_rotate_90
[17:19:17] [PASSED] drm_test_cmdline_rotate_180
[17:19:17] [PASSED] drm_test_cmdline_rotate_270
[17:19:17] [PASSED] drm_test_cmdline_hmirror
[17:19:17] [PASSED] drm_test_cmdline_vmirror
[17:19:17] [PASSED] drm_test_cmdline_margin_options
[17:19:17] [PASSED] drm_test_cmdline_multiple_options
[17:19:17] [PASSED] drm_test_cmdline_bpp_extra_and_option
[17:19:17] [PASSED] drm_test_cmdline_extra_and_option
[17:19:17] [PASSED] drm_test_cmdline_freestanding_options
[17:19:17] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[17:19:17] [PASSED] drm_test_cmdline_panel_orientation
[17:19:17] ================ drm_test_cmdline_invalid  =================
[17:19:17] [PASSED] margin_only
[17:19:17] [PASSED] interlace_only
[17:19:17] [PASSED] res_missing_x
[17:19:17] [PASSED] res_missing_y
[17:19:17] [PASSED] res_bad_y
[17:19:17] [PASSED] res_missing_y_bpp
[17:19:17] [PASSED] res_bad_bpp
[17:19:17] [PASSED] res_bad_refresh
[17:19:17] [PASSED] res_bpp_refresh_force_on_off
[17:19:17] [PASSED] res_invalid_mode
[17:19:17] [PASSED] res_bpp_wrong_place_mode
[17:19:17] [PASSED] name_bpp_refresh
[17:19:17] [PASSED] name_refresh
[17:19:17] [PASSED] name_refresh_wrong_mode
[17:19:17] [PASSED] name_refresh_invalid_mode
[17:19:17] [PASSED] rotate_multiple
[17:19:17] [PASSED] rotate_invalid_val
[17:19:17] [PASSED] rotate_truncated
[17:19:17] [PASSED] invalid_option
[17:19:17] [PASSED] invalid_tv_option
[17:19:17] [PASSED] truncated_tv_option
[17:19:17] ============ [PASSED] drm_test_cmdline_invalid =============
[17:19:17] =============== drm_test_cmdline_tv_options  ===============
[17:19:17] [PASSED] NTSC
[17:19:17] [PASSED] NTSC_443
[17:19:17] [PASSED] NTSC_J
[17:19:17] [PASSED] PAL
[17:19:17] [PASSED] PAL_M
[17:19:17] [PASSED] PAL_N
[17:19:17] [PASSED] SECAM
[17:19:17] [PASSED] MONO_525
[17:19:17] [PASSED] MONO_625
[17:19:17] =========== [PASSED] drm_test_cmdline_tv_options ===========
[17:19:17] =============== [PASSED] drm_cmdline_parser ================
[17:19:17] ========== drmm_connector_hdmi_init (20 subtests) ==========
[17:19:17] [PASSED] drm_test_connector_hdmi_init_valid
[17:19:17] [PASSED] drm_test_connector_hdmi_init_bpc_8
[17:19:17] [PASSED] drm_test_connector_hdmi_init_bpc_10
[17:19:17] [PASSED] drm_test_connector_hdmi_init_bpc_12
[17:19:17] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[17:19:17] [PASSED] drm_test_connector_hdmi_init_bpc_null
[17:19:17] [PASSED] drm_test_connector_hdmi_init_formats_empty
[17:19:17] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[17:19:17] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[17:19:17] [PASSED] supported_formats=0x9 yuv420_allowed=1
[17:19:17] [PASSED] supported_formats=0x9 yuv420_allowed=0
[17:19:17] [PASSED] supported_formats=0x5 yuv420_allowed=1
[17:19:17] [PASSED] supported_formats=0x5 yuv420_allowed=0
[17:19:17] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[17:19:17] [PASSED] drm_test_connector_hdmi_init_null_ddc
[17:19:17] [PASSED] drm_test_connector_hdmi_init_null_product
[17:19:17] [PASSED] drm_test_connector_hdmi_init_null_vendor
[17:19:17] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[17:19:17] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[17:19:17] [PASSED] drm_test_connector_hdmi_init_product_valid
[17:19:17] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[17:19:17] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[17:19:17] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[17:19:17] ========= drm_test_connector_hdmi_init_type_valid  =========
[17:19:17] [PASSED] HDMI-A
[17:19:17] [PASSED] HDMI-B
[17:19:17] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[17:19:17] ======== drm_test_connector_hdmi_init_type_invalid  ========
[17:19:17] [PASSED] Unknown
[17:19:17] [PASSED] VGA
[17:19:17] [PASSED] DVI-I
[17:19:17] [PASSED] DVI-D
[17:19:17] [PASSED] DVI-A
[17:19:17] [PASSED] Composite
[17:19:17] [PASSED] SVIDEO
[17:19:17] [PASSED] LVDS
[17:19:17] [PASSED] Component
[17:19:17] [PASSED] DIN
[17:19:17] [PASSED] DP
[17:19:17] [PASSED] TV
[17:19:17] [PASSED] eDP
[17:19:17] [PASSED] Virtual
[17:19:17] [PASSED] DSI
[17:19:17] [PASSED] DPI
[17:19:17] [PASSED] Writeback
[17:19:17] [PASSED] SPI
[17:19:17] [PASSED] USB
[17:19:17] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[17:19:17] ============ [PASSED] drmm_connector_hdmi_init =============
[17:19:17] ============= drmm_connector_init (3 subtests) =============
[17:19:17] [PASSED] drm_test_drmm_connector_init
[17:19:17] [PASSED] drm_test_drmm_connector_init_null_ddc
[17:19:17] ========= drm_test_drmm_connector_init_type_valid  =========
[17:19:17] [PASSED] Unknown
[17:19:17] [PASSED] VGA
[17:19:17] [PASSED] DVI-I
[17:19:17] [PASSED] DVI-D
[17:19:17] [PASSED] DVI-A
[17:19:17] [PASSED] Composite
[17:19:17] [PASSED] SVIDEO
[17:19:17] [PASSED] LVDS
[17:19:17] [PASSED] Component
[17:19:17] [PASSED] DIN
[17:19:17] [PASSED] DP
[17:19:17] [PASSED] HDMI-A
[17:19:17] [PASSED] HDMI-B
[17:19:17] [PASSED] TV
[17:19:17] [PASSED] eDP
[17:19:17] [PASSED] Virtual
[17:19:17] [PASSED] DSI
[17:19:17] [PASSED] DPI
[17:19:17] [PASSED] Writeback
[17:19:17] [PASSED] SPI
[17:19:17] [PASSED] USB
[17:19:17] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[17:19:17] =============== [PASSED] drmm_connector_init ===============
[17:19:17] ========= drm_connector_dynamic_init (6 subtests) ==========
[17:19:17] [PASSED] drm_test_drm_connector_dynamic_init
[17:19:17] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[17:19:17] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[17:19:17] [PASSED] drm_test_drm_connector_dynamic_init_properties
[17:19:17] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[17:19:17] [PASSED] Unknown
[17:19:17] [PASSED] VGA
[17:19:17] [PASSED] DVI-I
[17:19:17] [PASSED] DVI-D
[17:19:17] [PASSED] DVI-A
[17:19:17] [PASSED] Composite
[17:19:17] [PASSED] SVIDEO
[17:19:17] [PASSED] LVDS
[17:19:17] [PASSED] Component
[17:19:17] [PASSED] DIN
[17:19:17] [PASSED] DP
[17:19:17] [PASSED] HDMI-A
[17:19:17] [PASSED] HDMI-B
[17:19:17] [PASSED] TV
[17:19:17] [PASSED] eDP
[17:19:17] [PASSED] Virtual
[17:19:17] [PASSED] DSI
[17:19:17] [PASSED] DPI
[17:19:17] [PASSED] Writeback
[17:19:17] [PASSED] SPI
[17:19:17] [PASSED] USB
[17:19:17] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[17:19:17] ======== drm_test_drm_connector_dynamic_init_name  =========
[17:19:17] [PASSED] Unknown
[17:19:17] [PASSED] VGA
[17:19:17] [PASSED] DVI-I
[17:19:17] [PASSED] DVI-D
[17:19:17] [PASSED] DVI-A
[17:19:17] [PASSED] Composite
[17:19:17] [PASSED] SVIDEO
[17:19:17] [PASSED] LVDS
[17:19:17] [PASSED] Component
[17:19:17] [PASSED] DIN
[17:19:17] [PASSED] DP
[17:19:17] [PASSED] HDMI-A
[17:19:17] [PASSED] HDMI-B
[17:19:17] [PASSED] TV
[17:19:17] [PASSED] eDP
[17:19:17] [PASSED] Virtual
[17:19:17] [PASSED] DSI
[17:19:17] [PASSED] DPI
[17:19:17] [PASSED] Writeback
[17:19:17] [PASSED] SPI
[17:19:17] [PASSED] USB
[17:19:17] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[17:19:17] =========== [PASSED] drm_connector_dynamic_init ============
[17:19:17] ==== drm_connector_dynamic_register_early (4 subtests) =====
[17:19:17] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[17:19:17] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[17:19:17] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[17:19:17] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[17:19:17] ====== [PASSED] drm_connector_dynamic_register_early =======
[17:19:17] ======= drm_connector_dynamic_register (7 subtests) ========
[17:19:17] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[17:19:17] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[17:19:17] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[17:19:17] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[17:19:17] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[17:19:17] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[17:19:17] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[17:19:17] ========= [PASSED] drm_connector_dynamic_register ==========
[17:19:17] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[17:19:17] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[17:19:17] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[17:19:17] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[17:19:17] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[17:19:17] ========== drm_test_get_tv_mode_from_name_valid  ===========
[17:19:17] [PASSED] NTSC
[17:19:17] [PASSED] NTSC-443
[17:19:17] [PASSED] NTSC-J
[17:19:17] [PASSED] PAL
[17:19:17] [PASSED] PAL-M
[17:19:17] [PASSED] PAL-N
[17:19:17] [PASSED] SECAM
[17:19:17] [PASSED] Mono
[17:19:17] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[17:19:17] [PASSED] drm_test_get_tv_mode_from_name_truncated
[17:19:17] ============ [PASSED] drm_get_tv_mode_from_name ============
[17:19:17] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[17:19:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[17:19:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[17:19:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[17:19:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[17:19:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[17:19:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[17:19:17] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[17:19:17] [PASSED] VIC 96
[17:19:17] [PASSED] VIC 97
[17:19:17] [PASSED] VIC 101
[17:19:17] [PASSED] VIC 102
[17:19:17] [PASSED] VIC 106
[17:19:17] [PASSED] VIC 107
[17:19:17] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[17:19:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[17:19:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[17:19:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[17:19:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[17:19:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[17:19:17] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[17:19:17] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[17:19:17] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[17:19:17] [PASSED] Automatic
[17:19:17] [PASSED] Full
[17:19:17] [PASSED] Limited 16:235
[17:19:17] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[17:19:17] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[17:19:17] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[17:19:17] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[17:19:17] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[17:19:17] [PASSED] RGB
[17:19:17] [PASSED] YUV 4:2:0
[17:19:17] [PASSED] YUV 4:2:2
[17:19:17] [PASSED] YUV 4:4:4
[17:19:17] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[17:19:17] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[17:19:17] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[17:19:17] ============= drm_damage_helper (21 subtests) ==============
[17:19:17] [PASSED] drm_test_damage_iter_no_damage
[17:19:17] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[17:19:17] [PASSED] drm_test_damage_iter_no_damage_src_moved
[17:19:17] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[17:19:17] [PASSED] drm_test_damage_iter_no_damage_not_visible
[17:19:17] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[17:19:17] [PASSED] drm_test_damage_iter_no_damage_no_fb
[17:19:17] [PASSED] drm_test_damage_iter_simple_damage
[17:19:17] [PASSED] drm_test_damage_iter_single_damage
[17:19:17] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[17:19:17] [PASSED] drm_test_damage_iter_single_damage_outside_src
[17:19:17] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[17:19:17] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[17:19:17] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[17:19:17] [PASSED] drm_test_damage_iter_single_damage_src_moved
[17:19:17] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[17:19:17] [PASSED] drm_test_damage_iter_damage
[17:19:17] [PASSED] drm_test_damage_iter_damage_one_intersect
[17:19:17] [PASSED] drm_test_damage_iter_damage_one_outside
[17:19:17] [PASSED] drm_test_damage_iter_damage_src_moved
[17:19:17] [PASSED] drm_test_damage_iter_damage_not_visible
[17:19:17] ================ [PASSED] drm_damage_helper ================
[17:19:17] ============== drm_dp_mst_helper (3 subtests) ==============
[17:19:17] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[17:19:17] [PASSED] Clock 154000 BPP 30 DSC disabled
[17:19:17] [PASSED] Clock 234000 BPP 30 DSC disabled
[17:19:17] [PASSED] Clock 297000 BPP 24 DSC disabled
[17:19:17] [PASSED] Clock 332880 BPP 24 DSC enabled
[17:19:17] [PASSED] Clock 324540 BPP 24 DSC enabled
[17:19:17] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[17:19:17] ============== drm_test_dp_mst_calc_pbn_div  ===============
[17:19:17] [PASSED] Link rate 2000000 lane count 4
[17:19:17] [PASSED] Link rate 2000000 lane count 2
[17:19:17] [PASSED] Link rate 2000000 lane count 1
[17:19:17] [PASSED] Link rate 1350000 lane count 4
[17:19:17] [PASSED] Link rate 1350000 lane count 2
[17:19:17] [PASSED] Link rate 1350000 lane count 1
[17:19:17] [PASSED] Link rate 1000000 lane count 4
[17:19:17] [PASSED] Link rate 1000000 lane count 2
[17:19:17] [PASSED] Link rate 1000000 lane count 1
[17:19:17] [PASSED] Link rate 810000 lane count 4
[17:19:17] [PASSED] Link rate 810000 lane count 2
[17:19:17] [PASSED] Link rate 810000 lane count 1
[17:19:17] [PASSED] Link rate 540000 lane count 4
[17:19:17] [PASSED] Link rate 540000 lane count 2
[17:19:17] [PASSED] Link rate 540000 lane count 1
[17:19:17] [PASSED] Link rate 270000 lane count 4
[17:19:17] [PASSED] Link rate 270000 lane count 2
[17:19:17] [PASSED] Link rate 270000 lane count 1
[17:19:17] [PASSED] Link rate 162000 lane count 4
[17:19:17] [PASSED] Link rate 162000 lane count 2
[17:19:17] [PASSED] Link rate 162000 lane count 1
[17:19:17] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[17:19:17] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[17:19:17] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[17:19:17] [PASSED] DP_POWER_UP_PHY with port number
[17:19:17] [PASSED] DP_POWER_DOWN_PHY with port number
[17:19:17] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[17:19:17] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[17:19:17] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[17:19:17] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[17:19:17] [PASSED] DP_QUERY_PAYLOAD with port number
[17:19:17] [PASSED] DP_QUERY_PAYLOAD with VCPI
[17:19:17] [PASSED] DP_REMOTE_DPCD_READ with port number
[17:19:17] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[17:19:17] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[17:19:17] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[17:19:17] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[17:19:17] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[17:19:17] [PASSED] DP_REMOTE_I2C_READ with port number
[17:19:17] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[17:19:17] [PASSED] DP_REMOTE_I2C_READ with transactions array
[17:19:17] [PASSED] DP_REMOTE_I2C_WRITE with port number
[17:19:17] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[17:19:17] [PASSED] DP_REMOTE_I2C_WRITE with data array
[17:19:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[17:19:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[17:19:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[17:19:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[17:19:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[17:19:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[17:19:17] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[17:19:17] ================ [PASSED] drm_dp_mst_helper ================
[17:19:17] ================== drm_exec (7 subtests) ===================
[17:19:17] [PASSED] sanitycheck
[17:19:17] [PASSED] test_lock
[17:19:17] [PASSED] test_lock_unlock
[17:19:17] [PASSED] test_duplicates
[17:19:17] [PASSED] test_prepare
[17:19:17] [PASSED] test_prepare_array
[17:19:17] [PASSED] test_multiple_loops
[17:19:17] ==================== [PASSED] drm_exec =====================
[17:19:17] =========== drm_format_helper_test (17 subtests) ===========
[17:19:17] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[17:19:17] [PASSED] single_pixel_source_buffer
[17:19:17] [PASSED] single_pixel_clip_rectangle
[17:19:17] [PASSED] well_known_colors
[17:19:17] [PASSED] destination_pitch
[17:19:17] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[17:19:17] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[17:19:17] [PASSED] single_pixel_source_buffer
[17:19:17] [PASSED] single_pixel_clip_rectangle
[17:19:17] [PASSED] well_known_colors
[17:19:17] [PASSED] destination_pitch
[17:19:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[17:19:17] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[17:19:17] [PASSED] single_pixel_source_buffer
[17:19:17] [PASSED] single_pixel_clip_rectangle
[17:19:17] [PASSED] well_known_colors
[17:19:17] [PASSED] destination_pitch
[17:19:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[17:19:17] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[17:19:17] [PASSED] single_pixel_source_buffer
[17:19:17] [PASSED] single_pixel_clip_rectangle
[17:19:17] [PASSED] well_known_colors
[17:19:17] [PASSED] destination_pitch
[17:19:17] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[17:19:17] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[17:19:17] [PASSED] single_pixel_source_buffer
[17:19:17] [PASSED] single_pixel_clip_rectangle
[17:19:17] [PASSED] well_known_colors
[17:19:17] [PASSED] destination_pitch
[17:19:17] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[17:19:17] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[17:19:17] [PASSED] single_pixel_source_buffer
[17:19:17] [PASSED] single_pixel_clip_rectangle
[17:19:17] [PASSED] well_known_colors
[17:19:17] [PASSED] destination_pitch
[17:19:17] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[17:19:17] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[17:19:17] [PASSED] single_pixel_source_buffer
[17:19:17] [PASSED] single_pixel_clip_rectangle
[17:19:17] [PASSED] well_known_colors
[17:19:17] [PASSED] destination_pitch
[17:19:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[17:19:17] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[17:19:17] [PASSED] single_pixel_source_buffer
[17:19:17] [PASSED] single_pixel_clip_rectangle
[17:19:17] [PASSED] well_known_colors
[17:19:17] [PASSED] destination_pitch
[17:19:17] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[17:19:17] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[17:19:17] [PASSED] single_pixel_source_buffer
[17:19:17] [PASSED] single_pixel_clip_rectangle
[17:19:17] [PASSED] well_known_colors
[17:19:17] [PASSED] destination_pitch
[17:19:17] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[17:19:17] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[17:19:17] [PASSED] single_pixel_source_buffer
[17:19:17] [PASSED] single_pixel_clip_rectangle
[17:19:17] [PASSED] well_known_colors
[17:19:17] [PASSED] destination_pitch
[17:19:17] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[17:19:17] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[17:19:17] [PASSED] single_pixel_source_buffer
[17:19:17] [PASSED] single_pixel_clip_rectangle
[17:19:17] [PASSED] well_known_colors
[17:19:17] [PASSED] destination_pitch
[17:19:17] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[17:19:17] ============== drm_test_fb_xrgb8888_to_mono  ===============
[17:19:17] [PASSED] single_pixel_source_buffer
[17:19:17] [PASSED] single_pixel_clip_rectangle
[17:19:17] [PASSED] well_known_colors
[17:19:17] [PASSED] destination_pitch
[17:19:17] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[17:19:17] ==================== drm_test_fb_swab  =====================
[17:19:17] [PASSED] single_pixel_source_buffer
[17:19:17] [PASSED] single_pixel_clip_rectangle
[17:19:17] [PASSED] well_known_colors
[17:19:17] [PASSED] destination_pitch
[17:19:17] ================ [PASSED] drm_test_fb_swab =================
[17:19:17] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[17:19:17] [PASSED] single_pixel_source_buffer
[17:19:17] [PASSED] single_pixel_clip_rectangle
[17:19:17] [PASSED] well_known_colors
[17:19:17] [PASSED] destination_pitch
[17:19:17] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[17:19:17] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[17:19:17] [PASSED] single_pixel_source_buffer
[17:19:17] [PASSED] single_pixel_clip_rectangle
[17:19:17] [PASSED] well_known_colors
[17:19:17] [PASSED] destination_pitch
[17:19:17] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[17:19:17] ================= drm_test_fb_clip_offset  =================
[17:19:17] [PASSED] pass through
[17:19:17] [PASSED] horizontal offset
[17:19:17] [PASSED] vertical offset
[17:19:17] [PASSED] horizontal and vertical offset
[17:19:17] [PASSED] horizontal offset (custom pitch)
[17:19:17] [PASSED] vertical offset (custom pitch)
[17:19:17] [PASSED] horizontal and vertical offset (custom pitch)
[17:19:17] ============= [PASSED] drm_test_fb_clip_offset =============
[17:19:17] =================== drm_test_fb_memcpy  ====================
[17:19:17] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[17:19:17] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[17:19:17] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[17:19:17] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[17:19:17] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[17:19:17] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[17:19:17] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[17:19:17] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[17:19:17] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[17:19:17] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[17:19:17] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[17:19:17] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[17:19:17] =============== [PASSED] drm_test_fb_memcpy ================
[17:19:17] ============= [PASSED] drm_format_helper_test ==============
[17:19:17] ================= drm_format (18 subtests) =================
[17:19:17] [PASSED] drm_test_format_block_width_invalid
[17:19:17] [PASSED] drm_test_format_block_width_one_plane
[17:19:17] [PASSED] drm_test_format_block_width_two_plane
[17:19:17] [PASSED] drm_test_format_block_width_three_plane
[17:19:17] [PASSED] drm_test_format_block_width_tiled
[17:19:17] [PASSED] drm_test_format_block_height_invalid
[17:19:17] [PASSED] drm_test_format_block_height_one_plane
[17:19:17] [PASSED] drm_test_format_block_height_two_plane
[17:19:17] [PASSED] drm_test_format_block_height_three_plane
[17:19:17] [PASSED] drm_test_format_block_height_tiled
[17:19:17] [PASSED] drm_test_format_min_pitch_invalid
[17:19:17] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[17:19:17] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[17:19:17] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[17:19:17] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[17:19:17] [PASSED] drm_test_format_min_pitch_two_plane
[17:19:17] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[17:19:17] [PASSED] drm_test_format_min_pitch_tiled
[17:19:17] =================== [PASSED] drm_format ====================
[17:19:17] ============== drm_framebuffer (10 subtests) ===============
[17:19:17] ========== drm_test_framebuffer_check_src_coords  ==========
[17:19:17] [PASSED] Success: source fits into fb
[17:19:17] [PASSED] Fail: overflowing fb with x-axis coordinate
[17:19:17] [PASSED] Fail: overflowing fb with y-axis coordinate
[17:19:17] [PASSED] Fail: overflowing fb with source width
[17:19:17] [PASSED] Fail: overflowing fb with source height
[17:19:17] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[17:19:17] [PASSED] drm_test_framebuffer_cleanup
[17:19:17] =============== drm_test_framebuffer_create  ===============
[17:19:17] [PASSED] ABGR8888 normal sizes
[17:19:17] [PASSED] ABGR8888 max sizes
[17:19:17] [PASSED] ABGR8888 pitch greater than min required
[17:19:17] [PASSED] ABGR8888 pitch less than min required
[17:19:17] [PASSED] ABGR8888 Invalid width
[17:19:17] [PASSED] ABGR8888 Invalid buffer handle
[17:19:17] [PASSED] No pixel format
[17:19:17] [PASSED] ABGR8888 Width 0
[17:19:17] [PASSED] ABGR8888 Height 0
[17:19:17] [PASSED] ABGR8888 Out of bound height * pitch combination
[17:19:17] [PASSED] ABGR8888 Large buffer offset
[17:19:17] [PASSED] ABGR8888 Buffer offset for inexistent plane
[17:19:17] [PASSED] ABGR8888 Invalid flag
[17:19:17] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[17:19:17] [PASSED] ABGR8888 Valid buffer modifier
[17:19:17] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[17:19:17] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[17:19:17] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[17:19:17] [PASSED] NV12 Normal sizes
[17:19:17] [PASSED] NV12 Max sizes
[17:19:17] [PASSED] NV12 Invalid pitch
[17:19:17] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[17:19:17] [PASSED] NV12 different  modifier per-plane
[17:19:17] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[17:19:17] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[17:19:17] [PASSED] NV12 Modifier for inexistent plane
[17:19:17] [PASSED] NV12 Handle for inexistent plane
[17:19:17] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[17:19:17] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[17:19:17] [PASSED] YVU420 Normal sizes
[17:19:17] [PASSED] YVU420 Max sizes
[17:19:17] [PASSED] YVU420 Invalid pitch
[17:19:17] [PASSED] YVU420 Different pitches
[17:19:17] [PASSED] YVU420 Different buffer offsets/pitches
[17:19:17] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[17:19:17] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[17:19:17] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[17:19:17] [PASSED] YVU420 Valid modifier
[17:19:17] [PASSED] YVU420 Different modifiers per plane
[17:19:17] [PASSED] YVU420 Modifier for inexistent plane
[17:19:17] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[17:19:17] [PASSED] X0L2 Normal sizes
[17:19:17] [PASSED] X0L2 Max sizes
[17:19:17] [PASSED] X0L2 Invalid pitch
[17:19:17] [PASSED] X0L2 Pitch greater than minimum required
[17:19:17] [PASSED] X0L2 Handle for inexistent plane
[17:19:17] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[17:19:17] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[17:19:17] [PASSED] X0L2 Valid modifier
[17:19:17] [PASSED] X0L2 Modifier for inexistent plane
[17:19:17] =========== [PASSED] drm_test_framebuffer_create ===========
[17:19:17] [PASSED] drm_test_framebuffer_free
[17:19:17] [PASSED] drm_test_framebuffer_init
[17:19:17] [PASSED] drm_test_framebuffer_init_bad_format
[17:19:17] [PASSED] drm_test_framebuffer_init_dev_mismatch
[17:19:17] [PASSED] drm_test_framebuffer_lookup
[17:19:17] [PASSED] drm_test_framebuffer_lookup_inexistent
[17:19:17] [PASSED] drm_test_framebuffer_modifiers_not_supported
[17:19:17] ================= [PASSED] drm_framebuffer =================
[17:19:17] ================ drm_gem_shmem (8 subtests) ================
[17:19:17] [PASSED] drm_gem_shmem_test_obj_create
[17:19:17] [PASSED] drm_gem_shmem_test_obj_create_private
[17:19:17] [PASSED] drm_gem_shmem_test_pin_pages
[17:19:17] [PASSED] drm_gem_shmem_test_vmap
[17:19:17] [PASSED] drm_gem_shmem_test_get_sg_table
[17:19:17] [PASSED] drm_gem_shmem_test_get_pages_sgt
[17:19:17] [PASSED] drm_gem_shmem_test_madvise
[17:19:17] [PASSED] drm_gem_shmem_test_purge
[17:19:17] ================== [PASSED] drm_gem_shmem ==================
[17:19:17] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[17:19:17] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[17:19:17] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[17:19:17] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[17:19:17] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[17:19:17] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[17:19:17] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[17:19:17] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[17:19:17] [PASSED] Automatic
[17:19:17] [PASSED] Full
[17:19:17] [PASSED] Limited 16:235
[17:19:17] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[17:19:17] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[17:19:17] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[17:19:17] [PASSED] drm_test_check_disable_connector
[17:19:17] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[17:19:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[17:19:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[17:19:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[17:19:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[17:19:17] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[17:19:17] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[17:19:17] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[17:19:17] [PASSED] drm_test_check_output_bpc_dvi
[17:19:17] [PASSED] drm_test_check_output_bpc_format_vic_1
[17:19:17] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[17:19:17] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[17:19:17] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[17:19:17] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[17:19:17] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[17:19:17] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[17:19:17] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[17:19:17] ============ drm_test_check_hdmi_color_format  =============
[17:19:17] [PASSED] AUTO -> RGB
[17:19:17] [PASSED] YCBCR422 -> YUV422
[17:19:17] [PASSED] YCBCR420 -> YUV420
[17:19:17] [PASSED] YCBCR444 -> YUV444
[17:19:17] [PASSED] RGB -> RGB
[17:19:17] ======== [PASSED] drm_test_check_hdmi_color_format =========
[17:19:17] ======== drm_test_check_hdmi_color_format_420_only  ========
[17:19:17] [PASSED] RGB should fail
[17:19:17] [PASSED] YUV444 should fail
[17:19:17] [PASSED] YUV422 should fail
[17:19:17] [PASSED] YUV420 should work
[17:19:17] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[17:19:17] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[17:19:17] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[17:19:17] [PASSED] drm_test_check_broadcast_rgb_value
[17:19:17] [PASSED] drm_test_check_bpc_8_value
[17:19:17] [PASSED] drm_test_check_bpc_10_value
[17:19:17] [PASSED] drm_test_check_bpc_12_value
[17:19:17] [PASSED] drm_test_check_format_value
[17:19:17] [PASSED] drm_test_check_tmds_char_value
[17:19:17] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[17:19:17] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[17:19:17] [PASSED] drm_test_check_mode_valid
[17:19:17] [PASSED] drm_test_check_mode_valid_reject
[17:19:17] [PASSED] drm_test_check_mode_valid_reject_rate
[17:19:17] [PASSED] drm_test_check_mode_valid_reject_max_clock
[17:19:17] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[17:19:17] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[17:19:17] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[17:19:17] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[17:19:17] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[17:19:17] [PASSED] drm_test_check_infoframes
[17:19:17] [PASSED] drm_test_check_reject_avi_infoframe
[17:19:17] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[17:19:17] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[17:19:17] [PASSED] drm_test_check_reject_audio_infoframe
[17:19:17] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[17:19:17] ================= drm_managed (2 subtests) =================
[17:19:17] [PASSED] drm_test_managed_release_action
[17:19:17] [PASSED] drm_test_managed_run_action
[17:19:17] =================== [PASSED] drm_managed ===================
[17:19:17] =================== drm_mm (6 subtests) ====================
[17:19:17] [PASSED] drm_test_mm_init
[17:19:17] [PASSED] drm_test_mm_debug
[17:19:17] [PASSED] drm_test_mm_align32
[17:19:17] [PASSED] drm_test_mm_align64
[17:19:17] [PASSED] drm_test_mm_lowest
[17:19:17] [PASSED] drm_test_mm_highest
[17:19:17] ===================== [PASSED] drm_mm ======================
[17:19:17] ============= drm_modes_analog_tv (5 subtests) =============
[17:19:17] [PASSED] drm_test_modes_analog_tv_mono_576i
[17:19:17] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[17:19:17] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[17:19:17] [PASSED] drm_test_modes_analog_tv_pal_576i
[17:19:17] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[17:19:17] =============== [PASSED] drm_modes_analog_tv ===============
[17:19:17] ============== drm_plane_helper (2 subtests) ===============
[17:19:17] =============== drm_test_check_plane_state  ================
[17:19:17] [PASSED] clipping_simple
[17:19:17] [PASSED] clipping_rotate_reflect
[17:19:17] [PASSED] positioning_simple
[17:19:17] [PASSED] upscaling
[17:19:17] [PASSED] downscaling
[17:19:17] [PASSED] rounding1
[17:19:17] [PASSED] rounding2
[17:19:17] [PASSED] rounding3
[17:19:17] [PASSED] rounding4
[17:19:17] =========== [PASSED] drm_test_check_plane_state ============
[17:19:17] =========== drm_test_check_invalid_plane_state  ============
[17:19:17] [PASSED] positioning_invalid
[17:19:17] [PASSED] upscaling_invalid
[17:19:17] [PASSED] downscaling_invalid
[17:19:17] ======= [PASSED] drm_test_check_invalid_plane_state ========
[17:19:17] ================ [PASSED] drm_plane_helper =================
[17:19:17] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[17:19:17] ====== drm_test_connector_helper_tv_get_modes_check  =======
[17:19:17] [PASSED] None
[17:19:17] [PASSED] PAL
[17:19:17] [PASSED] NTSC
[17:19:17] [PASSED] Both, NTSC Default
[17:19:17] [PASSED] Both, PAL Default
[17:19:17] [PASSED] Both, NTSC Default, with PAL on command-line
[17:19:17] [PASSED] Both, PAL Default, with NTSC on command-line
[17:19:17] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[17:19:17] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[17:19:17] ================== drm_rect (9 subtests) ===================
[17:19:17] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[17:19:17] [PASSED] drm_test_rect_clip_scaled_not_clipped
[17:19:17] [PASSED] drm_test_rect_clip_scaled_clipped
[17:19:17] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[17:19:17] ================= drm_test_rect_intersect  =================
[17:19:17] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[17:19:17] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[17:19:17] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[17:19:17] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[17:19:17] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[17:19:17] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[17:19:17] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[17:19:17] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[17:19:17] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[17:19:17] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[17:19:17] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[17:19:17] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[17:19:17] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[17:19:17] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[17:19:17] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[17:19:17] ============= [PASSED] drm_test_rect_intersect =============
[17:19:17] ================ drm_test_rect_calc_hscale  ================
[17:19:17] [PASSED] normal use
[17:19:17] [PASSED] out of max range
[17:19:17] [PASSED] out of min range
[17:19:17] [PASSED] zero dst
[17:19:17] [PASSED] negative src
[17:19:17] [PASSED] negative dst
[17:19:17] ============ [PASSED] drm_test_rect_calc_hscale ============
[17:19:17] ================ drm_test_rect_calc_vscale  ================
[17:19:17] [PASSED] normal use
[17:19:17] [PASSED] out of max range
[17:19:17] [PASSED] out of min range
[17:19:17] [PASSED] zero dst
[17:19:17] [PASSED] negative src
[17:19:17] [PASSED] negative dst
[17:19:17] ============ [PASSED] drm_test_rect_calc_vscale ============
[17:19:17] ================== drm_test_rect_rotate  ===================
[17:19:17] [PASSED] reflect-x
[17:19:17] [PASSED] reflect-y
[17:19:17] [PASSED] rotate-0
[17:19:17] [PASSED] rotate-90
[17:19:17] [PASSED] rotate-180
[17:19:17] [PASSED] rotate-270
[17:19:17] ============== [PASSED] drm_test_rect_rotate ===============
[17:19:17] ================ drm_test_rect_rotate_inv  =================
[17:19:17] [PASSED] reflect-x
[17:19:17] [PASSED] reflect-y
[17:19:17] [PASSED] rotate-0
[17:19:17] [PASSED] rotate-90
[17:19:17] [PASSED] rotate-180
[17:19:17] [PASSED] rotate-270
[17:19:17] ============ [PASSED] drm_test_rect_rotate_inv =============
[17:19:17] ==================== [PASSED] drm_rect =====================
[17:19:17] ============ drm_sysfb_modeset_test (1 subtest) ============
[17:19:17] ============ drm_test_sysfb_build_fourcc_list  =============
[17:19:17] [PASSED] no native formats
[17:19:17] [PASSED] XRGB8888 as native format
[17:19:17] [PASSED] remove duplicates
[17:19:17] [PASSED] convert alpha formats
[17:19:17] [PASSED] random formats
[17:19:17] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[17:19:17] ============= [PASSED] drm_sysfb_modeset_test ==============
[17:19:17] ================== drm_fixp (2 subtests) ===================
[17:19:17] [PASSED] drm_test_int2fixp
[17:19:17] [PASSED] drm_test_sm2fixp
[17:19:17] ==================== [PASSED] drm_fixp =====================
[17:19:17] ============================================================
[17:19:17] Testing complete. Ran 639 tests: passed: 639
[17:19:17] Elapsed time: 26.683s total, 1.809s configuring, 24.707s building, 0.142s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[17:19:17] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[17:19:19] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[17:19:29] Starting KUnit Kernel (1/1)...
[17:19:29] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[17:19:29] ================= ttm_device (5 subtests) ==================
[17:19:29] [PASSED] ttm_device_init_basic
[17:19:29] [PASSED] ttm_device_init_multiple
[17:19:29] [PASSED] ttm_device_fini_basic
[17:19:29] [PASSED] ttm_device_init_no_vma_man
[17:19:29] ================== ttm_device_init_pools  ==================
[17:19:29] [PASSED] No DMA allocations, no DMA32 required
[17:19:29] [PASSED] DMA allocations, DMA32 required
[17:19:29] [PASSED] No DMA allocations, DMA32 required
[17:19:29] [PASSED] DMA allocations, no DMA32 required
[17:19:29] ============== [PASSED] ttm_device_init_pools ==============
[17:19:29] =================== [PASSED] ttm_device ====================
[17:19:29] ================== ttm_pool (8 subtests) ===================
[17:19:29] ================== ttm_pool_alloc_basic  ===================
[17:19:29] [PASSED] One page
[17:19:29] [PASSED] More than one page
[17:19:29] [PASSED] Above the allocation limit
[17:19:29] [PASSED] One page, with coherent DMA mappings enabled
[17:19:29] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[17:19:29] ============== [PASSED] ttm_pool_alloc_basic ===============
[17:19:29] ============== ttm_pool_alloc_basic_dma_addr  ==============
[17:19:29] [PASSED] One page
[17:19:29] [PASSED] More than one page
[17:19:29] [PASSED] Above the allocation limit
[17:19:29] [PASSED] One page, with coherent DMA mappings enabled
[17:19:29] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[17:19:29] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[17:19:29] [PASSED] ttm_pool_alloc_order_caching_match
[17:19:29] [PASSED] ttm_pool_alloc_caching_mismatch
[17:19:29] [PASSED] ttm_pool_alloc_order_mismatch
[17:19:29] [PASSED] ttm_pool_free_dma_alloc
[17:19:29] [PASSED] ttm_pool_free_no_dma_alloc
[17:19:29] [PASSED] ttm_pool_fini_basic
[17:19:29] ==================== [PASSED] ttm_pool =====================
[17:19:29] ================ ttm_resource (8 subtests) =================
[17:19:29] ================= ttm_resource_init_basic  =================
[17:19:29] [PASSED] Init resource in TTM_PL_SYSTEM
[17:19:29] [PASSED] Init resource in TTM_PL_VRAM
[17:19:29] [PASSED] Init resource in a private placement
[17:19:29] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[17:19:29] ============= [PASSED] ttm_resource_init_basic =============
[17:19:29] [PASSED] ttm_resource_init_pinned
[17:19:29] [PASSED] ttm_resource_fini_basic
[17:19:29] [PASSED] ttm_resource_manager_init_basic
[17:19:29] [PASSED] ttm_resource_manager_usage_basic
[17:19:29] [PASSED] ttm_resource_manager_set_used_basic
[17:19:29] [PASSED] ttm_sys_man_alloc_basic
[17:19:29] [PASSED] ttm_sys_man_free_basic
[17:19:29] ================== [PASSED] ttm_resource ===================
[17:19:29] =================== ttm_tt (15 subtests) ===================
[17:19:29] ==================== ttm_tt_init_basic  ====================
[17:19:29] [PASSED] Page-aligned size
[17:19:29] [PASSED] Extra pages requested
[17:19:29] ================ [PASSED] ttm_tt_init_basic ================
[17:19:29] [PASSED] ttm_tt_init_misaligned
[17:19:29] [PASSED] ttm_tt_fini_basic
[17:19:29] [PASSED] ttm_tt_fini_sg
[17:19:29] [PASSED] ttm_tt_fini_shmem
[17:19:29] [PASSED] ttm_tt_create_basic
[17:19:29] [PASSED] ttm_tt_create_invalid_bo_type
[17:19:29] [PASSED] ttm_tt_create_ttm_exists
[17:19:29] [PASSED] ttm_tt_create_failed
[17:19:29] [PASSED] ttm_tt_destroy_basic
[17:19:29] [PASSED] ttm_tt_populate_null_ttm
[17:19:29] [PASSED] ttm_tt_populate_populated_ttm
[17:19:29] [PASSED] ttm_tt_unpopulate_basic
[17:19:29] [PASSED] ttm_tt_unpopulate_empty_ttm
[17:19:29] [PASSED] ttm_tt_swapin_basic
[17:19:29] ===================== [PASSED] ttm_tt ======================
[17:19:29] =================== ttm_bo (14 subtests) ===================
[17:19:29] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[17:19:29] [PASSED] Cannot be interrupted and sleeps
[17:19:29] [PASSED] Cannot be interrupted, locks straight away
[17:19:29] [PASSED] Can be interrupted, sleeps
[17:19:29] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[17:19:29] [PASSED] ttm_bo_reserve_locked_no_sleep
[17:19:29] [PASSED] ttm_bo_reserve_no_wait_ticket
[17:19:29] [PASSED] ttm_bo_reserve_double_resv
[17:19:29] [PASSED] ttm_bo_reserve_interrupted
[17:19:29] [PASSED] ttm_bo_reserve_deadlock
[17:19:29] [PASSED] ttm_bo_unreserve_basic
[17:19:29] [PASSED] ttm_bo_unreserve_pinned
[17:19:29] [PASSED] ttm_bo_unreserve_bulk
[17:19:29] [PASSED] ttm_bo_fini_basic
[17:19:29] [PASSED] ttm_bo_fini_shared_resv
[17:19:29] [PASSED] ttm_bo_pin_basic
[17:19:29] [PASSED] ttm_bo_pin_unpin_resource
[17:19:29] [PASSED] ttm_bo_multiple_pin_one_unpin
[17:19:29] ===================== [PASSED] ttm_bo ======================
[17:19:29] ============== ttm_bo_validate (22 subtests) ===============
[17:19:29] ============== ttm_bo_init_reserved_sys_man  ===============
[17:19:29] [PASSED] Buffer object for userspace
[17:19:29] [PASSED] Kernel buffer object
[17:19:29] [PASSED] Shared buffer object
[17:19:29] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[17:19:29] ============== ttm_bo_init_reserved_mock_man  ==============
[17:19:29] [PASSED] Buffer object for userspace
[17:19:29] [PASSED] Kernel buffer object
[17:19:29] [PASSED] Shared buffer object
[17:19:29] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[17:19:29] [PASSED] ttm_bo_init_reserved_resv
[17:19:29] ================== ttm_bo_validate_basic  ==================
[17:19:29] [PASSED] Buffer object for userspace
[17:19:29] [PASSED] Kernel buffer object
[17:19:29] [PASSED] Shared buffer object
[17:19:29] ============== [PASSED] ttm_bo_validate_basic ==============
[17:19:29] [PASSED] ttm_bo_validate_invalid_placement
[17:19:29] ============= ttm_bo_validate_same_placement  ==============
[17:19:29] [PASSED] System manager
[17:19:29] [PASSED] VRAM manager
[17:19:29] ========= [PASSED] ttm_bo_validate_same_placement ==========
[17:19:29] [PASSED] ttm_bo_validate_failed_alloc
[17:19:29] [PASSED] ttm_bo_validate_pinned
[17:19:29] [PASSED] ttm_bo_validate_busy_placement
[17:19:29] ================ ttm_bo_validate_multihop  =================
[17:19:29] [PASSED] Buffer object for userspace
[17:19:29] [PASSED] Kernel buffer object
[17:19:29] [PASSED] Shared buffer object
[17:19:29] ============ [PASSED] ttm_bo_validate_multihop =============
[17:19:29] ========== ttm_bo_validate_no_placement_signaled  ==========
[17:19:29] [PASSED] Buffer object in system domain, no page vector
[17:19:29] [PASSED] Buffer object in system domain with an existing page vector
[17:19:29] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[17:19:29] ======== ttm_bo_validate_no_placement_not_signaled  ========
[17:19:29] [PASSED] Buffer object for userspace
[17:19:29] [PASSED] Kernel buffer object
[17:19:29] [PASSED] Shared buffer object
[17:19:29] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[17:19:29] [PASSED] ttm_bo_validate_move_fence_signaled
[17:19:29] ========= ttm_bo_validate_move_fence_not_signaled  =========
[17:19:29] [PASSED] Waits for GPU
[17:19:29] [PASSED] Tries to lock straight away
[17:19:29] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[17:19:29] [PASSED] ttm_bo_validate_swapout
[17:19:29] [PASSED] ttm_bo_validate_happy_evict
[17:19:29] [PASSED] ttm_bo_validate_all_pinned_evict
[17:19:29] [PASSED] ttm_bo_validate_allowed_only_evict
[17:19:29] [PASSED] ttm_bo_validate_deleted_evict
[17:19:29] [PASSED] ttm_bo_validate_busy_domain_evict
[17:19:29] [PASSED] ttm_bo_validate_evict_gutting
[17:19:29] [PASSED] ttm_bo_validate_recrusive_evict
[17:19:29] ================= [PASSED] ttm_bo_validate =================
[17:19:29] ============================================================
[17:19:29] Testing complete. Ran 102 tests: passed: 102
[17:19:29] Elapsed time: 11.830s total, 1.738s configuring, 9.877s building, 0.185s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2026-07-01 17:19 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-07-01 16:33 [PATCH v2 0/8] drm/xe: add page size allocation mode control Nareshkumar Gollakoti
2026-07-01 16:33 ` [PATCH v2 1/8] drm/xe: add page size allocation control state to xe_device Nareshkumar Gollakoti
2026-07-01 16:33 ` [PATCH v2 2/8] drm/xe: add helper for multi page-size support Nareshkumar Gollakoti
2026-07-01 16:33 ` [PATCH v2 3/8] drm/xe/debugfs: add page size allocation mode knob Nareshkumar Gollakoti
2026-07-01 16:33 ` [PATCH v2 4/8] drm/xe: add 1G BO page-size alignment flag Nareshkumar Gollakoti
2026-07-01 16:33 ` [PATCH v2 5/8] drm/xe: apply debug page-size policy to user BO creation Nareshkumar Gollakoti
2026-07-01 16:33 ` [PATCH v2 6/8] drm/xe/vm: apply debug page-size policy to VMA map flags Nareshkumar Gollakoti
2026-07-01 16:33 ` [PATCH v2 7/8] drm/xe/vm: validate large-page user BO bind alignment Nareshkumar Gollakoti
2026-07-01 16:33 ` [PATCH v2 8/8] drm/xe/pt: allow selecting the bind leaf PTE level Nareshkumar Gollakoti
2026-07-01 17:19 ` ✓ CI.KUnit: success for drm/xe: add page size allocation mode control Patchwork

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