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From: Stefan Hajnoczi <stefanha@redhat.com>
To: alistair23@gmail.com
Cc: qemu-devel@nongnu.org, alistair23@gmail.com,
	Alistair Francis <alistair.francis@wdc.com>
Subject: Re: [PULL 00/39] riscv-to-apply queue
Date: Thu, 2 Jul 2026 12:32:07 +0200	[thread overview]
Message-ID: <20260702103207.GA434767@fedora> (raw)
In-Reply-To: <20260701101752.2522962-1-alistair.francis@wdc.com>

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Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/11.1 for any user-visible changes.

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  parent reply	other threads:[~2026-07-02 10:33 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-01 10:17 [PULL 00/39] riscv-to-apply queue alistair23
2026-07-01 10:17 ` [PULL 01/39] target/riscv: Avoid NULL deref in IMSIC CSR write alistair23
2026-07-01 10:17 ` [PULL 02/39] tests/functional/riscv64: Use newer kernel for tuxrun boot alistair23
2026-07-01 10:17 ` [PULL 03/39] tests/functional/riscv64: Add virt machine AIA boot test alistair23
2026-07-01 10:17 ` [PULL 04/39] target/riscv/cpu: add CPU unrealize callback alistair23
2026-07-01 10:17 ` [PULL 05/39] target/riscv: dynamic alloc of debug trigger arrays alistair23
2026-07-01 10:17 ` [PULL 06/39] target/riscv: add 'num-triggers' debug property alistair23
2026-07-01 10:17 ` [PULL 07/39] target/riscv/cpu.c: add 'svbare' satp-mode alistair23
2026-07-01 10:17 ` [PULL 08/39] hw/riscv/virt-acpi-build: Fix RINTC PLIC context ID for KVM alistair23
2026-07-01 10:17 ` [PULL 09/39] target/riscv: avoid abort when reading vtype before env->xl is set alistair23
2026-07-01 10:17 ` [PULL 10/39] hw/intc: riscv_aplic: Skip reset for KVM irqchip alistair23
2026-07-01 10:17 ` [PULL 11/39] hw/intc: riscv_imsic: " alistair23
2026-07-01 10:17 ` [PULL 12/39] target/riscv/kvm: skip FP/Vector sync on KVM_PUT_RUNTIME_STATE alistair23
2026-07-01 10:17 ` [PULL 13/39] hw/riscv/sifive_u.c: remove unneeded qemu_fdt_get_phandle() call alistair23
2026-07-01 10:17 ` [PULL 14/39] hw/riscv/sifive_u.c: use intc_phandle in plic creation alistair23
2026-07-01 10:17 ` [PULL 15/39] hw/riscv/sifive_u: add #address-cells in PLIC FDT alistair23
2026-07-01 10:17 ` [PULL 16/39] hw/riscv/virt.c: change 'plic' nodename to 'interrupt-controller' alistair23
2026-07-01 10:17 ` [PULL 17/39] hw/riscv: add create_fdt_plic() helper alistair23
2026-07-01 10:17 ` [PULL 18/39] hw/riscv/riscv-iommu: rename regs_rw to regs alistair23
2026-07-01 10:17 ` [PULL 19/39] hw/riscv/riscv-iommu.c: make FCTL.BE read only 0 alistair23
2026-07-01 10:17 ` [PULL 20/39] hw/riscv/riscv-iommu: check DC.TC reserved bits alistair23
2026-07-01 10:17 ` [PULL 21/39] target/riscv: Apply UXL WARL handling to vsstatus alistair23
2026-07-01 10:17 ` [PULL 22/39] hw/riscv/riscv-iommu: set cmd_ill IOFENCE.C rsvp bits are set alistair23
2026-07-01 10:17 ` [PULL 23/39] hw/riscv/riscv-iommu.c: set RISCV_IOMMU_FQ_HDR_PV appropriately alistair23
2026-07-01 10:17 ` [PULL 24/39] hw/riscv/riscv-iommu.c: fix MSI MRIF interrupt-pending offset alistair23
2026-07-01 10:17 ` [PULL 25/39] target/riscv: Report QEMU CPU archid as 42 alistair23
2026-07-01 10:17 ` [PULL 26/39] target/riscv: Check PMP before updating PTE alistair23
2026-07-01 10:17 ` [PULL 27/39] hw/riscv/boot: Describe discontiguous memory in boot_info alistair23
2026-07-01 10:17 ` [PULL 28/39] hw/riscv/boot: Account for discontiguous memory when loading firmware alistair23
2026-07-01 10:17 ` [PULL 29/39] hw/riscv/virt: Move AIA initialisation to helper file alistair23
2026-07-01 10:17 ` [PULL 30/39] hw/riscv/aia: Provide number of irq sources alistair23
2026-07-01 10:17 ` [PULL 31/39] hw/riscv/aia: Configure stride for the M-mode IMSIC alistair23
2026-07-01 10:17 ` [PULL 32/39] target/riscv: tt-ascalon: Enable Zkr extension alistair23
2026-07-01 10:17 ` [PULL 33/39] hw/riscv: Add Tenstorrent Atlantis machine alistair23
2026-07-01 10:17 ` [PULL 34/39] hw/riscv/atlantis: Ensure OpenSBI has a non-zero next_addr alistair23
2026-07-01 10:17 ` [PULL 35/39] tests/functional/riscv64: Add tt-atlantis tests alistair23
2026-07-01 10:17 ` [PULL 36/39] hw/i2c: Add DesignWare I2C Controller alistair23
2026-07-01 10:17 ` [PULL 37/39] hw/riscv/atlantis: Integrate i2c controllers alistair23
2026-07-01 10:17 ` [PULL 38/39] hw/riscv/atlantis: Add some i2c peripherals alistair23
2026-07-01 10:17 ` [PULL 39/39] hw/riscv/riscv-iommu.c: always fault with SADE=0 and A=0 alistair23
2026-07-02 10:32 ` Stefan Hajnoczi [this message]
2026-07-02 10:54 ` [PULL 00/39] riscv-to-apply queue Michael Tokarev
2026-07-02 11:44   ` Daniel Henrique Barboza
2026-07-03  0:02   ` Alistair Francis
  -- strict thread matches above, loose matches on Subject: below --
2024-12-18 22:29 Alistair Francis
2024-12-19 20:45 ` Stefan Hajnoczi
2024-12-20  1:55   ` Alistair Francis
2024-12-20  9:36   ` Daniel Henrique Barboza

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