From: Harsh Prateek Bora <harshpb@linux.ibm.com>
To: qemu-devel@nongnu.org
Subject: [PULL 0/7] ppc queue
Date: Fri, 3 Jul 2026 10:13:55 +0530 [thread overview]
Message-ID: <20260703044402.79723-1-harshpb@linux.ibm.com> (raw)
The following changes since commit b4bdad7dcef623d2874df4e79e0be01075096c3b:
Merge tag 'dump-pr-v1' of https://gitlab.com/marcandre.lureau/qemu into staging (2026-07-02 16:04:08 +0200)
are available in the Git repository at:
https://gitlab.com/harshpb/qemu.git tags/pull-ppc-for-11.1-misc-20260703
for you to fetch changes up to f9d05801eb4acd6402d73cb25d498a2419920cf9:
ppc/pnv: add test to verify external DTB is honored (2026-07-03 10:07:21 +0530)
----------------------------------------------------------------
PPC queue for 2026-07-03
* SLOF FW update to 20260627
* ppc/pnv: external dtb fix and test addition
* PHB code refactor for better maintainability
* Revert deprecation of 405 CPUs
* target/ppc: Expose TB offset of guest in Qemu monitor
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEa4EM1tK+EPOIPSFCRUTplPnWj7sFAmpHPNAACgkQRUTplPnW
j7tkjQ/9FP3/sTw0MxhGdLItxurrEzu3f4jiDKpnjEIqiJInzYl/2fJKZU611PSp
gydfdNhkr71TxuJggibAosEblcWRq9KqQXysDpNrJ8rqEIeLj0lv9/JigLTZqU3e
vsfDmfdCAB7YTtpm6HkTYW81EPD0X8AwQqz4FCNDQ0zeNUBIU8IU/ARP2j80CTnm
5xRK42aZb9CMYYIk3p8l4FuZmv6Y0Jf0daXM4WsEdHu9KjGvYr1glTY/lgblNPug
kWIcjPqQ6x/hloYqxTTcsfJBnKfdaVppuh6LbJbgISsQIBzTqrD2HvEIpNFJRKnS
1XGwLj6cMmm4u2tv3BF0yVDJCEff312n2VFskmOrCUJOR+g2UqDzMb4+7JOpufEn
Fla38+a9H9ThdnUNaak8+KquHDOJzDAOugOdMvsID8KlJ/q3wrTTEUUImj5Bwyqz
Gc7naNx+3D+BSiahDe4LP71ZFLrQJ/eYCj71for5xZNcZVOQ6IDhymEMUAcRzkt6
2qICF6XmkYfuH+1113KMxG65NpKGEvktONQ6UpLWTubQ++BNK1Bt2v8PAWSis/d8
EYg5M/R7RqhbxufIUDLXJIuxB3xuiVg+e+x/M8X0LffmYhPI1cuZPmth4/75IKL+
9Vddgc1hSHX1EUjRyZpoK6WArOTNvUOZMEcAhGr/0NgK5O/1Z10=
=1TRv
-----END PGP SIGNATURE-----
----------------------------------------------------------------
Gautam Menghani (1):
target/ppc: Expose the TB offset of the guest in QEMU monitor
Glenn Miles (1):
Revert "hw/ppc: Deprecate 405 CPUs"
Jishnu Warrier (1):
hw/pci-host: Split PowerNV PHB5 code from PHB4 files
Shivang Upadhyay (2):
ppc/pnv: avoid regenerating DTB if external DTB is present
ppc/pnv: add test to verify external DTB is honored
Thomas Huth (2):
pseries: Update SLOF firmware image to release 20260627
docs/system/ppc/pseries: Update the link to the SLOF repository
docs/about/deprecated.rst | 9 ----
docs/system/ppc/pseries.rst | 2 +-
target/ppc/cpu.h | 1 +
hw/pci-host/pnv_phb4.c | 6 ---
hw/pci-host/pnv_phb4_pec.c | 58 -------------------------
hw/pci-host/pnv_phb5.c | 23 ++++++++++
hw/pci-host/pnv_phb5_pec.c | 77 +++++++++++++++++++++++++++++++++
hw/ppc/pnv.c | 10 +++--
hw/ppc/ppc.c | 5 +++
target/ppc/cpu_init.c | 5 ++-
hw/pci-host/meson.build | 2 +
pc-bios/README | 2 +-
pc-bios/slof.bin | Bin 994176 -> 997576 bytes
roms/SLOF | 2 +-
tests/functional/ppc64/test_powernv.py | 19 ++++++++
15 files changed, 140 insertions(+), 81 deletions(-)
create mode 100644 hw/pci-host/pnv_phb5.c
create mode 100644 hw/pci-host/pnv_phb5_pec.c
next reply other threads:[~2026-07-03 4:45 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-03 4:43 Harsh Prateek Bora [this message]
2026-07-03 4:43 ` [PULL 2/7] Revert "hw/ppc: Deprecate 405 CPUs" Harsh Prateek Bora
2026-07-03 4:43 ` [PULL 3/7] hw/pci-host: Split PowerNV PHB5 code from PHB4 files Harsh Prateek Bora
2026-07-03 4:43 ` [PULL 4/7] target/ppc: Expose the TB offset of the guest in QEMU monitor Harsh Prateek Bora
2026-07-03 4:44 ` [PULL 5/7] docs/system/ppc/pseries: Update the link to the SLOF repository Harsh Prateek Bora
2026-07-03 4:44 ` [PULL 6/7] ppc/pnv: avoid regenerating DTB if external DTB is present Harsh Prateek Bora
2026-07-03 4:44 ` [PULL 7/7] ppc/pnv: add test to verify external DTB is honored Harsh Prateek Bora
2026-07-03 4:57 ` [PULL 0/7] ppc queue Harsh Prateek Bora
2026-07-05 17:57 ` Stefan Hajnoczi
-- strict thread matches above, loose matches on Subject: below --
2025-07-24 13:31 Cédric Le Goater
2025-07-25 15:24 ` Stefan Hajnoczi
2023-08-04 15:29 Daniel Henrique Barboza
2023-08-04 19:37 ` Richard Henderson
2023-08-05 6:56 ` Michael Tokarev
2023-08-06 20:09 ` Cédric Le Goater
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260703044402.79723-1-harshpb@linux.ibm.com \
--to=harshpb@linux.ibm.com \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.