From: Harsh Prateek Bora <harshpb@linux.ibm.com>
To: qemu-devel@nongnu.org
Cc: "Glenn Miles" <milesg@linux.ibm.com>,
"Cédric Le Goater" <clg@redhat.com>
Subject: [PULL 2/7] Revert "hw/ppc: Deprecate 405 CPUs"
Date: Fri, 3 Jul 2026 10:13:57 +0530 [thread overview]
Message-ID: <20260703044402.79723-3-harshpb@linux.ibm.com> (raw)
In-Reply-To: <20260703044402.79723-1-harshpb@linux.ibm.com>
From: Glenn Miles <milesg@linux.ibm.com>
This reverts commit 52f0b59ec6b780f2a3e162d5862b90b406fa4697.
The PowerPC 405 CPU is used by the PPE42 CPU which was added to
QEMU v10.2. The PPE42 CPU is basically a stripped down version
of the PowerPC 405 CPU and is used by the Power9, Power10, and
Power11 CPUs as an embedded processor to handle various tasks.
Also, IBM has plans to use the PowerPC 405 CPU model within a
year to model the On Chip Controller (OCC), which has an embedded
PPC405 CPU. Therefore, this patch removes the PowerPC 405 CPU
from the deprecated list.
Signed-off-by: Glenn Miles <milesg@linux.ibm.com>
Acked-by: Cédric Le Goater <clg@redhat.com>
Acked-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260505144621.1308457-1-milesg@linux.ibm.com
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
---
docs/about/deprecated.rst | 9 ---------
1 file changed, 9 deletions(-)
diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst
index cf3e1a007c..169c5dfe4f 100644
--- a/docs/about/deprecated.rst
+++ b/docs/about/deprecated.rst
@@ -206,15 +206,6 @@ in the QEMU object model anymore. ``Sun-UltraSparc-IIIi+`` and
but for consistency these will get removed in a future release, too.
Use ``Sun-UltraSparc-IIIi-plus`` and ``Sun-UltraSparc-IV-plus`` instead.
-PPC 405 CPUs (since 10.0)
-'''''''''''''''''''''''''
-
-The PPC 405 CPU has no known users and the ``ref405ep`` machine was
-removed in QEMU 10.0. Since the IBM POWER [8-11] processors uses an
-embedded 405 for power management (OCC) and other internal tasks, it
-is theoretically possible to use QEMU to model them. Let's keep the
-CPU implementation for a while before removing all support.
-
Power8E and Power8NVL CPUs and corresponding Pnv chips (since 10.1)
'''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''
--
2.52.0
next prev parent reply other threads:[~2026-07-03 4:45 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-03 4:43 [PULL 0/7] ppc queue Harsh Prateek Bora
2026-07-03 4:43 ` Harsh Prateek Bora [this message]
2026-07-03 4:43 ` [PULL 3/7] hw/pci-host: Split PowerNV PHB5 code from PHB4 files Harsh Prateek Bora
2026-07-03 4:43 ` [PULL 4/7] target/ppc: Expose the TB offset of the guest in QEMU monitor Harsh Prateek Bora
2026-07-03 4:44 ` [PULL 5/7] docs/system/ppc/pseries: Update the link to the SLOF repository Harsh Prateek Bora
2026-07-03 4:44 ` [PULL 6/7] ppc/pnv: avoid regenerating DTB if external DTB is present Harsh Prateek Bora
2026-07-03 4:44 ` [PULL 7/7] ppc/pnv: add test to verify external DTB is honored Harsh Prateek Bora
2026-07-03 4:57 ` [PULL 0/7] ppc queue Harsh Prateek Bora
2026-07-05 17:57 ` Stefan Hajnoczi
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