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From: sashiko-bot@kernel.org
To: tze.yee.ng@altera.com
Cc: "Alexandre Belloni" <alexandre.belloni@bootlin.com>,
	imx@lists.linux.dev, linux-i3c@lists.infradead.org,
	Frank.Li@kernel.org
Subject: Re: [PATCH v5 3/5] i3c: master: dw: Map CCC hardware errors to I3C M0/M2
Date: Fri, 03 Jul 2026 10:59:30 +0000	[thread overview]
Message-ID: <20260703105931.103B51F00A3F@smtp.kernel.org> (raw)
In-Reply-To: <7b85402977d59f7f3d28f15fa7005bbfafffbe20.1783074850.git.tze.yee.ng@altera.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] dw_i3c_ccc_set() fails to use dw_i3c_ccc_map_err(), resulting in inconsistent M0 error mapping for CCC SET commands
--

commit 0ce229b1e86f48f8bc79433bee08c7da0909bad8
Author: Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>

i3c: master: dw: Map CCC hardware errors to I3C M0/M2
    
This commit maps DesignWare I3C master CCC hardware errors to I3C M0/M2 error
codes. It introduces a new mapping function to handle this translation and
updates CCC commands to use it.

> diff --git a/drivers/i3c/master/dw-i3c-master.c b/drivers/i3c/master/dw-i3c-master.c
> --- a/drivers/i3c/master/dw-i3c-master.c
> +++ b/drivers/i3c/master/dw-i3c-master.c
[ ... ]
> @@ -781,10 +800,9 @@ static int dw_i3c_ccc_get(struct dw_i3c_master *master, struct i3c_ccc_cmd *ccc)
>  
>  	ret = xfer->ret;
>  	cmd = &xfer->cmds[0];
> +	ccc->err = dw_i3c_ccc_map_err(cmd->error);
>  	if (!ret)
>  		ccc->dests[0].payload.actual_len = cmd->rx_len;
> -	if (cmd->error == RESPONSE_ERROR_IBA_NACK)
> -		ccc->err = I3C_ERROR_M2;

[Severity: Medium]
Should dw_i3c_ccc_set() also be updated to use the new dw_i3c_ccc_map_err()
function?

It looks like dw_i3c_ccc_get() was updated to map M0/M2 errors, but
dw_i3c_ccc_set() retains the legacy hardcoded check:

drivers/i3c/master/dw-i3c-master.c:dw_i3c_ccc_set() {
...
	ret = xfer->ret;
	if (xfer->cmds[0].error == RESPONSE_ERROR_IBA_NACK)
		ccc->err = I3C_ERROR_M2;
...
}

Without using the new mapping function here, hardware errors (like CRC,
Parity, or Frame errors) during CCC SET commands will not be mapped to
I3C_ERROR_M0, resulting in inconsistent error handling compared to GET
commands.

>  
>  	return ret;
>  }

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/cover.1783074850.git.tze.yee.ng@altera.com?part=3

-- 
linux-i3c mailing list
linux-i3c@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-i3c

WARNING: multiple messages have this Message-ID (diff)
From: sashiko-bot@kernel.org
To: tze.yee.ng@altera.com
Cc: "Alexandre Belloni" <alexandre.belloni@bootlin.com>,
	imx@lists.linux.dev, linux-i3c@lists.infradead.org,
	Frank.Li@kernel.org
Subject: Re: [PATCH v5 3/5] i3c: master: dw: Map CCC hardware errors to I3C M0/M2
Date: Fri, 03 Jul 2026 10:59:30 +0000	[thread overview]
Message-ID: <20260703105931.103B51F00A3F@smtp.kernel.org> (raw)
In-Reply-To: <7b85402977d59f7f3d28f15fa7005bbfafffbe20.1783074850.git.tze.yee.ng@altera.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] dw_i3c_ccc_set() fails to use dw_i3c_ccc_map_err(), resulting in inconsistent M0 error mapping for CCC SET commands
--

commit 0ce229b1e86f48f8bc79433bee08c7da0909bad8
Author: Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>

i3c: master: dw: Map CCC hardware errors to I3C M0/M2
    
This commit maps DesignWare I3C master CCC hardware errors to I3C M0/M2 error
codes. It introduces a new mapping function to handle this translation and
updates CCC commands to use it.

> diff --git a/drivers/i3c/master/dw-i3c-master.c b/drivers/i3c/master/dw-i3c-master.c
> --- a/drivers/i3c/master/dw-i3c-master.c
> +++ b/drivers/i3c/master/dw-i3c-master.c
[ ... ]
> @@ -781,10 +800,9 @@ static int dw_i3c_ccc_get(struct dw_i3c_master *master, struct i3c_ccc_cmd *ccc)
>  
>  	ret = xfer->ret;
>  	cmd = &xfer->cmds[0];
> +	ccc->err = dw_i3c_ccc_map_err(cmd->error);
>  	if (!ret)
>  		ccc->dests[0].payload.actual_len = cmd->rx_len;
> -	if (cmd->error == RESPONSE_ERROR_IBA_NACK)
> -		ccc->err = I3C_ERROR_M2;

[Severity: Medium]
Should dw_i3c_ccc_set() also be updated to use the new dw_i3c_ccc_map_err()
function?

It looks like dw_i3c_ccc_get() was updated to map M0/M2 errors, but
dw_i3c_ccc_set() retains the legacy hardcoded check:

drivers/i3c/master/dw-i3c-master.c:dw_i3c_ccc_set() {
...
	ret = xfer->ret;
	if (xfer->cmds[0].error == RESPONSE_ERROR_IBA_NACK)
		ccc->err = I3C_ERROR_M2;
...
}

Without using the new mapping function here, hardware errors (like CRC,
Parity, or Frame errors) during CCC SET commands will not be mapped to
I3C_ERROR_M0, resulting in inconsistent error handling compared to GET
commands.

>  
>  	return ret;
>  }

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/cover.1783074850.git.tze.yee.ng@altera.com?part=3

  reply	other threads:[~2026-07-03 10:59 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-03 10:51 [PATCH v5 0/5] i3c: Improve CCC reliability with actual_len, validation, and Direct GET retry tze.yee.ng
2026-07-03 10:51 ` tze.yee.ng
2026-07-03 10:51 ` [PATCH v5 1/5] i3c: ccc: Add actual_len to struct i3c_ccc_cmd_payload tze.yee.ng
2026-07-03 10:51   ` tze.yee.ng
2026-07-03 10:51 ` [PATCH v5 2/5] i3c: master: Report actual GET CCC payload length on success tze.yee.ng
2026-07-03 10:51   ` tze.yee.ng
2026-07-03 11:06   ` sashiko-bot
2026-07-03 11:06     ` sashiko-bot
2026-07-06  5:28     ` NG, TZE YEE
2026-07-06  5:28       ` NG, TZE YEE
2026-07-03 10:51 ` [PATCH v5 3/5] i3c: master: dw: Map CCC hardware errors to I3C M0/M2 tze.yee.ng
2026-07-03 10:51   ` tze.yee.ng
2026-07-03 10:59   ` sashiko-bot [this message]
2026-07-03 10:59     ` sashiko-bot
2026-07-06  5:56     ` NG, TZE YEE
2026-07-06  5:56       ` NG, TZE YEE
2026-07-03 10:51 ` [PATCH v5 4/5] i3c: master: Validate GET CCC payload length and retry Direct GET once tze.yee.ng
2026-07-03 10:51   ` tze.yee.ng
2026-07-03 10:51 ` [PATCH v5 5/5] i3c: master: Add optional_bytes for variable-length GET CCC validation tze.yee.ng
2026-07-03 10:51   ` tze.yee.ng

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